diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2019-11-07 06:59:09 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2019-11-07 06:59:09 +0000 |
commit | 699c9e3a49763805cef2ee02bc36d19dd6e77b22 (patch) | |
tree | 6d80e4bce1357f137dfd1cc8e1723e932018c1c0 /contrib/llvm/lib | |
parent | 00d8365d923615be45a4554f836533e85e132c35 (diff) |
Merge commit 8e34dd941 from llvm git (by Sanjay Patel):
[x86] avoid crashing when splitting AVX stores with non-simple type
(PR43916)
The store splitting transform was assuming a simple type (MVT), but
that's not necessarily the case as shown in the test.
This should fix 'Assertion failed: (isSimple() && "Expected a
SimpleValueType!")' when building the security/openssl111 port targeting
a CPU that supports AVX, but not AVX2, such as sandybridge.
PR: 241747
MFC after: 1 month
X-MFC-With: r353358
Notes
Notes:
svn path=/head/; revision=354429
Diffstat (limited to 'contrib/llvm/lib')
-rw-r--r-- | contrib/llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp b/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp index 1869cc9da017..920cdd7e625e 100644 --- a/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -21182,12 +21182,14 @@ static SDValue splitVectorStore(StoreSDNode *Store, SelectionDAG &DAG) { "Expecting 256/512-bit op"); // Splitting volatile memory ops is not allowed unless the operation was not - // legal to begin with. We are assuming the input op is legal (this transform - // is only used for targets with AVX). + // legal to begin with. Assume the input store is legal (this transform is + // only used for targets with AVX). Note: It is possible that we have an + // illegal type like v2i128, and so we could allow splitting a volatile store + // in that case if that is important. if (Store->isVolatile()) return SDValue(); - MVT StoreVT = StoredVal.getSimpleValueType(); + EVT StoreVT = StoredVal.getValueType(); unsigned NumElems = StoreVT.getVectorNumElements(); unsigned HalfSize = StoredVal.getValueSizeInBits() / 2; unsigned HalfAlign = (128 == HalfSize ? 16 : 32); |