diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2019-11-21 20:23:35 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2019-11-21 20:23:35 +0000 |
commit | 5f0c7cb67f9e99a991d043aa827fc0b8ffb53209 (patch) | |
tree | 36a5afc1994d244ec0e674684f10cc80c807dc0d /contrib/llvm/lib/Target | |
parent | 2967f08a40b078cade14533692b9823fa4382f36 (diff) | |
download | src-5f0c7cb67f9e99a991d043aa827fc0b8ffb53209.tar.gz src-5f0c7cb67f9e99a991d043aa827fc0b8ffb53209.zip |
Merge commit 3718102d4 from llvm git (by Simon Atanasyan):
[mips] Support `octeon+` CPU in the `.set arch=` directive
Differential Revision: https://reviews.llvm.org/D69850
This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.
Requested by: kevans
MFC after: 1 month
X-MFC-With: r353358
Notes
Notes:
svn path=/head/; revision=354980
Diffstat (limited to 'contrib/llvm/lib/Target')
-rw-r--r-- | contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 217516bc90f9..989cba13efe8 100644 --- a/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -7122,8 +7122,8 @@ bool MipsAsmParser::parseSetArchDirective() { return reportParseError("unexpected token, expected equals sign"); Parser.Lex(); - StringRef Arch; - if (Parser.parseIdentifier(Arch)) + StringRef Arch = getParser().parseStringToEndOfStatement().trim(); + if (Arch.empty()) return reportParseError("expected arch identifier"); StringRef ArchFeatureName = @@ -7144,6 +7144,7 @@ bool MipsAsmParser::parseSetArchDirective() { .Case("mips64r5", "mips64r5") .Case("mips64r6", "mips64r6") .Case("octeon", "cnmips") + .Case("octeon+", "cnmipsp") .Case("r4000", "mips3") // This is an implementation of Mips3. .Default(""); |