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author | Dimitry Andric <dim@FreeBSD.org> | 2019-12-20 19:53:05 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2019-12-20 19:53:05 +0000 |
commit | 0b57cec536236d46e3dba9bd041533462f33dbb7 (patch) | |
tree | 56229dbdbbf76d18580f72f789003db17246c8d9 /contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp | |
parent | 718ef55ec7785aae63f98f8ca05dc07ed399c16d (diff) | |
download | src-0b57cec536236d46e3dba9bd041533462f33dbb7.tar.gz src-0b57cec536236d46e3dba9bd041533462f33dbb7.zip |
Move all sources from the llvm project into contrib/llvm-project.
This uses the new layout of the upstream repository, which was recently
migrated to GitHub, and converted into a "monorepo". That is, most of
the earlier separate sub-projects with their own branches and tags were
consolidated into one top-level directory, and are now branched and
tagged together.
Updating the vendor area to match this layout is next.
Notes
Notes:
svn path=/head/; revision=355940
Diffstat (limited to 'contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp')
-rw-r--r-- | contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp | 151 |
1 files changed, 0 insertions, 151 deletions
diff --git a/contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp b/contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp deleted file mode 100644 index 8d5eabf59b71..000000000000 --- a/contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp +++ /dev/null @@ -1,151 +0,0 @@ -//===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file contains the Mips implementation of TargetFrameLowering class. -// -//===----------------------------------------------------------------------===// - -#include "MipsFrameLowering.h" -#include "MCTargetDesc/MipsBaseInfo.h" -#include "MipsInstrInfo.h" -#include "MipsMachineFunction.h" -#include "MipsTargetMachine.h" -#include "llvm/CodeGen/MachineFrameInfo.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineModuleInfo.h" -#include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/IR/DataLayout.h" -#include "llvm/IR/Function.h" -#include "llvm/Target/TargetOptions.h" - -using namespace llvm; - - -//===----------------------------------------------------------------------===// -// -// Stack Frame Processing methods -// +----------------------------+ -// -// The stack is allocated decrementing the stack pointer on -// the first instruction of a function prologue. Once decremented, -// all stack references are done thought a positive offset -// from the stack/frame pointer, so the stack is considering -// to grow up! Otherwise terrible hacks would have to be made -// to get this stack ABI compliant :) -// -// The stack frame required by the ABI (after call): -// Offset -// -// 0 ---------- -// 4 Args to pass -// . saved $GP (used in PIC) -// . Alloca allocations -// . Local Area -// . CPU "Callee Saved" Registers -// . saved FP -// . saved RA -// . FPU "Callee Saved" Registers -// StackSize ----------- -// -// Offset - offset from sp after stack allocation on function prologue -// -// The sp is the stack pointer subtracted/added from the stack size -// at the Prologue/Epilogue -// -// References to the previous stack (to obtain arguments) are done -// with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1)) -// -// Examples: -// - reference to the actual stack frame -// for any local area var there is smt like : FI >= 0, StackOffset: 4 -// sw REGX, 4(SP) -// -// - reference to previous stack frame -// suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16. -// The emitted instruction will be something like: -// lw REGX, 16+StackSize(SP) -// -// Since the total stack size is unknown on LowerFormalArguments, all -// stack references (ObjectOffset) created to reference the function -// arguments, are negative numbers. This way, on eliminateFrameIndex it's -// possible to detect those references and the offsets are adjusted to -// their real location. -// -//===----------------------------------------------------------------------===// - -const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { - if (ST.inMips16Mode()) - return llvm::createMips16FrameLowering(ST); - - return llvm::createMipsSEFrameLowering(ST); -} - -// hasFP - Return true if the specified function should have a dedicated frame -// pointer register. This is true if the function has variable sized allocas, -// if it needs dynamic stack realignment, if frame pointer elimination is -// disabled, or if the frame address is taken. -bool MipsFrameLowering::hasFP(const MachineFunction &MF) const { - const MachineFrameInfo &MFI = MF.getFrameInfo(); - const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - - return MF.getTarget().Options.DisableFramePointerElim(MF) || - MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() || - TRI->needsStackRealignment(MF); -} - -bool MipsFrameLowering::hasBP(const MachineFunction &MF) const { - const MachineFrameInfo &MFI = MF.getFrameInfo(); - const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - - return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF); -} - -// Estimate the size of the stack, including the incoming arguments. We need to -// account for register spills, local objects, reserved call frame and incoming -// arguments. This is required to determine the largest possible positive offset -// from $sp so that it can be determined if an emergency spill slot for stack -// addresses is required. -uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const { - const MachineFrameInfo &MFI = MF.getFrameInfo(); - const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); - - int64_t Size = 0; - - // Iterate over fixed sized objects which are incoming arguments. - for (int I = MFI.getObjectIndexBegin(); I != 0; ++I) - if (MFI.getObjectOffset(I) > 0) - Size += MFI.getObjectSize(I); - - // Conservatively assume all callee-saved registers will be saved. - for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { - unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); - Size = alignTo(Size + RegSize, RegSize); - } - - // Get the size of the rest of the frame objects and any possible reserved - // call frame, accounting for alignment. - return Size + MFI.estimateStackSize(MF); -} - -// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions -MachineBasicBlock::iterator MipsFrameLowering:: -eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, - MachineBasicBlock::iterator I) const { - unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP; - - if (!hasReservedCallFrame(MF)) { - int64_t Amount = I->getOperand(0).getImm(); - if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) - Amount = -Amount; - - STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I); - } - - return MBB.erase(I); -} |