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authorDimitry Andric <dim@FreeBSD.org>2023-09-02 21:17:18 +0000
committerDimitry Andric <dim@FreeBSD.org>2023-12-08 17:34:50 +0000
commit06c3fb2749bda94cb5201f81ffdb8fa6c3161b2e (patch)
tree62f873df87c7c675557a179e0c4c83fe9f3087bc /contrib/llvm-project/llvm/lib/Target/AVR/AVRDevices.td
parentcf037972ea8863e2bab7461d77345367d2c1e054 (diff)
parent7fa27ce4a07f19b07799a767fc29416f3b625afb (diff)
downloadsrc-06c3fb2749bda94cb5201f81ffdb8fa6c3161b2e.tar.gz
src-06c3fb2749bda94cb5201f81ffdb8fa6c3161b2e.zip
Merge llvm-project main llvmorg-17-init-19304-gd0b54bb50e51
This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and openmp to llvm-project main llvmorg-17-init-19304-gd0b54bb50e51, the last commit before the upstream release/17.x branch was created. PR: 273753 MFC after: 1 month
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AVR/AVRDevices.td')
-rw-r--r--contrib/llvm-project/llvm/lib/Target/AVR/AVRDevices.td22
1 files changed, 12 insertions, 10 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AVR/AVRDevices.td b/contrib/llvm-project/llvm/lib/Target/AVR/AVRDevices.td
index f2c8a2e7a71e..f6b36dba7733 100644
--- a/contrib/llvm-project/llvm/lib/Target/AVR/AVRDevices.td
+++ b/contrib/llvm-project/llvm/lib/Target/AVR/AVRDevices.td
@@ -65,11 +65,6 @@ def FeatureMOVW : SubtargetFeature<"movw", "m_hasMOVW", "true",
"The device supports the 16-bit MOVW "
"instruction">;
-// The device has a separate flash namespace that must be accessed using special
-// instructions like lpm.
-def FeaturePROGMEM : SubtargetFeature<"progmem", "m_hasPROGMEM", "true",
- "The device has a separate flash namespace">;
-
// The device supports the `LPM` instruction, with implied destination being r0.
def FeatureLPM : SubtargetFeature<"lpm", "m_hasLPM", "true",
"The device supports the `LPM` instruction">;
@@ -125,6 +120,12 @@ def FeatureTinyEncoding
"The device has Tiny core specific "
"instruction encodings">;
+// When writing a 16-bit port or storing a 16-bit word, do the low byte first.
+def FeatureLowByteFirst
+ : SubtargetFeature<"lowbytefirst", "m_hasLowByteFirst", "true",
+ "Do the low byte first when writing a 16-bit port or "
+ "storing a 16-bit word">;
+
// The device has CPU registers mapped in data address space
def FeatureMMR : SubtargetFeature<"memmappedregs", "m_hasMemMappedGPR", "true",
"The device has CPU registers "
@@ -161,7 +162,7 @@ def ELFArchXMEGA7 : ELFArch<"EF_AVR_ARCH_XMEGA7">;
// device should have.
def FamilyAVR0 : Family<"avr0", []>;
-def FamilyAVR1 : Family<"avr1", [FamilyAVR0, FeatureLPM, FeaturePROGMEM, FeatureMMR]>;
+def FamilyAVR1 : Family<"avr1", [FamilyAVR0, FeatureLPM, FeatureMMR]>;
def FamilyAVR2
: Family<"avr2",
@@ -197,17 +198,18 @@ def FamilyTiny
FeatureSmallStack]>;
def FamilyXMEGA3 : Family<"xmega3",
- [FamilyAVR0, FeatureLPM, FeaturePROGMEM, FeatureIJMPCALL,
+ [FamilyAVR0, FeatureLPM, FeatureIJMPCALL,
FeatureADDSUBIW, FeatureSRAM, FeatureJMPCALL,
FeatureMultiplication, FeatureMOVW, FeatureLPMX,
- FeatureBREAK]>;
+ FeatureBREAK, FeatureLowByteFirst]>;
def FamilyXMEGA : Family<"xmega",
- [FamilyAVR0, FeatureLPM, FeaturePROGMEM, FeatureIJMPCALL,
+ [FamilyAVR0, FeatureLPM, FeatureIJMPCALL,
FeatureADDSUBIW, FeatureSRAM, FeatureJMPCALL,
FeatureMultiplication, FeatureMOVW, FeatureLPMX,
FeatureSPM, FeatureBREAK, FeatureEIJMPCALL,
- FeatureSPMX, FeatureDES, FeatureELPM, FeatureELPMX]>;
+ FeatureSPMX, FeatureDES, FeatureELPM, FeatureELPMX,
+ FeatureLowByteFirst]>;
def FamilyXMEGAU : Family<"xmegau", [FamilyXMEGA, FeatureRMW]>;