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author | Emmanuel Vadot <manu@FreeBSD.org> | 2020-01-19 19:14:49 +0000 |
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committer | Emmanuel Vadot <manu@FreeBSD.org> | 2020-01-19 19:14:49 +0000 |
commit | d07cc22b30e96d1f04d382eafe82ce830c81d60c (patch) | |
tree | b21da9e96b6b4952657fbe1bb613c168b7da5bd9 /Makefile.inc1 | |
parent | 9c83ff2d862d9d2a153326f3b9f17924ef3ed15a (diff) | |
download | src-d07cc22b30e96d1f04d382eafe82ce830c81d60c.tar.gz src-d07cc22b30e96d1f04d382eafe82ce830c81d60c.zip |
arm: allwinner: Fix padconf for interrupts information
Add a eint_bank member to the allwinner_pins structure.
On Allwinner SoCs not all pins can do interrupt.
Older SoC (A10/A13 and A20) there is a maximum number of interrupts
set to 32 and all the configuration is done in the same registers.
While on "newer" SoCs (>=A31) interrupts registers are splitted per
pin bank (i.e. all interrupts available in bank B will be configured
with a sets of registers and the one in bank G in another set).
While here set the names to all interrupts function to
pX_eintY where X is the bank name and Y the interrupt number.
To whom ever in the future look at the H5 manual and notice that the bank F
have interrupts support : This isn't true, trust me.
MFC after: 1 month
Notes
Notes:
svn path=/head/; revision=356888
Diffstat (limited to 'Makefile.inc1')
0 files changed, 0 insertions, 0 deletions