diff options
| author | Justin Hibbits <jhibbits@FreeBSD.org> | 2016-10-29 01:24:30 +0000 |
|---|---|---|
| committer | Justin Hibbits <jhibbits@FreeBSD.org> | 2016-10-29 01:24:30 +0000 |
| commit | 512071de53a079b72e9f20333b2c2db2a5b59f5a (patch) | |
| tree | 8d65bc233d5f9ad950aed68a9f6889861ab7b63d | |
| parent | aab03089ee92dda64ca7b0856e9de8f554cd0c6a (diff) | |
| download | src-512071de53a079b72e9f20333b2c2db2a5b59f5a.tar.gz src-512071de53a079b72e9f20333b2c2db2a5b59f5a.zip | |
Add the SPE feature mask for e500v1 and e500v2
On e500v2 SoCs it will now print:
cpu0: Features 84e08000<PPC32,MMU,SPE,EFPS,EFPD,BOOKE>
at bootup.
Notes
Notes:
svn path=/head/; revision=308073
| -rw-r--r-- | sys/powerpc/include/cpu.h | 6 | ||||
| -rw-r--r-- | sys/powerpc/powerpc/cpu.c | 7 |
2 files changed, 10 insertions, 3 deletions
diff --git a/sys/powerpc/include/cpu.h b/sys/powerpc/include/cpu.h index fffb2b4267ae..86bd607c2f38 100644 --- a/sys/powerpc/include/cpu.h +++ b/sys/powerpc/include/cpu.h @@ -56,6 +56,9 @@ extern int cpu_features2; #define PPC_FEATURE_HAS_FPU 0x08000000 #define PPC_FEATURE_HAS_MMU 0x04000000 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 +#define PPC_FEATURE_HAS_SPE 0x00800000 +#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 +#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 #define PPC_FEATURE_BOOKE 0x00008000 #define PPC_FEATURE_SMT 0x00004000 #define PPC_FEATURE_ARCH_2_05 0x00001000 @@ -70,7 +73,8 @@ extern int cpu_features2; #define PPC_FEATURE_BITMASK \ "\20" \ "\040PPC32\037PPC64\035ALTIVEC\034FPU\033MMU\031UNIFIEDCACHE" \ - "\020BOOKE\017SMT\015ARCH205\013DFP\011ARCH206\010VSX" + "\030SPE\027SPESFP\026DPESFP\020BOOKE\017SMT\015ARCH205\013DFP" \ + "\011ARCH206\010VSX" #define PPC_FEATURE2_BITMASK \ "\20" \ "\040ARCH207\037HTM\032VCRYPTO" diff --git a/sys/powerpc/powerpc/cpu.c b/sys/powerpc/powerpc/cpu.c index 859ff4aece41..c9592e0567f1 100644 --- a/sys/powerpc/powerpc/cpu.c +++ b/sys/powerpc/powerpc/cpu.c @@ -180,9 +180,12 @@ static const struct cputab models[] = { { "Motorola PowerPC 8245", MPC8245, REVFMT_MAJMIN, PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, { "Freescale e500v1 core", FSL_E500v1, REVFMT_MAJMIN, - PPC_FEATURE_BOOKE, 0, cpu_booke_setup }, + PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_SPE | PPC_FEATURE_HAS_EFP_SINGLE, + 0, cpu_booke_setup }, { "Freescale e500v2 core", FSL_E500v2, REVFMT_MAJMIN, - PPC_FEATURE_BOOKE, 0, cpu_booke_setup }, + PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_SPE | + PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, 0, + cpu_booke_setup }, { "Freescale e500mc core", FSL_E500mc, REVFMT_MAJMIN, PPC_FEATURE_BOOKE | PPC_FEATURE_HAS_FPU, 0, cpu_booke_setup }, { "Freescale e5500 core", FSL_E5500, REVFMT_MAJMIN, |