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| author | Ed Maste <emaste@FreeBSD.org> | 2015-05-07 16:56:20 +0000 |
|---|---|---|
| committer | Ed Maste <emaste@FreeBSD.org> | 2015-05-07 16:56:20 +0000 |
| commit | 185bf88e3348a5d61c95f7b905418e27a732720d (patch) | |
| tree | a31593b166f02e2789e9c86159ed7072208ac0f6 | |
| parent | 654bdb5abb730294aad5ed3916c106dc9bfaa536 (diff) | |
| download | src-185bf88e3348a5d61c95f7b905418e27a732720d.tar.gz src-185bf88e3348a5d61c95f7b905418e27a732720d.zip | |
Correct PL310_POWER_CTRL offset
Offet for the power control register was specified incorrectly (it had
the same value as the prefetch control register.) This change corrects
the offset value to 0xF80, per the ARM PL310 documentation.
Submitted by: Steve Kiernan <stevek@juniper.net>
Obtained from: Juniper Networks, Inc.
Notes
Notes:
svn path=/head/; revision=282586
| -rw-r--r-- | sys/arm/include/pl310.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/arm/include/pl310.h b/sys/arm/include/pl310.h index f7c75e9f9a54..fd75d44ad7a1 100644 --- a/sys/arm/include/pl310.h +++ b/sys/arm/include/pl310.h @@ -133,7 +133,7 @@ #define PREFETCH_CTRL_DATA_PREFETCH (1 << 28) #define PREFETCH_CTRL_INSTR_PREFETCH (1 << 29) #define PREFETCH_CTRL_DL (1 << 30) -#define PL310_POWER_CTRL 0xF60 +#define PL310_POWER_CTRL 0xF80 #define POWER_CTRL_ENABLE_GATING (1 << 0) #define POWER_CTRL_ENABLE_STANDBY (1 << 1) |