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| author | Andrew Turner <andrew@FreeBSD.org> | 2021-12-20 13:42:15 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2021-12-20 13:58:36 +0000 |
| commit | c399283c71e310e1573e8d27f9cb9d27a4ea3376 (patch) | |
| tree | ffe6377e1ccd817bf4c0811859bf4656902da08f /.github | |
| parent | c1381f07f61a66979f1569995f37f2a0413c0413 (diff) | |
| download | src-c399283c71e310e1573e8d27f9cb9d27a4ea3376.tar.gz src-c399283c71e310e1573e8d27f9cb9d27a4ea3376.zip | |
Add an loader command on arm64 to sync the cache
On boot we don't need to perform any CPU cache management when the IDC
and DIC fields in the ctr_el0 register are set. Add a command to tell
loader to ignore these fields. This could be useful, for example, if the
hardware is misreporting the values and we are missing a quirk to enable
it.
It is not expected this will be needed, but is only intended as a
workaround to ensure the kernel can still boot.
Sponsored by: The FreeBSD Foundation
Diffstat (limited to '.github')
0 files changed, 0 insertions, 0 deletions