From c746f80ee3f88d57af169e9eb2e66ccbdf659d5f Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Thu, 28 Apr 2011 11:13:26 +0000 Subject: Add the IP2 DDR flush handlers. These aren't yet used in the interrupt handler path but should be. --- sys/mips/atheros/ar724x_chip.c | 9 ++++++++- sys/mips/atheros/ar724xreg.h | 1 + sys/mips/atheros/ar91xx_chip.c | 9 ++++++++- 3 files changed, 17 insertions(+), 2 deletions(-) (limited to 'sys') diff --git a/sys/mips/atheros/ar724x_chip.c b/sys/mips/atheros/ar724x_chip.c index 70192de57df2..75c5b38bded3 100644 --- a/sys/mips/atheros/ar724x_chip.c +++ b/sys/mips/atheros/ar724x_chip.c @@ -146,6 +146,13 @@ ar724x_chip_ddr_flush_ge1(void) ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1); } +static void +ar724x_chip_ddr_flush_ip2(void) +{ + ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE); +} + + static uint32_t ar724x_chip_get_eth_pll(unsigned int mac, int speed) { @@ -207,6 +214,6 @@ struct ar71xx_cpu_def ar724x_chip_def = { &ar724x_chip_ddr_flush_ge0, &ar724x_chip_ddr_flush_ge1, &ar724x_chip_get_eth_pll, - NULL, /* ar71xx_chip_irq_flush_ip2 */ + &ar724x_chip_ddr_flush_ip2, &ar724x_chip_init_usb_peripheral }; diff --git a/sys/mips/atheros/ar724xreg.h b/sys/mips/atheros/ar724xreg.h index ab83e0028670..68dda9cd2f2b 100644 --- a/sys/mips/atheros/ar724xreg.h +++ b/sys/mips/atheros/ar724xreg.h @@ -59,6 +59,7 @@ #define AR7240_OHCI_BASE 0x1b000000 #define AR7240_OHCI_SIZE 0x01000000 #define AR724X_DDR_REG_FLUSH_USB (AR71XX_DDR_CONFIG + 0x84) +#define AR724X_DDR_REG_FLUSH_PCIE (AR71XX_DDR_CONFIG + 0x88) #define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000C0000) #define AR724X_PCI_CRP_SIZE 0x100 diff --git a/sys/mips/atheros/ar91xx_chip.c b/sys/mips/atheros/ar91xx_chip.c index e44948afe913..9cf60bc86987 100644 --- a/sys/mips/atheros/ar91xx_chip.c +++ b/sys/mips/atheros/ar91xx_chip.c @@ -174,6 +174,13 @@ ar91xx_chip_ddr_flush_ge1(void) ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1); } +static void +ar91xx_chip_ddr_flush_ip2(void) +{ + ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC); +} + + static uint32_t ar91xx_chip_get_eth_pll(unsigned int mac, int speed) { @@ -211,6 +218,6 @@ struct ar71xx_cpu_def ar91xx_chip_def = { &ar91xx_chip_ddr_flush_ge0, &ar91xx_chip_ddr_flush_ge1, &ar91xx_chip_get_eth_pll, - NULL, + &ar91xx_chip_ddr_flush_ip2, &ar91xx_chip_init_usb_peripheral, }; -- cgit v1.2.3