From 3f3f5d85c5638e287ecb76cc4637ab02b5d8db15 Mon Sep 17 00:00:00 2001 From: Andrew Rybchenko Date: Fri, 30 Nov 2018 07:07:43 +0000 Subject: sfxge(4): modify phy caps to indicate FEC request The capability bits to request FEC modes are implicitly valid when the corresponding FEC mode is a supported capability. Drivers expect that it is only valid to advertise those capabilities explicitly marked as supported. The capabilities reported by firmware is modified with the implicit capabilities to present the explicit model to drivers. Submitted by: Richard Houldsworth Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18270 --- sys/dev/sfxge/common/ef10_nic.c | 15 +++++++++++++++ sys/dev/sfxge/common/efx_phy.c | 8 +------- 2 files changed, 16 insertions(+), 7 deletions(-) (limited to 'sys/dev/sfxge/common') diff --git a/sys/dev/sfxge/common/ef10_nic.c b/sys/dev/sfxge/common/ef10_nic.c index 28d27a8a3428..46a4d0f6e1ee 100644 --- a/sys/dev/sfxge/common/ef10_nic.c +++ b/sys/dev/sfxge/common/ef10_nic.c @@ -1799,6 +1799,21 @@ ef10_nic_board_cfg( if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0) goto fail6; + /* + * Firmware with support for *_FEC capability bits does not + * report that the corresponding *_FEC_REQUESTED bits are supported. + * Add them here so that drivers understand that they are supported. + */ + if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_BASER_FEC)) + epp->ep_phy_cap_mask |= + (1u << EFX_PHY_CAP_BASER_FEC_REQUESTED); + if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_RS_FEC)) + epp->ep_phy_cap_mask |= + (1u << EFX_PHY_CAP_RS_FEC_REQUESTED); + if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_25G_BASER_FEC)) + epp->ep_phy_cap_mask |= + (1u << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED); + /* Obtain the default PHY advertised capabilities */ if ((rc = ef10_phy_get_link(enp, &els)) != 0) goto fail7; diff --git a/sys/dev/sfxge/common/efx_phy.c b/sys/dev/sfxge/common/efx_phy.c index 460255187b22..88a32c26abe7 100644 --- a/sys/dev/sfxge/common/efx_phy.c +++ b/sys/dev/sfxge/common/efx_phy.c @@ -221,11 +221,6 @@ efx_phy_adv_cap_get( } } -#define EFX_PHY_CAP_FEC_REQ_MASK \ - (1U << EFX_PHY_CAP_BASER_FEC_REQUESTED) | \ - (1U << EFX_PHY_CAP_RS_FEC_REQUESTED) | \ - (1U << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED) - __checkReturn efx_rc_t efx_phy_adv_cap_set( __in efx_nic_t *enp, @@ -239,8 +234,7 @@ efx_phy_adv_cap_set( EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); - /* Ignore don't care bits of FEC (FEC EFX_PHY_CAP_*_REQUESTED) */ - if ((mask & ~(epp->ep_phy_cap_mask | EFX_PHY_CAP_FEC_REQ_MASK)) != 0) { + if ((mask & ~epp->ep_phy_cap_mask) != 0) { rc = ENOTSUP; goto fail1; } -- cgit v1.2.3