From d17fea9f4160084012c9596029dfeba3220a5ff3 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sat, 1 Dec 2018 15:41:24 +0000 Subject: Vendor import of llvm release_70 branch r348011: https://llvm.org/svn/llvm-project/llvm/branches/release_70@348011 --- lib/Target/Mips/Mips64r6InstrInfo.td | 3 +++ 1 file changed, 3 insertions(+) (limited to 'lib/Target/Mips/Mips64r6InstrInfo.td') diff --git a/lib/Target/Mips/Mips64r6InstrInfo.td b/lib/Target/Mips/Mips64r6InstrInfo.td index 9df802cc30b9..ac223bc77256 100644 --- a/lib/Target/Mips/Mips64r6InstrInfo.td +++ b/lib/Target/Mips/Mips64r6InstrInfo.td @@ -301,6 +301,9 @@ def : MipsPat<(select (i32 (seteq i32:$cond, immz)), immz, i64:$f), // Patterns used for matching away redundant sign extensions. // MIPS32 arithmetic instructions sign extend their result implicitly. +def : MipsPat<(i64 (sext (i32 (mul GPR32:$src, GPR32:$src2)))), + (INSERT_SUBREG (i64 (IMPLICIT_DEF)), + (MUL_R6 GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6; def : MipsPat<(i64 (sext (i32 (sdiv GPR32:$src, GPR32:$src2)))), (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (DIV GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6; -- cgit v1.2.3