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* The callback takes a void *, not a caddr_t * (sic).Warner Losh2009-03-031-2/+2
| | | | | | | Except for the bb callback, which takes a caddr_t and not a caddr_t *. Notes: svn path=/head/; revision=189317
* Allocating 2 MSI messages do not seem to work on certain controllersPyun YongHyeon2009-02-111-1/+1
| | | | | | | | | | so use just 1 MSI message. This fixes regression introduced in r188381. Tested by: many Notes: svn path=/head/; revision=188474
* Destroy TX tag outside of loop scope.Max Khon2009-02-091-1/+1
| | | | | | | | Found with: Coverity Prevent(tm) CID: 3886 Notes: svn path=/head/; revision=188392
* - Add support for 8110SCe part. Some magic registers were taken fromJung-uk Kim2009-01-201-4/+4
| | | | | | | | | | Linux driver. - Swap hardware revisions for 8110S and 8169S as Linux driver claims. Reviewed by: yongari (early version) Notes: svn path=/head/; revision=187483
* Retire RL_FLAG_INVMAR bit to match its comment and reality.Jung-uk Kim2009-01-201-1/+0
| | | | Notes: svn path=/head/; revision=187482
* Sometimes RTL8168B seems to take long time to access GMII registersPyun YongHyeon2009-01-191-0/+1
| | | | | | | | | | | in device attach phase. Double GMII register access timeout value to fix the issue. Reported by: wkoszek Tested by: wkoszek Notes: svn path=/head/; revision=187417
* Since we don't request reset for rlphy(4), the link state 'UP'Pyun YongHyeon2008-12-221-0/+2
| | | | | | | | | | | | event from mii(4) may not be delivered if valid link was already established. To address the issue, check current link state after driving MII_TICK. This should fix a regression introduced in r184245. PR: kern/129647 Notes: svn path=/head/; revision=186390
* It seems that RealTek PCIe controllers require an explicit Tx pollPyun YongHyeon2008-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | command whenever Tx completion interrupt is raised. The Tx poll bit is cleared when all packets waiting to be transferred have been processed. This means the second Tx poll command can be silently ignored as the Tx poll bit could be still active while processing of previous Tx poll command is in progress. To address the issue re(4) used to invoke the Tx poll command in Tx completion handler whenever it detects there are pending packets in TxQ. However that still does not seem to completely eliminate watchdog timeouts seen on RealTek PCIe controllers. To fix the issue kick Tx poll command only after Tx completion interrupt is raised as this would indicate Tx is now idle state such that it can accept new Tx poll command again. While here apply this workaround for PCIe based controllers as other controllers does not seem to have this limitation. Tested by: Victor Balada Diaz < victor <> bsdes DOT net > Notes: svn path=/head/; revision=186214
* For RTL8168C SPIN2 controllers, make sure to take the controllerPyun YongHyeon2008-12-171-0/+3
| | | | | | | | | | | out of sleep mode prior to accessing to PHY. This should fix device attach failure seen on these controllers. Also enable the sleep mode when device is put into sleep state. PR: kern/123123, kern/123053 Notes: svn path=/head/; revision=186210
* By default assume a 8139 chip if the EEPROM contents prove inconclusive. TheWilko Bulte2008-12-151-3/+9
| | | | | | | | | | | | | | same LOM hardware with goofed-up EEPROM programming also needed reading the Ethernet address from the chips registers as the EEPROM did not have a sensible address programmed. Patch developed by: pyun@ Funky hardware on loan: www.id-it.nl MFC after: 2 weeks Notes: svn path=/head/; revision=186142
* Make WOL work on RTL8168B. This controller seems to requirePyun YongHyeon2008-12-111-0/+1
| | | | | | | | | explicit command to enable Rx MAC prior to entering D3. Tested by: Cyrus Rahman <crahman <> gmail DOT com> Notes: svn path=/head/; revision=185903
* Don't access undocumented register 0x82 on controllers thatPyun YongHyeon2008-12-111-0/+2
| | | | | | | | | | have no such register. While here clear undocumented PHY register 0x0B for RTL8110S. Obtained from: RealTek FreeBSD driver Notes: svn path=/head/; revision=185901
* Newer RealTek controllers requires setting stop request bit toPyun YongHyeon2008-12-111-0/+2
| | | | | | | terminate active Tx/Rx operation. Notes: svn path=/head/; revision=185900
* o Implemented miibus_statchg handler. It detects whether re(4)Pyun YongHyeon2008-12-081-0/+1
| | | | | | | | | | | | | | | | | | | established a valid link or not. In miibus_statchg handler add a check for established link is valid one for the controller(e.g. 1000baseT is not a valid link for fastethernet controllers.) o Added a flag RE_FLAG_FASTETHER to mark fastethernet controllers. o Added additional check to know whether we've really encountered watchdog timeouts or missed Tx completion interrupts. This change may help to track down the cause of watchdog timeouts. o In interrupt handler, removed a check for link state change interrupt. Not all controllers have the bit and re(4) did not rely on the event for a long time. In addition, re(4) didn't request the interrupt in RL_IMR register. Tested by: rpaulo Notes: svn path=/head/; revision=185753
* Update if_iqdrops instead of if_ierrors when m_devget(9) fails.Pyun YongHyeon2008-12-031-7/+4
| | | | Notes: svn path=/head/; revision=185575
* Add 8168D support.Pyun YongHyeon2008-12-021-0/+1
| | | | | | | Submitted by: Andrew < andrewwtulloch <> gmail DOT com > Notes: svn path=/head/; revision=185542
* Move mn over. One of the last stragglers in sys/pci. There's noWarner Losh2008-11-021-1450/+0
| | | | | | | module built for this hardware, so no changes needed. Notes: svn path=/head/; revision=184562
* Make RL_TWISTER_ENABLE a tunable/sysctl. Eliminate it as an option.Warner Losh2008-11-022-26/+33
| | | | | | | | | Fix module build. Submitted by: Kostik Belousov Notes: svn path=/head/; revision=184559
* Fix a few typos/spelling errors in my comments from the last commit,Warner Losh2008-11-011-7/+7
| | | | | | | | | plus a few others that had lingered in this driver... Submitted by: "b." bf2006a att yahoo KIBO com Notes: svn path=/head/; revision=184524
* Add RL_TWISTER_ENABLE option. This enables the magic bits to do longWarner Losh2008-10-312-2/+165
| | | | | | | | | | | | cable tuning. This has helped in some installations for hardware deployed by a former employer. Made optional because the lists aren't full of complaints about these cards... even when they were wildly popular. Reviewed by: attilio@, jhb@, trhodes@ (all an older version of the patch) Notes: svn path=/head/; revision=184515
* Implement miibus_statchg handler. It detects whether rl(4)Pyun YongHyeon2008-10-251-0/+34
| | | | | | | | | | | established a valid link or not. In rl_start_locked, don't try to send packets unless we have valid link. While I'm here add a check that verifies whether driver can accept Tx requests by inspecting IFF_DRV_OACTIVE/IFF_DRV_RUNNING flag. Notes: svn path=/head/; revision=184245
* After sending stop command to MAC, give hardware chance to drainPyun YongHyeon2008-10-251-0/+8
| | | | | | | active DMA operation. Notes: svn path=/head/; revision=184243
* Make rl_init_locked() call rl_reset. This will put hardware intoPyun YongHyeon2008-10-251-7/+4
| | | | | | | sane state after resume/watchdog timeouts. Notes: svn path=/head/; revision=184242
* Don't rearm watchdog timer in rl_txeof(). The watchdog timer wasPyun YongHyeon2008-10-251-2/+0
| | | | | | | | already set in rl_start_locked(). Touching the watchdog timer in other places will hide the root cause of watchdog timeouts. Notes: svn path=/head/; revision=184241
* Various bus_dma(9) fixes.Pyun YongHyeon2008-10-252-120/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - The hardware does not support DAC so limit DMA address space to 4GB. - Removed BUS_DMA_ALLOC_NOW flag. - Created separated Tx buffer and Rx buffer DMA tags. Previously it used to single DMA tag and it was not possible to specify different DMA restrictions. - Apply 4 bytes alignment limitation of Tx buffer. - Apply 8 bytes alignment limitation of Rx buffer. - Tx side bus_dmamap_load_mbuf_sg(9) support. - Preallocate Tx DMA maps as creating DMA maps take very long time on architectures that require real DMA maps. - Adjust guard buffer size to 1522 + 8 as it should include VLAN and additional reserved bytes in Rx buffer. - Plug memory leak in device detach. Previously wrong buffer address was used to free allocated memory. - Added rl_list_rx_init() to clear Rx buffer and cleared the buffer. - Don't destroy DMA maps in rl_txeof() as the DMA map should be reused. There is no reason to destroy/recreate the DMA maps in this driver. - Removed rl_dma_map_rxbuf()/rl_dma_map_txbuf() callbacks. - The hardware does not support descriptor based DMA on Tx side and the Tx buffer address should be aligned on 4 bytes boundary as well as manual padding for short frames. Because of this hardware limitation rl(4) always used to invoke m_defrag(9) to get a 4 bytes aligned single buffer. However m_defrag(9) takes a lot of CPU cycles on slow machines and not all packets need the help of m_defrag(9). Armed with the information, don't invoke m_defrag(9) if the following conditions are true. 1. Buffer is not fragmented. 2. Buffer is aligned on 4 bytes boundary. 3. Manual padding is not necessary. 4. Or padding is necessary but upper stack passed a writable buffer and the space needed for padding is satisfied. This change combined with preallocated DMA maps greatly increased Tx performance of driver on sparc64. - Moved bus_dmamap_sync(9) in rl_start_locked() to rl_encap() and corrected memory synchronization operation specifier of bus_dmamap_sync(9). - Removed bus_dmamap_unload(9) in rl_stop(). There is no need to reload/unload Rx buffer as rl(4) always have to copy from the buffer. It just needs proper bus_dmamap_sync(9) calls before copying the received frame. With this change rl(4) should work on systems with more than 4GB memory. PR: kern/128143 Notes: svn path=/head/; revision=184240
* Move wb driver from sys/pci to sys/dev/wb.Warner Losh2008-08-142-2312/+0
| | | | Notes: svn path=/head/; revision=181741
* Move pcn driver from sys/pci to sys/dev/pcn.Warner Losh2008-08-142-2057/+0
| | | | Notes: svn path=/head/; revision=181740
* Move the ste driver from sys/pci to sys/dev/ste.Warner Losh2008-08-142-2302/+0
| | | | Notes: svn path=/head/; revision=181739
* Move the tl driver form sys/pci to sys/dev/tl.Warner Losh2008-08-142-2955/+0
| | | | Notes: svn path=/head/; revision=181738
* Move sis to sys/dev/sis for consistency.Warner Losh2008-08-102-2802/+0
| | | | Notes: svn path=/head/; revision=181524
* Move the xl driver form sys/pci to sys/dev/xl for consistency.Warner Losh2008-08-102-4112/+0
| | | | Notes: svn path=/head/; revision=181522
* Add locking to the various iicbus(4) bridge drivers:John Baldwin2008-08-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425) Notes: svn path=/head/; revision=181303
* The number of bits reserved for MSS in RealTek controllers isPyun YongHyeon2008-08-041-0/+8
| | | | | | | | | | 11bits. This limits the maximum interface MTU size in TSO case as upper stack should not generate TCP segments with MSS greater than the limit. Armed with this information, disable TSO if interface MTU is greater than the limit. Notes: svn path=/head/; revision=181270
* Set all of the "optimum performance" PHY registers for the 15D parts asJohn Baldwin2008-07-301-10/+8
| | | | | | | | | | | | well as the 15C since it seems to be required in practice. The Linux natsemi.c driver mostly does this as well. PR: kern/112179 Submitted by: Mark Willson mark - hydrus org uk MFC after: 1 week Notes: svn path=/head/; revision=181002
* SIS_SETBIT() already does a read/modify/write operation, so there isn'tJohn Baldwin2008-07-301-2/+1
| | | | | | | | | a reason to read the register twice. MFC after: 1 week Notes: svn path=/head/; revision=181000
* Add driver support for RTL8102E and RTL8102EL which is the secondPyun YongHyeon2008-07-091-0/+2
| | | | | | | | | | | | generation of RTL810x PCIe fast ethernet controller. Note, Tx/Rx descriptor format is different from that of first generation of RTL8101E series. Jumbo frame is not supported for RTL810x family. Tested by: NAGATA Shinya ( maya AT negeta DOT com ) Notes: svn path=/head/; revision=180377
* Add a new RTL8169 variant, 8169SB(L)/8110SB(L).Pyun YongHyeon2008-07-021-0/+1
| | | | | | | | Reported by: nork Tested by: nork Notes: svn path=/head/; revision=180177
* Add basic support for RTL8168C, RTL8168CP, RTL8111C and RTL8111CP.Pyun YongHyeon2008-07-021-0/+24
| | | | | | | | | | | | | | | | | | | ATM Tx/Rx checksum offload is supported but TSO and jumbo frame is not yet supported. Because these newer controllers use different descriptor formats, a flag RL_FLAG_DESCV2 flag was introduced to handle that case in Tx/Rx handler. Also newer controllers seems to require to not touch 'enable Tx/Rx bit' in RL_CPLUS_CMD register so don't blindly try to set that bits. Note, it seems that there is still power-saving related issue where driver fails to attach PHY. Rebooting seems to fix that issue but number of required reboots varys. Many thanks to users that helped during developement. I really appreciate their patient and test/feedbacks. Notes: svn path=/head/; revision=180176
* Instead of allocating variables for each events/hardware flags, usePyun YongHyeon2008-07-021-2/+6
| | | | | | | | | | | | a dedicated flag that represents controller capabilities/events. This will simplify many part of code that requires different workaround for each controller revisions and will enhance readability. While I'm here move PHY wakeup code up before mii_phy_probe() which seems to help to wake PHY in some cases. Notes: svn path=/head/; revision=180171
* Switch to memory space register mapping over IO space. If thatPyun YongHyeon2008-07-021-0/+2
| | | | | | | mapping fails fall back to traditional IO space access. Notes: svn path=/head/; revision=180169
* Add support for VT8237 ISA bridge.Oleksandr Tymoshenko2008-06-221-0/+7
| | | | | | | | PR: kern/120714 Event: Bugathon#5 Notes: svn path=/head/; revision=179933
* Add the SMB functionality for the MCP65 chipset I happen toJoerg Wunsch2008-06-181-0/+3
| | | | | | | have in my new motherboard. Notes: svn path=/head/; revision=179860
* Add another 8139D variant.Remko Lodder2008-06-162-0/+3
| | | | | | | | | | PR: 124622 Submitted by: Evgeny Zhirnov <jirnov at gmail dot com> Approved by: imp (mentor, implicit) MFC after: 3 days Notes: svn path=/head/; revision=179831
* - Use bus_foo() rather than bus_space_foo() and remove bus space tag/handleJohn Baldwin2008-06-065-33/+13
| | | | | | | | | from softc. - Mark interrupt handlers MPSAFE as these drivers have been locked for a while. Notes: svn path=/head/; revision=179622
* Remove unused 'xl_unit' member from softc.John Baldwin2008-05-282-2/+0
| | | | Notes: svn path=/head/; revision=179378
* - Set sc->dev to the new-bus device_t so all the device_printf()s work.John Baldwin2008-05-121-1/+3
| | | | | | | | | | - Add a missing newline to a printf. MFC after: 1 week Submitted by: Andriy Gapon avg <> icyb.net.ua Notes: svn path=/head/; revision=178972
* It seems that RealTek 8129/8139 chip reports invalid length ofPyun YongHyeon2008-04-101-3/+5
| | | | | | | | | | | | | | | | | | | received frame under certain conditions. wpaul said the length 0xfff0 is special meaning that indicates hardware is in the process of copying a packet into host memory. But it seems there are other cases that hardware is busy or stuck in bad situation even if the received frame length is not 0xfff0. To work-around this condition, add a check that verifys that recevied frame length is in valid range. If received length is out of range reinitialize hardware to recover from stuck condition. Reported by: Mike Tancsa ( mike AT sentex DOT net ) Tested by: Mike Tancsa Obtained from: OpenBSD MFC after: 1 week Notes: svn path=/head/; revision=178054
* Padding more bytes than necessary one broke another variants ofPyun YongHyeon2008-03-311-0/+6
| | | | | | | | | | | PCIe RealTek chips. Only pad IP packets if the payload is less than 28 bytes. Obtained from: NetBSD PR: kern/122221 Notes: svn path=/head/; revision=177771
* Replaced the misleading uses of a historical artefact M_TRYWAIT with M_WAIT.Ruslan Ermilov2008-03-251-26/+5
| | | | | | | | | | | | | Removed dead code that assumed that M_TRYWAIT can return NULL; it's not true since the advent of MBUMA. Reviewed by: arch There are ongoing disputes as to whether we want to switch to directly using UMA flags M_WAITOK/M_NOWAIT for mbuf(9) allocation. Notes: svn path=/head/; revision=177599
* - Take advantage of bus_dmamap_load_mbuf_sg(9).Marius Strobl2008-03-242-94/+71
| | | | | | | | | | | | | | | | | | - Take advantage of m_collapse(9). - Sync with other NIC drivers and prepend a TX mbuf if the first attempt to load it fails with an error other than EFBIG and stop trying instead of freeing it and keeping on trying to enqueue more mbufs. Also ensure the driver queue isn't empty before trying to enqueue mbufs in order to reduce locking operations. - In xl_ifmedia_upd() add a missing XL_UNLOCK(). [1] - Const'ify the xl_devs array. - Remove an outdated comment. PR: 113406 [1] MFC after: 1 month Notes: svn path=/head/; revision=177562
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