aboutsummaryrefslogtreecommitdiff
path: root/sys/dev/pci
Commit message (Collapse)AuthorAgeFilesLines
...
* For subtractively decoding bridges, don't try to grow windows but passMarius Strobl2012-06-271-2/+2
| | | | | | | | | | | | | the request up the tree in order to be on the safe side. Growing windows in this case would mean to switch resources to positive decoding and it's unclear how to correctly handle this. At least with ALi/ULi M5249 PCI-PCI bridges, this also just doesn't work out of the box. Reviewed by: jhb MFC after: 3 days Notes: svn path=/head/; revision=237673
* Add a 'wmask' variable to hold the expression '(1ul << w->step) - 1' inJohn Baldwin2012-06-191-9/+8
| | | | | | | | | | pcib_grow_window(). This makes the code slightly easier to read and prevents the type of bug fixed in r237271. MFC after: 3 days Notes: svn path=/head/; revision=237272
* Fix another off-by-one error in the previous fix so that the new startJohn Baldwin2012-06-191-2/+2
| | | | | | | | address is properly aligned. While here, use a simpler expression to align the new end address that we use elsewhere for aligning the end. Notes: svn path=/head/; revision=237271
* Fix a couple of bugs that prevented windows in PCI-PCI bridges fromJohn Baldwin2012-06-131-3/+3
| | | | | | | | | | | | | growing "downward" (moving the start address down). First, an off by one error caused the end address to be moved down an extra alignment chunk unnecessarily. Second, when aligning the new candidate starting address, the wrong bits were masked off. Tested by: Andrey Zonov andrey zonov org MFC after: 3 days Notes: svn path=/head/; revision=237008
* Add 'drmn' device as another drm child, to allow drm2 drivers to liveKonstantin Belousov2012-05-231-0/+1
| | | | | | | | | | in parallel with drm1. Sponsored by: The FreeBSD Foundation MFC after: 1 month Notes: svn path=/head/; revision=235846
* Only check to see if a memory resource is a PCI ROM BAR when activatingJohn Baldwin2012-05-231-2/+2
| | | | | | | | | | | | and deactivating PCI resources. Previously, if a device had more than 48 MSI interrupts, then activating message 48 (which has a rid == PCIR_BIOS) would incorrectly try to enable the PCI ROM BAR. Tested by: Olivier Cinquin ocinquin uci edu MFC after: 3 days Notes: svn path=/head/; revision=235833
* Fix couple of style nits.Jung-uk Kim2012-03-291-2/+2
| | | | Notes: svn path=/head/; revision=233678
* Revert r233662 and generalize the hack. Writing zero to BAR actually doesJung-uk Kim2012-03-291-41/+6
| | | | | | | | | | | | not disable it and it is even harmful as hselasky found out. Historically, this code was originated from (OLDCARD) CardBus driver and later leaked into PCI driver when CardBus was newbus'ified and refactored with PCI driver. However, it is not really necessary even for CardBus. Reviewed by: hselasky, imp, jhb Notes: svn path=/head/; revision=233677
* Use a more proper fix for enabling HT MSI mapping windows on Host-PCIJohn Baldwin2012-03-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | bridges. Rather than blindly enabling the windows on all of them, only enable the window when an MSI interrupt is enabled for a device behind the bridge, similar to what already happens for HT PCI-PCI bridges. To implement this, each x86 Host-PCI bridge driver has to be able to locate it's actual backing device on bus 0. For ACPI, use the _ADR method to find the slot and function of the device. For the non-ACPI case, the legacy(4) driver already scans bus 0 looking for Host-PCI bridge devices. Now it saves the slot and function of each bridge that it finds as ivars that the Host-PCI bridge driver can then use in its pcib_map_msi() method. This fixes machines where non-MSI interrupts were broken by the previous round of HT MSI changes. Tested by: bapt MFC after: 1 week Notes: svn path=/head/; revision=233676
* Fix for boot issue: Don't disable BARs on AGP devices. In general:Hans Petter Selasky2012-03-291-0/+21
| | | | | | | | | | | | | | Don't disable BARs on any PCI display devices, because doing that can sometimes cause the main memory bus to stop working, causing all memory reads to return nothing but 0xFFFFFFFF, even though the memory location was previously written. After a while a privileged instruction fault will appear and then nothing more can be debugged. The reason for this behaviour is unknown. MFC after: 1 week Notes: svn path=/head/; revision=233662
* Add a PCI quirk to ignore PCI map registers from configuration space.Jung-uk Kim2012-03-141-8/+36
| | | | | | | | | | | | | | | | | For example, some BIOS for AMD SB600 south bridge may map HPET MMIO base address as a memory BAR for SMBus controller depending on a PM register configuration. Before r231161 (and r232086, subsequent MFC to stable/9), it was not fatal but hpet(4) just failed to attach. Since we probe and attach HPET earlier than PCI devices now, it caused unfortunate hard lockup. With this patch, it does not hang any more and HPET works at the same time. Clean up some style nits while I am in the neighborhood. PR: kern/165647 Reviewed by: jhb MFC after: 3 days Notes: svn path=/head/; revision=232991
* Save more of config space for PCI Express and PCI-X devices.Alexander Kabaev2012-03-083-0/+127
| | | | | | | | | | | | | | | Expand pci_save_state and pci_restore_state to save more of the config state for PCI Express and PCI-X devices. Various writable control registers are present in PCI Express that can potentially be lost over suspend/resume cycle. This change is modeled after similar functionality in Linux. Reviewed by: wlosh,jhb MFC after: 1 month Notes: svn path=/head/; revision=232704
* Remove the PAE-specific 2GB DMA boundary since HEAD now supports a proper 4GJohn Baldwin2012-03-071-11/+0
| | | | | | | boundary for PAE. Notes: svn path=/head/; revision=232670
* Simplify the PCI bus dma tag code a bit. First, don't create a tag atJohn Baldwin2012-03-072-8/+15
| | | | | | | | | | all for platforms that only have 32-bit bus addresses. Second, remove the 'tag_valid' flag from the softc. Instead, if we don't create a tag in pci_attach_common(), just cache the value of our parent's tag so that we always have a valid tag to return. Notes: svn path=/head/; revision=232667
* Expand the set of APIs available for locating PCI capabilities:John Baldwin2012-03-036-7/+163
| | | | | | | | | | | | - pci_find_extcap() is repurposed to be used for fetching PCI-express extended capabilities (PCIZ_* constants in <dev/pci/pcireg.h>). - pci_find_htcap() can be used to locate a specific HyperTransport capability (PCIM_HTCAP_* constants in <dev/pci/pcireg.h>). - Cache the starting location of the PCI-express capability for PCI-express devices in PCI device ivars. Notes: svn path=/head/; revision=232472
* Update the pci_get_vpd_readonly() wrapper to use 'vptr' instead ofJohn Baldwin2012-03-031-2/+2
| | | | | | | | 'identptr' for its last parameter to match the default implementation as well as the method definition in pci_if.m. Notes: svn path=/head/; revision=232465
* Fix a typo.John Baldwin2012-03-031-1/+1
| | | | Notes: svn path=/head/; revision=232464
* - Add a bus_dma tag to each PCI bus that is a child of a Host-PCI bridge.John Baldwin2012-03-022-5/+64
| | | | | | | | | | | | | | | | | | The tag enforces a single restriction that all DMA transactions must not cross a 4GB boundary. Note that while this restriction technically only applies to PCI-express, this change applies it to all PCI devices as it is simpler to implement that way and errs on the side of caution. - Add a softc structure for PCI bus devices to hold the bus_dma tag and a new pci_attach_common() routine that performs actions common to the attach phase of all PCI bus drivers. Right now this only consists of a bootverbose printf and the allocate of a bus_dma tag if necessary. - Adjust all PCI bus drivers to allocate a PCI bus softc and to call pci_attach_common() from their attach routines. MFC after: 2 weeks Notes: svn path=/head/; revision=232403
* Add pci_save_state() and pci_restore_state() wrappers aroundJohn Baldwin2012-03-012-0/+21
| | | | | | | | | | | pci_cfg_save() and pci_cfg_restore() for device drivers to use when saving and restoring state (e.g. to handle device-specific resets). Reviewed by: imp MFC after: 2 weeks Notes: svn path=/head/; revision=232360
* Use pci_printf() instead of a home-rolled version in the VPD parsing code.John Baldwin2012-02-291-17/+9
| | | | Notes: svn path=/head/; revision=232318
* - As it turns out, MSI-X is broken for at least LSI SAS1068E when passedMarius Strobl2012-02-141-10/+11
| | | | | | | | | | | | | | | | | | | | | through by VMware so blacklist their PCI-PCI bridge for MSI/MSI-X here. Note that besides currently there not being a quirk type that disables MSI-X only and there's no evidence that MSI doesn't work with the VMware pass-through, it's really questionable whether MSI generally works in that setup as VMware only mention three know working devices [1, p. 4]. Also not that this quirk entry currently doesn't affect the devices emulated by VMware in any way as these don't claim support MSI/MSI-X to begin with. [2] While at it, make the PCI quirk table const and static. - Remove some duplicated empty lines. - Use DEVMETHOD_END. PR: 163812, http://forums.freebsd.org/showthread.php?t=27899 [2] Reviewed by: jhb MFC after: 3 days Notes: svn path=/head/; revision=231621
* Fix a spelling mistake in the surprise link down error constant.John Baldwin2012-01-311-1/+1
| | | | | | | Submitted by: glebius Notes: svn path=/head/; revision=230822
* Add a constant for the PCI-e surprise link down uncorrectable error.John Baldwin2012-01-301-0/+1
| | | | Notes: svn path=/head/; revision=230774
* Properly return success once a matching VPD entry is found inJohn Baldwin2012-01-191-3/+1
| | | | | | | | | | | | pci_get_vpd_readonly_method(). Previously the loop was always running to completion and falling through to failing with ENXIO. PR: kern/164313 Submitted by: Chuck Tuffli chuck tuffli net MFC after: 1 week Notes: svn path=/head/; revision=230340
* Implement BUS_ADD_CHILD() for the isab(4) driver. It already callsJohn Baldwin2011-12-141-0/+1
| | | | | | | | | | bus_generic_probe() and bus_generic_attach() to handle drivers that add new children via identify methods. MFC after: 1 week Notes: svn path=/head/; revision=228496
* Add a constant for the Advisory Non-Fatal Error bit in AER corrected errorJohn Baldwin2011-11-301-0/+1
| | | | | | | status and mask. Notes: svn path=/head/; revision=228161
* - There's no need to overwrite the default device method with the defaultMarius Strobl2011-11-223-6/+3
| | | | | | | | | | | | | one. Interestingly, these are actually the default for quite some time (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9) since r52045) but even recently added device drivers do this unnecessarily. Discussed with: jhb, marcel - While at it, use DEVMETHOD_END. Discussed with: jhb - Also while at it, use __FBSDID. Notes: svn path=/head/; revision=227843
* Add missing XHCI early takeover code. The XHCI takeover codeHans Petter Selasky2011-07-221-1/+66
| | | | | | | | | | | | is supposed to disable the BIOS from using the XHCI controller after bootup. Approved by: re (kib) Reported by: Mike Tancsa MFC after: 1 week Notes: svn path=/head/; revision=224269
* Respect the BIOS/firmware's notion of acceptable address ranges for PCIJohn Baldwin2011-07-153-13/+184
| | | | | | | | | | | | | | | | | | | | | | | resource allocation on x86 platforms: - Add a new helper API that Host-PCI bridge drivers can use to restrict resource allocation requests to a set of address ranges for different resource types. - For the ACPI Host-PCI bridge driver, use Producer address range resources in _CRS to enumerate valid address ranges for a given Host-PCI bridge. This can be disabled by including "hostres" in the debug.acpi.disabled tunable. - For the MPTable Host-PCI bridge driver, use entries in the extended MPTable to determine the valid address ranges for a given Host-PCI bridge. This required adding code to parse extended table entries. Similar to the new PCI-PCI bridge driver, these changes are only enabled if the NEW_PCIB kernel option is enabled (which is enabled by default on amd64 and i386). Approved by: re (kib) Notes: svn path=/head/; revision=224069
* PCIB_ALLOC_MSIX() may already fail on the first pass, f.e. when the PCI-PCIMarius Strobl2011-07-131-1/+4
| | | | | | | | | | | | | | bridge is blacklisted. In that case just return from pci_alloc_msix_method(), otherwise we continue without a single MSI-X resource, causing subsequent attempts to use the seemingly available resource to fail or when booting verbose a NULL-pointer dereference of rle->start when trying to print the IRQ in pci_alloc_msix_method(). Reviewed by: jhb MFC after: 1 week Notes: svn path=/head/; revision=223984
* Properly align the end of a candidate back region based on the window'sJohn Baldwin2011-07-121-1/+1
| | | | | | | | | | granularity when growing a PCI-PCI window up. Tested by: dougb MFC after: 3 days Notes: svn path=/head/; revision=223952
* Implement pci_find_class(9), the function to find a pci device by its class.Konstantin Belousov2011-07-092-0/+16
| | | | | | | | | Sponsored by: The FreeBSD Foundation Reviewed by: jhb MFC after: 1 week Notes: svn path=/head/; revision=223885
* Split out host_pcib_get_busno() from the generic PCI-PCI bridge driver toJohn Baldwin2011-06-242-92/+130
| | | | | | | | start a new file that will hold utility APIs used by various Host-PCI bridge drivers and drivers that provide PCI domains. Notes: svn path=/head/; revision=223520
* Minor whitespace and style fixes.John Baldwin2011-06-211-3/+4
| | | | Notes: svn path=/head/; revision=223371
* Fix some off-by-one errors with the ending address of candidate regionsJohn Baldwin2011-06-101-3/+4
| | | | | | | when attempting to grow a window. Notes: svn path=/head/; revision=222930
* More properly handle Cardbus cards that that store their CIS in a BAR afterJohn Baldwin2011-06-061-0/+11
| | | | | | | | | | | | the recent changes to track BAR state explicitly. The code would now attempt to add the same BAR twice in this case. Instead, change this so that it recognizes this case and only adds it once and do not delete the BAR outright after parsing the CIS. Tested by: bschmidt Notes: svn path=/head/; revision=222753
* Renamed PCI_INTERFACE_XHCI to PCIP_SERIALBUS_USB_XHCI and moved itRuslan Ermilov2011-05-171-0/+1
| | | | | | | | | | to <dev/pci/pcireg.h>. Reviewed by: hselasky MFC after: 3 days Notes: svn path=/head/; revision=222018
* Allow direct children of PCI-ISA bridges to allocate resources fromHenrik Brix Andersen2011-05-131-7/+111
| | | | | | | | | | | | | the parent PCI bus. Heavily inspired by jhb@ and a similar implementation present in sys/dev/pci/vga_pci.c. Reviewed by: jhb Approved by: jhb Notes: svn path=/head/; revision=221839
* Reimplement how PCI-PCI bridges manage their I/O windows. Previously theJohn Baldwin2011-05-033-5/+695
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | driver would verify that requests for child devices were confined to any existing I/O windows, but the driver relied on the firmware to initialize the windows and would never grow the windows for new requests. Now the driver actively manages the I/O windows. This is implemented by allocating a bus resource for each I/O window from the parent PCI bus and suballocating that resource to child devices. The suballocations are managed by creating an rman for each I/O window. The suballocated resources are mapped by passing the bus_activate_resource() call up to the parent PCI bus. Windows are grown when needed by using bus_adjust_resource() to adjust the resource allocated from the parent PCI bus. If the adjust request succeeds, the window is adjusted and the suballocation request for the child device is retried. When growing a window, the rman_first_free_region() and rman_last_free_region() routines are used to determine if the front or end of the existing I/O window is free. From using that, the smallest ranges that need to be added to either the front or back of the window are computed. The driver will first try to grow the window in whichever direction requires the smallest growth first followed by the other direction if that fails. Subtractive bridges will first attempt to satisfy requests for child resources from I/O windows (including attempts to grow the windows). If that fails, the request is passed up to the parent PCI bus directly however. The PCI-PCI bridge driver will try to use firmware-assigned ranges for child BARs first and only allocate a "fresh" range if that specific range cannot be accommodated in the I/O window. This allows systems where the firmware assigns resources during boot but later wipes the I/O windows (some ACPI BIOSen are known to do this) to "rediscover" the original I/O window ranges. The ACPI Host-PCI bridge driver has been adjusted to correctly honor hw.acpi.host_mem_start and the I/O port equivalent when a PCI-PCI bridge makes a wildcard request for an I/O window range. The new PCI-PCI bridge driver is only enabled if the NEW_PCIB kernel option is enabled. This is a transition aide to allow platforms that do not yet support bus_activate_resource() and bus_adjust_resource() in their Host-PCI bridge drivers (and possibly other drivers as needed) to use the old driver for now. Once all platforms support the new driver, the kernel option and old driver will be removed. PR: kern/143874 kern/149306 Tested by: mav Notes: svn path=/head/; revision=221393
* Add implementations of BUS_ADJUST_RESOURCE() to the PCI bus driver,John Baldwin2011-05-022-0/+2
| | | | | | | | generic PCI-PCI bridge driver, x86 nexus driver, and x86 Host to PCI bridge drivers. Notes: svn path=/head/; revision=221324
* Only align MSI message groups based on the number of messages beingJohn Baldwin2011-04-271-1/+1
| | | | | | | | | | | | | | allocated, not the maximum number of messages the device supports. The spec only requires the former, and I believe I implemented the latter due to misunderstanding an e-mail. In particular, this fixes an issue where having several devices that all support 16 messages can run out of IDT vectors on x86 even though the driver only uses a single message. Submitted by: Bret Ketchum bcketchum of gmail MFC after: 1 week Notes: svn path=/head/; revision=221138
* Explicitly track the state of all known BARs for each PCI device. The PCIJohn Baldwin2011-03-314-99/+172
| | | | | | | | | | | | | | | | | | | | | bus driver will now remember the size of a BAR obtained during the initial bus scan and use that size when doing lazy resource allocation rather than resizing the BAR. The bus driver will now also report unallocated BARs to userland for display by 'pciconf -lb'. Psuedo-resources that are not BARs (such as the implicit I/O port resources for master/slave ATA controllers) will no longer be listed as BARs in 'pciconf -lb'. During resume, BARs are restored from their new saved state instead of having the raw registers saved and restored across resume. This also fixes restoring BARs at unusual loactions if said BAR has been allocated by a driver. Add a constant for the offset of the ROM BIOS BAR in PCI-PCI bridges and properly handle ROM BIOS BARs in PCI-PCI bridges. The PCI bus now also properly handles the lack of a ROM BIOS BAR in a PCI-Cardbus bridge. Tested by: jkim Notes: svn path=/head/; revision=220195
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls toJohn Baldwin2011-03-231-1/+1
| | | | | | | pci_find_cap() instead. Notes: svn path=/head/; revision=219902
* Rename pci_find_extcap() to pci_find_cap(). PCI now uses the termJohn Baldwin2011-03-222-6/+12
| | | | | | | | | | | | | | "extended capabilities" to refer to the new set of capability structures starting at offset 0x100 in config space for PCI-express devices. For now both function names will still work. I will merge this to older branches to ease driver portability, but 9.0 will ship with a new pci_find_extcap() function that locates extended capabilities instead. Reviewed by: imp MFC after: 1 week Notes: svn path=/head/; revision=219865
* Partially revert previous change. Drop the quirk to disable MSI for HTJohn Baldwin2011-03-181-19/+2
| | | | | | | | | | | chipsets that do not have an HT slave at 0:0:0:0. The Linux quirk is actually specific to Nvidia chipsets and the check I had added was in the wrong place. Prodded by: nathanw Notes: svn path=/head/; revision=219740
* Fix a few issues with HyperTransport devices and MSI interrupts:John Baldwin2011-03-182-4/+44
| | | | | | | | | | | | | | | | | | - Always enable the HyperTransport MSI mapping window for HyperTransport to PCI bridges (these show up as HyperTransport slave devices). The mapping windows in PCI-PCI bridges are enabled by existing code in the PCI-PCI bridge driver as MSI requests propagate up the device tree, but Host-PCI bridges don't really show up in that tree. - If the PCI device at domain 0 bus 0 slot 0 function 0 is not a HyperTransport device, then blacklist MSI on any other HT devices in the system. Linux has a similar quirk. PR: kern/155442 Tested by: Zack Dannar zdannar of gmail MFC after: 1 week Notes: svn path=/head/; revision=219737
* Properly handle BARs bigger than 4G. The '1' was treated as an intJohn Baldwin2011-02-231-3/+3
| | | | | | | | | | | causing the size calculation to be truncated to the size of an int (32-bits on all current architectures). Submitted by: Anish akgupt3 of gmail MFC after: 1 week Notes: svn path=/head/; revision=218968
* Use the preload_fetch_addr() and preload_fetch_size() convenienceMarcel Moolenaar2011-02-131-9/+14
| | | | | | | | | functions to obtain the address and size of the PCI vendor data. Sponsored by: Juniper Networks. Notes: svn path=/head/; revision=218662
* Don't whine about child drivers calling pci_enable_busmaster(). That isJohn Baldwin2010-12-201-4/+0
| | | | | | | | | perfectly normal. MFC after: 1 week Notes: svn path=/head/; revision=216590
* Add device IDs for two more ServerWorks Host-PCI bridges so that we canJohn Baldwin2010-11-251-0/+2
| | | | | | | | | | | read their starting PCI bus number for older systems that do not support ACPI (or have a broken _BBN method). PR: kern/148108 MFC after: 1 week Notes: svn path=/head/; revision=215820
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-20 08:01:37 +0000