| Commit message (Collapse) | Author | Age | Files | Lines |
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Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
Similar commit in current:
(cherry picked from commit 685dc743dc3b)
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Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
Similar commit in current:
(cherry picked from commit 95ee2897e98f)
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Most affect comments, very few have user-visible effects.
Notes:
svn path=/head/; revision=298955
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Notes:
svn path=/head/; revision=271849
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that resides in struct ifnet.
Sponsored by: Nginx, Inc.
Notes:
svn path=/head/; revision=270856
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No functional changes.
MFC after: 2 weeks
Notes:
svn path=/head/; revision=267923
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configs. Switch the BERI_NETFPGA_MDROOT to 64bit by default.
Give we have working interrupts also cleanup the extra polling CFLAGS from
the module Makefile.
MFC after: 2 weeks
Notes:
svn path=/head/; revision=267922
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time by setting NF10BMAC_64BIT and using a REGWTYPE #define to set correct
variable and return value widths.
Adjust comments to indicate the 32 or 64bit register widths.
MFC after: 2 weeks
Notes:
svn path=/head/; revision=267920
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to automatically change as we switch between 32/64bit.
MFC after: 2 weeks
Notes:
svn path=/head/; revision=267919
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macro names, rename val4 to val, and m4 to md.
No functional change.
MFC after: 2 weeks
Notes:
svn path=/head/; revision=267918
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future for nf10bmac(4). Also, add support for and enable RX interrupts.
MFC after: 2 weeks
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svn path=/head/; revision=265766
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on NetFPGA-10G, assign one to the interface by default in a very
similar way.
MFC after: 6 days
X-Easter-Egg-Hunt: yes
Notes:
svn path=/head/; revision=264646
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NetFPGA-10G Embedded CPU Ethernet Core.
The current version operates on a simple PIO based interface connected
to a NetFPGA-10G port.
To avoid confusion: this driver operates on a CPU running on the FPGA,
e.g. BERI/mips, and is not suited for the PCI host interface.
MFC after: 1 week
Relnotes: yes
Sponsored by: DARPA/AFRL
Notes:
svn path=/head/; revision=264601
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