| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed by: mav
Approved by: pjd (mentor)
MFC after: 2 weeks
Notes:
svn path=/head/; revision=250792
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6Gbps PCIe 2.0 x2 SATA controllers, based on Marvell 88SE9235 chips.
MFC after: 1 week
Notes:
svn path=/head/; revision=250185
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That simplifies logic for channels and gives the bus information about what
device actually allocated the tag.
Submitted by: jhb@
Notes:
svn path=/head/; revision=249346
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For now it is just a hypothetical case.
Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
Notes:
svn path=/head/; revision=249089
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device are connected. ATA disks are not using ANs, while the extra register
read operation is quite expensive.
Notes:
svn path=/head/; revision=248704
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extra read from PxCI/PxSACT registers. If only NCQ commands are running, we
don't really need PxCI. If only non-NCQ commands are running we don't need
PxSACT. Mixed set may happen only on controllers with FIS-based switching
when port multiplier is attached, and then we have to read both registers.
MFC after: 1 month
Notes:
svn path=/head/; revision=248698
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Notes:
svn path=/head/; revision=248687
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Sponsored by: The FreeBSD Foundation
Tested by: pho
Submitted by: bf (siis patch)
Notes:
svn path=/head/; revision=248522
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every architecture's busdma_machdep.c. It is done by unifying the
bus_dmamap_load_buffer() routines so that they may be called from MI
code. The MD busdma is then given a chance to do any final processing
in the complete() callback.
The cam changes unify the bus_dmamap_load* handling in cam drivers.
The arm and mips implementations are updated to track virtual
addresses for sync(). Previously this was done in a type specific
way. Now it is done in a generic way by recording the list of
virtuals in the map.
Submitted by: jeff (sponsored by EMC/Isilon)
Reviewed by: kan (previous version), scottl,
mjacob (isp(4), no objections for target mode changes)
Discussed with: ian (arm changes)
Tested by: marius (sparc64), mips (jmallet), isci(4) on x86 (jharris),
amd64 (Fabian Keil <freebsd-listen@fabiankeil.de>)
Notes:
svn path=/head/; revision=246713
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not functional.
PR: kern/174880, kern/174985, kern/175002
MFC after: 1 week
Notes:
svn path=/head/; revision=245875
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Notes:
svn path=/head/; revision=244983
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I am not exactly sure about the naming due to lack of specs on AMD site,
but it is better to have some identification then none at all.
MFC after: 1 month
Notes:
svn path=/head/; revision=244146
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Notes:
svn path=/head/; revision=242719
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Approved by: cperciva
MFC after: 1 week
Notes:
svn path=/head/; revision=241844
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defined in pcireg.h
MFC after: 1 week
Notes:
svn path=/head/; revision=240693
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Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after: 1 week
Notes:
svn path=/head/; revision=240383
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MFC after: 1 week
Notes:
svn path=/head/; revision=239907
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bytes. Zeroes there are incorrect and tend to cause false device ID matches.
Notes:
svn path=/head/; revision=239693
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subdevice ahciem. Emulate SEMB SES device from AHCI LED interface to expose
it to users in form of ses(4) CAM device. If we ever see AHCI controllers
supporting SES of SAF-TE over I2C as described by specification, they should
fit well into this new picture.
Sponsored by: iXsystems, Inc.
Notes:
svn path=/head/; revision=238805
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Return PROTO_ATA protocol in response to XPT_PATH_INQ.
smartmontools uses it to identify ATA devices and I don't know any other
place now where it is important. It could probably use XPT_GDEV_TYPE
instead for more accurate protocol information, but let it live for now.
Reported by: matthew
MFC after: 3 days
Notes:
svn path=/head/; revision=236847
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Marvell 88SE9230 was confirmed to work, the rest two are just guessed.
MFC after: 1 week
Notes:
svn path=/head/; revision=236737
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until transport will do some probe actions (at least soft reset).
Make ATA/SATA SIMs to not report bogus and confusing PROTO_ATA protocol.
Make ATA/SATA transport to fill that gap by reporting protocol to SIM with
XPT_SET_TRAN_SETTINGS and patching XPT_GET_TRAN_SETTINGS results if needed.
Notes:
svn path=/head/; revision=236666
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MFC after: 3 days
Suggested by: mav @
Notes:
svn path=/head/; revision=236242
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to allow drivers to handle request completion directly without passing
them to the CAM SWI thread removing extra context switch.
Modify all ATA/SATA drivers to use them.
Reviewed by: gibbs, ken
MFC after: 2 weeks
Notes:
svn path=/head/; revision=235333
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interface supported by mvs(4) are 88SX, while AHCI-like chips are 88SE.
PR: kern/165271
Submitted by: Jia-Shiun Li <jiashiun@gmail.com>
MFC after: 1 week
Notes:
svn path=/head/; revision=232380
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Notes:
svn path=/head/; revision=230132
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Reviewed by: mav
Approved by: scottl
Notes:
svn path=/head/; revision=229671
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to known AHCI-capable chips (AMD/NVIDIA), configured for legacy emulation.
Enabled by default to get additional performance and functionality of AHCI
when it can't be enabled by BIOS. Can be disabled to honor BIOS settings if
needed for some reason.
MFC after: 1 month
Notes:
svn path=/head/; revision=228200
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Suggested by: jhb @ and marius @
MFC after: 1 week
Notes:
svn path=/head/; revision=227849
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to kern/subr_bus.c. Simplify this function so that it no longer
depends on malloc() to execute. Identify a few other places where
it makes sense to use device_delete_all_children().
MFC after: 1 week
Notes:
svn path=/head/; revision=227701
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completely skipping them, create ahcich devices for them to allocate unit
numbers, but mark them as disabled to prevent driver probe and attach.
Last time some BIOSes tend to report unused channels as "not implemented".
This change makes ahcichX devices numbering consistent, independently of
connected disks. It makes per-channel driver hints usable and CAM devices
wiring possible on such systems.
Notes:
svn path=/head/; revision=227635
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This means that their use is restricted to a single C file.
Notes:
svn path=/head/; revision=227293
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MFC after: 3 days
Notes:
svn path=/head/; revision=225789
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Approved by: re (blackend)
MFC after: 1 week
Notes:
svn path=/head/; revision=225140
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Mac with this chipset does not initialize AHCI mode unless it is started
from EFI loader. However, legacy ATA mode works.
Submitted by: jkim@ (original version)
Approved by: re (kib)
MFC after: 1 week
Notes:
svn path=/head/; revision=224603
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Slot field of the PxCMD register may point to an empty command slot.
That breaks command timeout detection logic, making impossible to find
what command actually caused timeout, and leading to infinite wait.
Workaround that by checking whether pointed command slot is really used
and can timeout in its time. And if not, fallback to the dumb algorithm
used with FBS -- let all commands to time out and then fail all of them.
Approved by: re (kib)
MFC after: 1 week
Notes:
svn path=/head/; revision=224498
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PR: kern/157843
MFC after: 1 week
Notes:
svn path=/head/; revision=223699
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Notes:
svn path=/head/; revision=222306
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without waiting for device readiness (or at least not updating FIS receive
area in time). To workaround that, special quirk was added earlier to wait
for the FIS receive area update. But it was found that under same PCI ID
0x91231b4b and revision 0x11 there are two completely different chip
versions (firmware?): HBA and RAID. The problem is that RAID version in
some cases, such as hot-plug, does not update FIS receive area at all!
To workaround that, differentiate the chip versions by their capabilities,
and, if RAID version found, skip FIS receive area update waiting and read
device signature from the PxSIG register instead. This method doesn't work
for HBA version when PMP attached, so keep using previous workaround there.
Notes:
svn path=/head/; revision=222304
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(SEMB) is unable to communicate to Storage Enclosure Processor (SEP), in
response to hard and soft resets it should among other things return value
0x7F in Status register. The weird side is that it means DRQ bit set, which
tells that reset request is not completed. It would be fine if SEMB was the
only device on port. But if SEMB connected to PMP or built into it, it may
block access to other devices sharing same SATA port.
Make some tunings/fixes to soft-reset handling to workaround the issue:
- ahci(4): request CLO on the port after soft reset to ignore DRQ bit;
- siis(4): gracefully reinitialize port after soft reset timeout (hardware
doesn't detect reset request completion in this case);
- mvs(4): if PMP is used, send dummy soft-reset to the PMP port to make it
clear DRQ bit for us.
For now this makes quirks in ata_pmp.c, hiding SEMB ports of SiI3726/SiI4726
PMPs, less important. Further, if hardware permit, I hope to implement real
SEMB support.
Notes:
svn path=/head/; revision=222285
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When supported by hardware, this allows to control per-port activity, locate
and fault LEDs via the led(4) API for localization and status reporting
purposes. Supporting AHCI controllers may transmit that information to the
backplane controllers via SGPIO interface. Backplane controllers interpret
received statuses in some way (IBPI standard) to report them using present
indicators.
Notes:
svn path=/head/; revision=222039
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to Seth Heasley for preparing the changes.
Notes:
svn path=/head/; revision=221789
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Submitted by: dchagin
MFC after: 1 week
Notes:
svn path=/head/; revision=221504
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Notes:
svn path=/head/; revision=220830
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in no more then 10ms. If we detected no device presence within that time,
there is no reason to wait longer.
Notes:
svn path=/head/; revision=220829
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Notes:
svn path=/head/; revision=220822
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Notes:
svn path=/head/; revision=220789
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- Do not call ahci_start() before device signature received. It is required
by the specification and caused non-fatal reset timeouts on AMD chipsets.
Notes:
svn path=/head/; revision=220777
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- use ATA_SE_EXCHANGED (SError.DIAG.X) bit to detect hot-plug events when
power-management enabled and ATA_SE_PHY_CHANGED (SError.DIAG.N) can't be
trusted;
- on controllers supporting staggered spin-up (SS) put unused channels
into Listen state instead of Off. It should still save some power, but
allow plug-in events to be detected;
- on controllers supporting cold presence detection (CPD), when power
management enabled, use CPD events to detect hot-plug in addition to PHY
events.
Notes:
svn path=/head/; revision=220657
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- make SATA SIMs announce capabilities to handle SDB with Notification bit;
- make PMP driver honor this SIMs capability;
- make SATA XPT to negotiate and enable this feature for ATAPI devices.
This feature allows supporting SATA ATAPI devices to inform system about
some events happened, that may require attention. In my case this allows
LG GH22LS50 SATA DVR-RW drive to report tray open/close events. Events
reported to CAM in form of AC_SCSI_AEN async. Further they could be used
as a hints for checking device status and reporting media change to upper
layers, for example, via spoiling mechanism of GEOM.
Notes:
svn path=/head/; revision=220602
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