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* Retire pmap_dmap_iscurrent(). It is only a wrapper around ↵Jason A. Harmening2015-10-284-19/+0
| | | | | | | pmap_is_current(), and is no longer called. Notes: svn path=/head/; revision=290120
* Remove the s3c2xx0 code, it's no longer used. As far as I know I as theAndrew Turner2015-10-2820-3645/+0
| | | | | | | | main user of this code, however I haven't used it in over two years, and don't expect to in the future. Notes: svn path=/head/; revision=290106
* Start to remove support for the XScale i80321. As far as I can tell nobodyAndrew Turner2015-10-283-225/+0
| | | | | | | uses this which makes it difficult to support. Notes: svn path=/head/; revision=290105
* Start to remove support for the Samsung s3c24x0 SoCs by removing the kernelAndrew Turner2015-10-272-92/+0
| | | | | | | config, and support from NOTES. Notes: svn path=/head/; revision=290085
* Add etherswitch support to mgeZbigniew Bodek2015-10-258-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces support for etherswitch devices that utilize SMI as a way of accessing its registers. SMI register is located in address space of mge -- access to it was exported through MDIO interface. Attachment functions were enhanced so as to ensure proper initialisation in both cases: 1) PHYs attached directly to mge, 2) PHYs attached to switch device and switch attached to mge. Attachment of etherswitch device depends on dts entry with compatible="mrvl,sw" property. If none is found, typical PHY attachment procedure follows. In case of switch attached, PHYs' status and configuration is accessible via etherswitchcfg, and ifconfig shows always-up, non-configurable mge interfaces. Due to the fact that there may be simultaneous accessess to SMI registers (e.g. from PHY attached to one of mge instances and switch to the other), SMI access interlock was added. It is SX lock, because sleep ability is necessary -- busy-waiting would result in poor performance due to long delays required by hardware. Underlying switch driver is obliged to use sleepable locks as well. Reviewed by: adrian Obtained from: Semihalf Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Differential revision: https://reviews.freebsd.org/D3900 Notes: svn path=/head/; revision=289945
* Define a couple macros to access cacheline size/mask in an arch-dependentIan Lepore2015-10-241-4/+12
| | | | | | | way. This code should now work for all arm versions v4 thru v7. Notes: svn path=/head/; revision=289893
* Provide armv4/v5 implementations of several of the armv6 cache maintenanceIan Lepore2015-10-241-0/+48
| | | | | | | | functions. This will make it possible to use the same busdma code for all arm platforms v4 thru v7. Notes: svn path=/head/; revision=289892
* Rename dcache_dma_preread() to dcache_inv_poc_dma() to make it clear that itIan Lepore2015-10-242-8/+10
| | | | | | | | | is a dcache invalidate to point of coherency just like dcache_inv_poc(), but a slightly different version specific to dma operations. Elaborate the comment about how and why it's different. Notes: svn path=/head/; revision=289887
* A few more whitespace, style, and comment cleanups. No functional changes.Ian Lepore2015-10-241-15/+10
| | | | Notes: svn path=/head/; revision=289865
* Bring in all the new(-ish) statistics code from armv6.Ian Lepore2015-10-241-64/+146
| | | | Notes: svn path=/head/; revision=289864
* Change the preallocation of a busdma segment mapping array from per-tag toIan Lepore2015-10-241-156/+93
| | | | | | | | | per-map. The per-tag scheme is not safe, and a mutex can't be used to protect it because the mapping routines can't sleep. Code brought in from armv6 implementation. Notes: svn path=/head/; revision=289862
* Instead of all memory allocations using M_DEVBUF, use new categoriesIan Lepore2015-10-231-14/+18
| | | | | | | | M_BUSDMA for allocations of metadata (tags, maps, segment tracking lists), and M_BOUNCE for bounce pages. Notes: svn path=/head/; revision=289858
* Instead of all memory allocations using M_DEVBUF, use new categoriesIan Lepore2015-10-231-21/+24
| | | | | | | | M_BUSDMA for allocations of metadata (tags, maps, segment tracking lists), and M_BOUNCE for bounce pages. Notes: svn path=/head/; revision=289857
* Catch up to r232356: change the boundary constraint type to bus_addr_t.Ian Lepore2015-10-231-2/+2
| | | | | | | | This code lived in the projects/armv6 branch when that change got applied to all the other arches. Notes: svn path=/head/; revision=289854
* Whitespace and style nits, no functional changes.Ian Lepore2015-10-232-149/+131
| | | | | | | | | | | The goal is to make these two files cosmetically alike so that the actual implementation differences are visible. The only changes which aren't spaces<->tabs and rewrapping and reindenting lines are a couple fields shuffled around in the tag and map structs so that everything is in the same order in both versions (which should amount to no functional change). Notes: svn path=/head/; revision=289851
* Remove unclear comment about address truncation in busdma. Add (hopefully ↵Jason A. Harmening2015-10-232-18/+0
| | | | | | | | | much clearer) comment at declaration of PHYS_TO_VM_PAGE(). Noted by: avg Notes: svn path=/head/; revision=289825
* Use pmap_quick* functions in armv6 busdma, for bounce buffers and cache ↵Jason A. Harmening2015-10-222-159/+194
| | | | | | | | | | | | | maintenance. This makes it safe to sync buffers that have no VA mapping associated with the busdma map, but may have other mappings, possibly on different CPUs. This also makes it safe to sync unmapped bounce buffers in non-sleepable thread contexts. Similar to r286787 for x86, this treats userspace buffers the same as unmapped buffers and no longer borrows the UVA for sync operations. Submitted by: Svatopluk Kraus <onwahe@gmail.com> (earlier revision) Tested by: Svatopluk Kraus Differential Revision: https://reviews.freebsd.org/D3869 Notes: svn path=/head/; revision=289759
* Fix parsing of I2C addresses properties in fdt data. I2C address isIan Lepore2015-10-212-2/+2
| | | | | | | | | | represented in 7-bits format in DT files, but system expect it in 8-bit format. Also, fix two drivers that locally hack around this bug. Submitted by: Michal Meloun <meloun@miracle.cz> Notes: svn path=/head/; revision=289704
* Move arm_gic_bind() out of the #ifdef SMP block to fix compile errors inIan Lepore2015-10-211-1/+1
| | | | | | | | | | the not-SMP case. This is safe because arm_irq_next_cpu() will return the cpuid of the current/only core in the not-SMP case. Submitted by: Bartosz Szczepanek @ semihalf Notes: svn path=/head/; revision=289698
* Use pmap_quick* for out-of-context bounce buffers and (limited) cache ↵Jason A. Harmening2015-10-211-26/+125
| | | | | | | | | | maintenance of unmapped buffers in armv5 busdma. Tested by: Mattia Rossi <mattia.rossi.mailinglists@gmail.com> Differential Revision: https://reviews.freebsd.org/D3522 Notes: svn path=/head/; revision=289675
* Uncomment some rather important code that was commented out for benchmarking.Ian Lepore2015-10-201-4/+4
| | | | | | | | | | | | Normally this routine is supposed to loop until the PIC returns a "no more interrupts pending" indication. I had commented that out to do just one interrupt per invokation to do some timing tests. Spotted by: Svata Kraus Pointy Hat: ian Notes: svn path=/head/; revision=289631
* Include "opt_platform.h" to fix kernel build for amlogic devices.Ganbold Tsagaankhuu2015-10-201-0/+2
| | | | Notes: svn path=/head/; revision=289630
* Follow the advice of the misplaced comment and don't access the map structIan Lepore2015-10-201-2/+1
| | | | | | | after freeing it. Remove the comment whose uselessness has been revealed. Notes: svn path=/head/; revision=289619
* Set the correct values in the arm aux control register, based on chip type.Ian Lepore2015-10-195-6/+105
| | | | | | | | | | | | | The bits in the aux control register vary based on the processor type. In the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits, which worked fine for the first few SoCs we supported. Now that we support most of the cortex-a series processors, it's important to get the right bits set based on the processor type. Submitted by: Svatopluk Kraus <onwahe@gmail.com> Notes: svn path=/head/; revision=289602
* Enable gpiobacklight in BEAGLEBONE config to support LCD capes byOleksandr Tymoshenko2015-10-181-0/+1
| | | | | | | 4DSYSTEMS out of box Notes: svn path=/head/; revision=289554
* Only decode fdt data which belongs to the GIC controller.Ian Lepore2015-10-182-3/+17
| | | | | | | | | | | | | | | | | | The interrupts-extended property is a list of controller-specific interrupt tuples for more than one controller. The decode routine of every PIC gets called in the pre-INTRNG code (nexus doesn't know which device instance belongs to which fdt node), so the GIC code has to check each FDT node it is asked to decode to ensure it is the owner. Because in the pre-INTRNG world there can only be one instance of a GIC, it's safe to cache the results of a positive lookup in a static variable to avoid the expensive lookups on subsequent calls. Submitted by: Svatopluk Kraus <onwahe@gmail.com> Differential Revision: https://reviews.freebsd.org/D2345 Notes: svn path=/head/; revision=289548
* Include "opt_platform.h" early so that the FDT option is visible as needed.Ian Lepore2015-10-182-0/+4
| | | | Notes: svn path=/head/; revision=289547
* Enable ARM_INTRNG on IMX6 platforms, and make the imx_gpio driver anIan Lepore2015-10-183-86/+319
| | | | | | | | | | | | | | | | interrupt controller. The latter is required for INTRNG, because of the hardware erratum workaround installed by the linux folks into the imx6 FDT data, which remaps an ethernet interrupt to the gpio device. In the non-INTRNG world we intercept the call to map the interrupt and map it back to the ethernet hardware (because we don't need linux's workaround), but in the INTRNG world we lose the hookpoint where that remapping was happening, but we gain the ability to work the way linux does by having the gpio driver dispatch the interrupt. Notes: svn path=/head/; revision=289537
* Enable ARM_INTRNG on the pandaboard platform.Ian Lepore2015-10-183-5/+3
| | | | | | | Differential Revision: https://reviews.freebsd.org/D2048 Notes: svn path=/head/; revision=289532
* Import ARM_INTRNG, the "next generation" interrupt architecture for armIan Lepore2015-10-188-26/+2471
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and armv6 architecures. The primary enhancement over the old design is support for hierarchical interrupt controllers (such as a gpio driver which can receive interrupts from a root PIC and act as a PIC itself for clients interested in handling a change of gpio pin state as an interrupt). The new code also provides an infrastructure for mapping interrupts described in metadata in the form of a "controller reference plus interrupt number" tuple into the simple "0-n" flat numeric space understood by rman and the bus resource mechanisms. Use of the new code is enabled by setting the ARM_INTRNG option, and by making a few simple changes to the platform's support code. In addition each existing PIC driver needs changes to be ready for INTRNG; this commit contains the changes for the arm/gic driver, which most armv6 SoCs use, but it does not enable the new code yet on any platform. This project has been many years in the making, starting as a GSoC project by Jakub Klama (jceel@) in 2012. That didn't get committed right away and the source base evolved out from under it to some degree. In 2014 I rebased the diffs to then -current and did some enhancements in the area of mapping interrupt numbers and storing associated fdt data, then the project went cold again for a while. Eventually Svata Kraus took that work in progress and did another big round of work on it, removing most of the remaining rough edges. Finally I took that and made one more pass through it, mostly disabling the "INTR_SOLO" feature for now, pending further design discussions on how to most efficiently dispatch a pending interrupt through more than one layer of PIC. The current code with the INTR_SOLO feature disabled uses approximate 100 extra cpu cycles for each cascaded PIC the interrupt has to be passed to, so what's left to do is about efficiency, not correct operation. Differential Revision: https://reviews.freebsd.org/D2047 Notes: svn path=/head/; revision=289529
* Rename arm_init_secondary_ic() -> arm_pic_init_secondary(). The latter isIan Lepore2015-10-1812-12/+12
| | | | | | | | | the name the function will have when the new ARM_INTRNG code is integrated, and doing this rename first will make it easier to toggle the new interrupt handling code on/off with a config option for debugging. Notes: svn path=/head/; revision=289522
* Fix a strange macro re-definition compile error. If the VM_MAXUSER_ADDRESSIan Lepore2015-10-181-1/+5
| | | | | | | | | | | | | | | value is defined as a config option the definition is emitted into opt_global.h which is force-included into everything. In addition, the symbol is emitted by the genassym mechanism, but that by its nature reduces the value to a 0xnnnnnnnn number. When compiling a .S file you end up with two different definitions of the macro (they evaluate to the same number, but the text is different, upsetting the compiler). Nothing has changed about this code for a while but the compile error is new, so this must be fallout from the clang 3.7 update or something. Notes: svn path=/head/; revision=289477
* ARM userspace accessors, e.g. {s,f}uword(9), copy{in,out}(9),Konstantin Belousov2015-10-156-48/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | casuword(9) and others, use LDRT and STRT instructions to access memory with the privileges of userspace. If the *RT instruction faults on the kernel address, then additional checks must be done to not confuse the VM system with invalid kernel-mode faults. Put ARM on line with other FreeBSD architectures and disallow usermode buffers which intersect with the kernel address space in advance, before any accesses are performed. In other words, vm_fault(9) is no longer called when e.g. suword(9) stores to invalid (i.e. not userspace) address. Also, switch ARM to use fueword(9) and casueword(9). Note: there is a pending patch in D3617, which adds the special processing for faults from LDRT and STRT. The addition of the processing is useful for potential other uses of the instructions and for completeness, but standard userspace accessors are better served by not allowing such faults beforehand. Reviewed by: andrew Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3816 MFC after: 2 weeks Notes: svn path=/head/; revision=289372
* Remove compatibility shims for legacy ATA device names.Alexander Motin2015-10-118-8/+0
| | | | | | | | We got new ATA stack in FreeBSD 8.x, switched to it at 9.x, completely removed old stack at 10.x, so at 11.x it is time to remove compat shims. Notes: svn path=/head/; revision=289137
* Use IIC_EBUSBSY and IIC_BUSERR status values consistantly across all drivers.Ian Lepore2015-10-093-6/+6
| | | | | | | | | | | | | | | Make it clearer what each one means in the comments that define them. IIC_BUSBSY was used in many places to mean two different things, either "someone else has reserved the bus so you have to wait until they're done" or "the signal level on the bus was not in the state I expected before/after issuing some command". Now IIC_BUSERR is used consistantly to refer to protocol/signaling errors, and IIC_BUSBSY refers to ownership/reservation of the bus. Notes: svn path=/head/; revision=289093
* Mostly rewrite the imx i2c driver. This started out as an attempt to fixIan Lepore2015-10-091-170/+121
| | | | | | | | | | | | | | | | | | | | | | | | | one specific problem: the driver didn't check for ACK/NAK after writing a slave address byte to the bus, and some slaves signal that they are busy (such as when completing an internal write to flash memory) by sending a NAK in response to being addressed. While working on that problem I discovered that the driver's handling of error conditions in general didn't match the state transition diagram in the reference manual, and making that right resulted in a lot of code reorganization. Along the way various other changes also happened... - Remove a mutex that wasn't protecting anything. - Remove some mystery DELAY()s, document the few that remain. - Use pause_sbt(9) to yield the processor for the bulk of the time it takes to transfer each byte rather than busy-polling the whole time. - Disable the controller when no transfers are in progress; since we don't operate in slave mode, there's no reason to run the hardware. - Remove a bunch of unecessary code from probe(). Notes: svn path=/head/; revision=289091
* Move pmu.c to files.arm and rename the option to pmu. This is not hwpmcAndrew Turner2015-10-071-1/+0
| | | | | | | | | | | | | specific as we may use the pmu registers for other uses. No configs seem to currently build this. This will allow for more use of this device. Discussed with: bz Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=288992
* A follow-up to r288492. In fact, revert the mentioned commit forKonstantin Belousov2015-10-073-1/+15
| | | | | | | | | | | | | | | | | | | | | pre-VFPv3 processors, since they do require software support code to handle denormals. For VFPv3 and later, enable flush-to-zero if hardware does not claim full denormals arithmetic support by VMVFR1_FZ field in mvfr1 register. The end result is that we do use correct fpu environment on Cortexes with VFPv3, while ARM11 (e.g. rpi) is in non-compliant flush-to-zero mode. At least CPUs without complete hardware implementation of IEEE 754 do not cause unhandled floating point exception on underflow, as it was before r288492. Noted by: ian Tested by: gjb Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=288983
* Attach interrupt controller device before other devices.Ruslan Bukin2015-10-051-1/+2
| | | | | | | Sponsored by: University of Cambridge Notes: svn path=/head/; revision=288824
* Add missing stack unwind information to several assembly functions onRobert Watson2015-10-043-2/+7
| | | | | | | | | | | | | | | | | ARMv6/7: - Define _SAVE() macro to allow unwind data to be conditionally defined for ARM assembly code in the kernel. - Use _SAVE() to provide unwind information for bcopy_page(), and two (of many) instances of copyin() and copyout(). Reviewed by: andrew, imp MFC after: 3 days Sponsored by: University of Cambridge Notes: svn path=/head/; revision=288662
* Do not set 'flush to zero' VFPSCR_FZ bit by default. The correctKonstantin Belousov2015-10-022-2/+2
| | | | | | | | | | | | | | implementation of IEEE 754 arithmetic depends on denormals operating correctly. Both perl test suite and paranoia tripped over the setting. Reported by: Stefan Parvu <sparvu@kronometrix.org> Discussed with: andrew Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=288492
* FreeBSD does not support SMP on ARMv5. Since processor is alwaysKonstantin Belousov2015-10-023-28/+61
| | | | | | | | | | | | | | | | | | | self-consistent, there is no need in anything but compiler barrier in the implementation of atomic_thread_fence_*() on ARMv5. Split implementation of fences for ARMv4/5 and ARMv6; the former use compiler barriers, the later also perform hardware barriers. An issue which is fixed by the change is the faults from the CP15 coprocessor accesses in the user mode. This was uncovered by the pthread_once() changes in r287556. Reported by: Mattia Rossi <mattia.rossi.mailinglists@gmail.com> Discussed with: alc, cognet, jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=288491
* An IPI must be cleared before it is handled otherwise next IPI could beAndrew Turner2015-10-012-12/+8
| | | | | | | | | | | | | | | | | | | | | | | | missed. In other words, if a new request for an IPI is sent while the previous request is being handled but the IPI is not cleared yet, the clearing of the previous IPI request also clears the new one and the handling is missed. There are only three MP interrupt controllers in ARM now. Two of them are fixed by this change, the third one is correct, probably only just by accident. The fix is minimalistic as new interrupt framework is awaited. It was debugged on RPi2 where missing IPI handling together with SCHED_ULE led to situation in which tdq_ipipending was not cleared and so IPI_PREEMPT was stopped to be sent. Various odditys were found related to slow system response time like various events timed out, and slow console response. Submitted by: Svatopluk Kraus <onwahe@gmail.com> Reviewed by: loos, kib MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D3722 Notes: svn path=/head/; revision=288447
* Exploit r288122 to address a cosmetic issue. Since PV chunk pages don'tAlan Cox2015-09-262-2/+2
| | | | | | | | | | | | | | belong to a vm object, they can't be paged out. Since they can't be paged out, they are never enqueued in a paging queue. Nonetheless, passing PQ_INACTIVE to vm_page_unwire() creates the appearance that these pages are being enqueued in the inactive queue. As of r288122, we can avoid this false impression by passing PQ_NONE. Submitted by: kmacy (an earlier version) Differential Revision: https://reviews.freebsd.org/D1674 Notes: svn path=/head/; revision=288256
* Add support for __atomic_FOO_fetch on arm prior to armv6. These return theAndrew Turner2015-09-221-9/+14
| | | | | | | | | new value where the existing functions return the old value. MFC after: 1 Week Notes: svn path=/head/; revision=288125
* Enable if_dwc for Allwinner A20 based boards.Luiz Otavio O Souza2015-09-211-2/+3
| | | | | | | | | | This enables the gigabit ethernet on cubieboard2 and banana pi. A special thanks to Netgate who gently provided me with a banana pi almost a year ago. Notes: svn path=/head/; revision=288056
* Add the A20 glue code for if_dwc.Luiz Otavio O Souza2015-09-212-0/+108
| | | | | | | | | | | | This code initializes the GMAC clock and sets the pin mux to rgmii. It also override the if_dwc defaults to set the alternate descriptor type and MII clock used on A20. Tested on cubieboard2 and banana pi. Notes: svn path=/head/; revision=288050
* Add alternate descriptors support for if_dwc.Luiz Otavio O Souza2015-09-202-3/+0
| | | | | | | | | | | | | | | | | | | | | This also adds a newbus interface that allows a SoC to override the following settings: - if_dwc specific SoC initialization; - if_dwc descriptor type; - if_dwc MII clock. This seems to be an old version of the hardware descriptors but it is still in use in a few SoCs (namely Allwinner A20 and Amlogic at least). Tested on Cubieboard2 and Banana pi. Tested for regressions on Altera Cyclone by br@ (old version). Obtained from: NetBSD Notes: svn path=/head/; revision=288023
* Add support for weak symbols to the kernel linkers. It means thatKonstantin Belousov2015-09-201-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | linkers no longer raise an error when undefined weak symbols are found, but relocate as if the symbol value was 0. Note that we do not repeat the mistake of userspace dynamic linker of making the symbol lookup prefer non-weak symbol definition over the weak one, if both are available. In fact, kernel linker uses the first definition found, and ignores duplicates. Signature of the elf_lookup() and elf_obj_lookup() functions changed to split result/error code and the symbol address returned. Otherwise, it is impossible to return zero address as the symbol value, to MD relocation code. This explains the mechanical changes in elf_machdep.c sources. The powerpc64 R_PPC_JMP_SLOT handler did not checked error from the lookup() call, the patch leaves the code as is (untested). Reported by: glebius Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=288000
* Add domain support to PCI bus allocationZbigniew Bodek2015-09-163-3/+3
| | | | | | | | | | | | | | | When the system has more than a single PCI domain, the bus numbers are not unique, thus they cannot be used for "pci" device numbering. Change bus numbers to -1 (i.e. to-be-determined automatically) wherever the code did not care about domains. Reviewed by: jhb Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3406 Notes: svn path=/head/; revision=287882
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