diff options
Diffstat (limited to 'test/CodeGen/SystemZ')
26 files changed, 10282 insertions, 331 deletions
diff --git a/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll b/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll new file mode 100644 index 000000000000..63c1c6363189 --- /dev/null +++ b/test/CodeGen/SystemZ/DAGCombine_trunc_extract.ll @@ -0,0 +1,18 @@ +; RUN: llc -mtriple=s390x-linux-gnu -mcpu=zEC12 < %s | FileCheck %s +; +; Check that DAGCombiner doesn't crash in SystemZ combineTruncateExtract() +; when handling EXTRACT_VECTOR_ELT without vector support. + +define void @autogen_SD21598(<2 x i8> %Arg) { +; CHECK: stc %r3, 0(%r1) +; CHECK: j .LBB0_1 + +entry: + br label %loop + +loop: ; preds = %CF249, %CF247 + %Shuff = shufflevector <2 x i8> undef, <2 x i8> %Arg, <2 x i32> <i32 3, i32 1> + %E = extractelement <2 x i8> %Shuff, i32 0 + store i8 %E, i8* undef + br label %loop +} diff --git a/test/CodeGen/SystemZ/DAGCombiner_illegal_BUILD_VECTOR.ll b/test/CodeGen/SystemZ/DAGCombiner_illegal_BUILD_VECTOR.ll new file mode 100644 index 000000000000..3e5757c902cc --- /dev/null +++ b/test/CodeGen/SystemZ/DAGCombiner_illegal_BUILD_VECTOR.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s +; +; Check that DAGCombiner does not crash after producing an illegal +; BUILD_VECTOR node. + + +define void @pr32422() { +; CHECK: cdbr %f0, %f0 +; CHECK: jo .LBB0_1 + +BB: + %I = insertelement <8 x i8> zeroinitializer, i8 -95, i32 3 + %I8 = insertelement <8 x i8> zeroinitializer, i8 -119, i32 2 + %FC = uitofp <8 x i8> %I8 to <8 x float> + %Cmp18 = fcmp uno <8 x float> zeroinitializer, %FC + %I22 = insertelement <8 x i1> %Cmp18, i1 true, i32 5 + br label %CF + +CF: ; preds = %CF, %BB + %Cmp40 = fcmp uno double 0xC663C682E9619F00, undef + br i1 %Cmp40, label %CF, label %CF353 + +CF353: ; preds = %CF + %E195 = extractelement <8 x i1> %I22, i32 4 + ret void +} diff --git a/test/CodeGen/SystemZ/expand-zext-pseudo.ll b/test/CodeGen/SystemZ/expand-zext-pseudo.ll new file mode 100644 index 000000000000..1ee42885cb9c --- /dev/null +++ b/test/CodeGen/SystemZ/expand-zext-pseudo.ll @@ -0,0 +1,132 @@ +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s +; +; Test that a def operand of super-reg is not dropped during post RA pseudo +; expansion in expandZExtPseudo(). + +define void @fun_llvm_stress_reduced(i8*, i32*, i64*, i32) { +; CHECK: .text +BB: + %A = alloca i32 + %Sl24 = select i1 undef, i32* %1, i32* %1 + %L26 = load i16, i16* undef + %L32 = load i32, i32* %Sl24 + br label %CF847 + +CF847: ; preds = %CF878, %BB + %L61 = load i16, i16* undef + br label %CF878 + +CF878: ; preds = %CF847 + %PC66 = bitcast i32* %Sl24 to double* + %Sl67 = select i1 undef, <2 x i32> undef, <2 x i32> undef + %Cmp68 = icmp ugt i32 undef, %3 + br i1 %Cmp68, label %CF847, label %CF863 + +CF863: ; preds = %CF878 + %L84 = load i16, i16* undef + br label %CF825 + +CF825: ; preds = %CF825, %CF863 + %Sl105 = select i1 undef, i1 undef, i1 undef + br i1 %Sl105, label %CF825, label %CF856 + +CF856: ; preds = %CF856, %CF825 + %Cmp114 = icmp ult i16 -24837, %L61 + br i1 %Cmp114, label %CF856, label %CF875 + +CF875: ; preds = %CF856 + %Shuff124 = shufflevector <2 x i32> undef, <2 x i32> undef, <2 x i32> <i32 1, i32 3> + %PC126 = bitcast i32* %A to i64* + br label %CF827 + +CF827: ; preds = %CF923, %CF911, %CF875 + %Sl142 = select i1 undef, i64 undef, i64 -1 + %B148 = sdiv i32 409071, 409071 + %E153 = extractelement <2 x i32> %Shuff124, i32 1 + br label %CF911 + +CF911: ; preds = %CF827 + br i1 undef, label %CF827, label %CF867 + +CF867: ; preds = %CF911 + br label %CF870 + +CF870: ; preds = %CF870, %CF867 + store i8 0, i8* %0 + %FC176 = fptoui double undef to i1 + br i1 %FC176, label %CF870, label %CF923 + +CF923: ; preds = %CF870 + %L179 = load i16, i16* undef + %Sl191 = select i1 undef, i64* %PC126, i64* %PC126 + br i1 false, label %CF827, label %CF828 + +CF828: ; preds = %CF905, %CF923 + %B205 = urem i16 -7553, undef + %E209 = extractelement <2 x i32> %Sl67, i32 1 + %Cmp215 = icmp ugt i16 %L179, 0 + br label %CF905 + +CF905: ; preds = %CF828 + %E231 = extractelement <4 x i1> undef, i32 1 + br i1 %E231, label %CF828, label %CF829 + +CF829: ; preds = %CF909, %CF829, %CF905 + %B234 = udiv i16 %L26, %L84 + br i1 undef, label %CF829, label %CF894 + +CF894: ; preds = %CF894, %CF829 + store i64 %Sl142, i64* %Sl191 + %Sl241 = select i1 %Cmp114, i1 false, i1 %Cmp215 + br i1 %Sl241, label %CF894, label %CF907 + +CF907: ; preds = %CF894 + %B247 = udiv i32 0, %E153 + %PC248 = bitcast i64* %2 to i8* + br label %CF909 + +CF909: ; preds = %CF907 + store i1 %FC176, i1* undef + %Cmp263 = icmp ugt i1 undef, %Sl241 + br i1 %Cmp263, label %CF829, label %CF830 + +CF830: ; preds = %CF909 + %B304 = urem i16 %L84, %B205 + %I311 = insertelement <2 x i32> %Shuff124, i32 %B247, i32 1 + store i8 0, i8* %0 + %Sl373 = select i1 %Cmp68, i32 0, i32 %E153 + br label %CF833 + +CF833: ; preds = %CF880, %CF830 + br label %CF880 + +CF880: ; preds = %CF833 + %Cmp412 = icmp ne i16 %B234, -18725 + br i1 %Cmp412, label %CF833, label %CF865 + +CF865: ; preds = %CF880 + store double 0.000000e+00, double* %PC66 + br label %CF860 + +CF860: ; preds = %CF860, %CF865 + store i8 0, i8* %PC248 + %Cmp600 = icmp sge i32 %B148, undef + br i1 %Cmp600, label %CF860, label %CF913 + +CF913: ; preds = %CF860 + store i32 %E209, i32* undef + store i32 %Sl373, i32* undef + %Cmp771 = icmp ule i32 undef, %L32 + br label %CF842 + +CF842: ; preds = %CF925, %CF913 + br label %CF925 + +CF925: ; preds = %CF842 + %Cmp778 = icmp sgt i1 %Cmp771, %Sl241 + br i1 %Cmp778, label %CF842, label %CF898 + +CF898: ; preds = %CF925 + %Sl785 = select i1 %Cmp600, i16 undef, i16 %B304 + unreachable +} diff --git a/test/CodeGen/SystemZ/extract-vector-elt-zEC12.ll b/test/CodeGen/SystemZ/extract-vector-elt-zEC12.ll new file mode 100644 index 000000000000..7bfe5ac8c1a5 --- /dev/null +++ b/test/CodeGen/SystemZ/extract-vector-elt-zEC12.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s +; +; Test that <1 x i8> is legalized properly without vector support. + +define void @autogen_SD18500(i8*) { +; CHECK: .text +BB: + %L5 = load i8, i8* %0 + %I22 = insertelement <1 x i8> undef, i8 %L5, i32 0 + %Cmp53 = icmp ule i1 undef, undef + br label %CF244 + +CF244: ; preds = %CF244, %BB + %Sl119 = select i1 %Cmp53, <1 x i8> %I22, <1 x i8> undef + %Cmp148 = fcmp une float 0x3E03A81780000000, 0x42D92DCD00000000 + br i1 %Cmp148, label %CF244, label %CF241 + +CF241: ; preds = %CF241, %CF244 + %Sl199 = select i1 true, <1 x i8> %Sl119, <1 x i8> zeroinitializer + br label %CF241 +} diff --git a/test/CodeGen/SystemZ/fold-memory-op-impl.ll b/test/CodeGen/SystemZ/fold-memory-op-impl.ll new file mode 100644 index 000000000000..dda4df90d1b9 --- /dev/null +++ b/test/CodeGen/SystemZ/fold-memory-op-impl.ll @@ -0,0 +1,129 @@ +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s +; +; Test that foldMemoryOperandImpl() doesn't drop subreg / read-undef flags. + + +define void @fun_llvm_stress_reduced(i8*, i32*, i64*, i64, i8) { +; CHECK: .text +BB: + %A4 = alloca <4 x i64> + %A1 = alloca <8 x i1> + %E6 = extractelement <4 x i1> undef, i32 3 + %L23 = load i8, i8* %0 + %B27 = fmul double 0x59A989483BA7E0C6, undef + %L30 = load i16, i16* undef + store i16 -11933, i16* undef + %L46 = load i16, i16* undef + %L61 = load i16, i16* undef + %Sl74 = select i1 undef, i1 undef, i1 true + br label %CF846 + +CF846: ; preds = %CF877, %BB + %I86 = insertelement <4 x i1> undef, i1 undef, i32 0 + %Cmp89 = icmp ne i64 undef, %3 + %L90 = load i16, i16* undef + %Shuff92 = shufflevector <4 x i16> zeroinitializer, <4 x i16> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 undef, i32 6> + br label %CF877 + +CF877: ; preds = %CF846 + store i16 %L61, i16* undef + %Cmp110 = icmp eq i16 %L61, undef + br i1 %Cmp110, label %CF846, label %CF862 + +CF862: ; preds = %CF877 + %I114 = insertelement <4 x i64> zeroinitializer, i64 0, i32 0 + %B115 = shl <4 x i64> zeroinitializer, %I114 + %Sl124 = select i1 true, <8 x i1>* %A1, <8 x i1>* %A1 + %B130 = frem double %B27, 0x59A989483BA7E0C6 + %E143 = extractelement <4 x i64> %B115, i32 1 + %Sl148 = select i1 %Cmp89, <1 x i32> undef, <1 x i32> zeroinitializer + br label %CF855 + +CF855: ; preds = %CF855, %CF862 + %Sl171 = select i1 %Sl74, i1 %E6, i1 undef + br i1 %Sl171, label %CF855, label %CF874 + +CF874: ; preds = %CF855 + %PC186 = bitcast i32* %1 to i16* + %L196 = load i16, i16* undef + %B207 = or i8 %4, %L23 + %L211 = load <8 x i1>, <8 x i1>* %Sl124 + %B215 = fdiv double 0x8421A9C0D21F6D3E, %B130 + %L218 = load i16, i16* %PC186 + %Sl223 = select i1 %Sl171, <4 x i1> %I86, <4 x i1> undef + br label %CF826 + +CF826: ; preds = %CF866, %CF910, %CF874 + %B245 = ashr i16 -11933, %L46 + br label %CF910 + +CF910: ; preds = %CF826 + %L257 = load i8, i8* %0 + %BC262 = bitcast i64 %E143 to double + store i16 %L196, i16* %PC186 + %E266 = extractelement <4 x i16> %Shuff92, i32 0 + %Sl271 = select i1 %Cmp89, i1 %Cmp89, i1 %Cmp110 + br i1 %Sl271, label %CF826, label %CF866 + +CF866: ; preds = %CF910 + store i64 %E143, i64* %2 + %I276 = insertelement <4 x double> undef, double %BC262, i32 3 + %L281 = load <8 x i1>, <8 x i1>* %Sl124 + %E282 = extractelement <4 x i1> zeroinitializer, i32 2 + br i1 %E282, label %CF826, label %CF848 + +CF848: ; preds = %CF866 + %Cmp288 = fcmp olt <4 x double> undef, %I276 + %FC294 = fptosi double undef to i16 + %Cmp296 = icmp ule i16 %FC294, %B245 + store i16 %L218, i16* undef + store i8 %L23, i8* %0 + %E320 = extractelement <4 x i1> %Sl223, i32 1 + %PC337 = bitcast <8 x i1>* %Sl124 to i1* + %Cmp345 = icmp uge <1 x i32> undef, %Sl148 + store i16 %L196, i16* %PC186 + br label %CF893 + +CF893: ; preds = %CF893, %CF848 + %Cmp361 = fcmp uge float undef, undef + br i1 %Cmp361, label %CF893, label %CF906 + +CF906: ; preds = %CF893 + store i16 -11933, i16* undef + %Shuff379 = shufflevector <1 x i1> undef, <1 x i1> %Cmp345, <1 x i32> <i32 1> + br label %CF850 + +CF850: ; preds = %CF850, %CF906 + br i1 undef, label %CF850, label %CF925 + +CF925: ; preds = %CF850 + store i16 %E266, i16* %PC186 + %Cmp413 = icmp ugt i8 %L257, undef + store i16 %L30, i16* %PC186 + %Sl420 = select i1 %Sl171, <8 x i1> undef, <8 x i1> %L281 + store i16 %L90, i16* undef + %FC469 = uitofp i1 %Cmp296 to float + store i1 %Cmp413, i1* %PC337 + br label %CF833 + +CF833: ; preds = %CF833, %CF925 + store i8 %B207, i8* %0 + %E509 = extractelement <8 x i1> %L211, i32 7 + br i1 %E509, label %CF833, label %CF882 + +CF882: ; preds = %CF833 + store i1 %Sl271, i1* %PC337 + br label %CF852 + +CF852: ; preds = %CF896, %CF882 + store i1 %Sl74, i1* %PC337 + br label %CF896 + +CF896: ; preds = %CF852 + %E576 = extractelement <4 x i1> %Cmp288, i32 3 + br i1 %E576, label %CF852, label %CF890 + +CF890: ; preds = %CF896 + %Sl581 = select i1 undef, float undef, float %FC469 + unreachable +} diff --git a/test/CodeGen/SystemZ/fp-cmp-05.ll b/test/CodeGen/SystemZ/fp-cmp-05.ll index 92b5056cfbbe..d25c8e78cc3e 100644 --- a/test/CodeGen/SystemZ/fp-cmp-05.ll +++ b/test/CodeGen/SystemZ/fp-cmp-05.ll @@ -9,7 +9,7 @@ ; Test f32 define float @f1(float %a, float %b, float %f) { ; CHECK-LABEL: f1: -; CHECK: lcebr +; CHECK: ltebr ; CHECK-NEXT: ber %r14 %neg = fsub float -0.0, %f %cond = fcmp oeq float %neg, 0.0 @@ -20,7 +20,7 @@ define float @f1(float %a, float %b, float %f) { ; Test f64 define double @f2(double %a, double %b, double %f) { ; CHECK-LABEL: f2: -; CHECK: lcdbr +; CHECK: ltdbr ; CHECK-NEXT: ber %r14 %neg = fsub double -0.0, %f %cond = fcmp oeq double %neg, 0.0 @@ -33,7 +33,7 @@ define double @f2(double %a, double %b, double %f) { declare float @llvm.fabs.f32(float %f) define float @f3(float %a, float %b, float %f) { ; CHECK-LABEL: f3: -; CHECK: lnebr +; CHECK: lpebr ; CHECK-NEXT: ber %r14 %abs = call float @llvm.fabs.f32(float %f) %neg = fsub float -0.0, %abs @@ -46,7 +46,7 @@ define float @f3(float %a, float %b, float %f) { declare double @llvm.fabs.f64(double %f) define double @f4(double %a, double %b, double %f) { ; CHECK-LABEL: f4: -; CHECK: lndbr +; CHECK: lpdbr ; CHECK-NEXT: ber %r14 %abs = call double @llvm.fabs.f64(double %f) %neg = fsub double -0.0, %abs diff --git a/test/CodeGen/SystemZ/int-cmp-44.ll b/test/CodeGen/SystemZ/int-cmp-44.ll index 1b9a4ae353fe..85a8788a3bdd 100644 --- a/test/CodeGen/SystemZ/int-cmp-44.ll +++ b/test/CodeGen/SystemZ/int-cmp-44.ll @@ -473,8 +473,8 @@ entry: %xor = xor i32 %val, 1 %add = add i32 %xor, 1000000 call void @foo() - %cmp = icmp ne i32 %add, 0 - br i1 %cmp, label %exit, label %store + %cmp = icmp eq i32 %add, 0 + br i1 %cmp, label %store, label %exit, !prof !1 store: store i32 %add, i32 *%ptr @@ -888,3 +888,5 @@ store: exit: ret i64 %res } + +!1 = !{!"branch_weights", i32 2, i32 1} diff --git a/test/CodeGen/SystemZ/locr-legal-regclass.ll b/test/CodeGen/SystemZ/locr-legal-regclass.ll new file mode 100644 index 000000000000..1f792439a49c --- /dev/null +++ b/test/CodeGen/SystemZ/locr-legal-regclass.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 -verify-machineinstrs | FileCheck %s +; +; Test that early if conversion produces LOCR with operands of the right +; register classes. + +define void @autogen_SD4739(i8*) { +; CHECK-NOT: Expected a GR32Bit register, but got a GRX32Bit register +BB: + %L34 = load i8, i8* %0 + %Cmp56 = icmp sgt i8 undef, %L34 + br label %CF246 + +CF246: ; preds = %CF246, %BB + %Sl163 = select i1 %Cmp56, i8 %L34, i8 undef + br i1 undef, label %CF246, label %CF248 + +CF248: ; preds = %CF248, %CF246 + store i8 %Sl163, i8* %0 + br label %CF248 +} diff --git a/test/CodeGen/SystemZ/mature-mc-support.ll b/test/CodeGen/SystemZ/mature-mc-support.ll index 5520f55e1e29..a01716c27670 100644 --- a/test/CodeGen/SystemZ/mature-mc-support.ll +++ b/test/CodeGen/SystemZ/mature-mc-support.ll @@ -12,4 +12,4 @@ module asm " .this_directive_is_very_unlikely_to_exist" -; CHECK: LLVM ERROR: Error parsing inline asm +; CHECK: error: unknown directive diff --git a/test/CodeGen/SystemZ/memchr-01.ll b/test/CodeGen/SystemZ/memchr-01.ll index f4d381b37f26..0cfca2af1e98 100644 --- a/test/CodeGen/SystemZ/memchr-01.ll +++ b/test/CodeGen/SystemZ/memchr-01.ll @@ -1,21 +1,57 @@ -; Test memchr using SRST, with a weird but usable prototype. +; Test memchr using SRST, with the correct prototype. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s -declare i8 *@memchr(i8 *%src, i16 %char, i32 %len) +declare i8 *@memchr(i8 *%src, i32 %char, i64 %len) ; Test a simple forwarded call. -define i8 *@f1(i8 *%src, i16 %char, i32 %len) { +define i8 *@f1(i64 %len, i8 *%src, i32 %char) { ; CHECK-LABEL: f1: -; CHECK-DAG: lgr [[REG:%r[1-5]]], %r2 -; CHECK-DAG: algfr %r2, %r4 -; CHECK-DAG: llcr %r0, %r3 +; CHECK-DAG: agr %r2, %r3 +; CHECK-DAG: llcr %r0, %r4 ; CHECK: [[LABEL:\.[^:]*]]: -; CHECK: srst %r2, [[REG]] +; CHECK: srst %r2, %r3 ; CHECK-NEXT: jo [[LABEL]] ; CHECK: blr %r14 ; CHECK: lghi %r2, 0 ; CHECK: br %r14 - %res = call i8 *@memchr(i8 *%src, i16 %char, i32 %len) + %res = call i8 *@memchr(i8 *%src, i32 %char, i64 %len) ret i8 *%res } + +; Test a doubled call with no use of %r0 in between. There should be a +; single load of %r0. +define i8 *@f2(i8 *%src, i8 *%charptr, i64 %len) { +; CHECK-LABEL: f2: +; CHECK: llc %r0, 0(%r3) +; CHECK-NOT: %r0 +; CHECK: srst [[RES1:%r[1-5]]], %r2 +; CHECK-NOT: %r0 +; CHECK: srst %r2, [[RES1]] +; CHECK: br %r14 + %char = load volatile i8 , i8 *%charptr + %charext = zext i8 %char to i32 + %res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len) + %res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len) + ret i8 *%res2 +} + +; Test a doubled call with a use of %r0 in between. %r0 must be loaded +; for each loop. +define i8 *@f3(i8 *%src, i8 *%charptr, i64 %len) { +; CHECK-LABEL: f3: +; CHECK: llc [[CHAR:%r[1-5]]], 0(%r3) +; CHECK: lr %r0, [[CHAR]] +; CHECK: srst [[RES1:%r[1-5]]], %r2 +; CHECK: lhi %r0, 0 +; CHECK: blah %r0 +; CHECK: lr %r0, [[CHAR]] +; CHECK: srst %r2, [[RES1]] +; CHECK: br %r14 + %char = load volatile i8 , i8 *%charptr + %charext = zext i8 %char to i32 + %res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len) + call void asm sideeffect "blah $0", "{r0}" (i32 0) + %res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len) + ret i8 *%res2 +} diff --git a/test/CodeGen/SystemZ/memchr-02.ll b/test/CodeGen/SystemZ/memchr-02.ll deleted file mode 100644 index 0cfca2af1e98..000000000000 --- a/test/CodeGen/SystemZ/memchr-02.ll +++ /dev/null @@ -1,57 +0,0 @@ -; Test memchr using SRST, with the correct prototype. -; -; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s - -declare i8 *@memchr(i8 *%src, i32 %char, i64 %len) - -; Test a simple forwarded call. -define i8 *@f1(i64 %len, i8 *%src, i32 %char) { -; CHECK-LABEL: f1: -; CHECK-DAG: agr %r2, %r3 -; CHECK-DAG: llcr %r0, %r4 -; CHECK: [[LABEL:\.[^:]*]]: -; CHECK: srst %r2, %r3 -; CHECK-NEXT: jo [[LABEL]] -; CHECK: blr %r14 -; CHECK: lghi %r2, 0 -; CHECK: br %r14 - %res = call i8 *@memchr(i8 *%src, i32 %char, i64 %len) - ret i8 *%res -} - -; Test a doubled call with no use of %r0 in between. There should be a -; single load of %r0. -define i8 *@f2(i8 *%src, i8 *%charptr, i64 %len) { -; CHECK-LABEL: f2: -; CHECK: llc %r0, 0(%r3) -; CHECK-NOT: %r0 -; CHECK: srst [[RES1:%r[1-5]]], %r2 -; CHECK-NOT: %r0 -; CHECK: srst %r2, [[RES1]] -; CHECK: br %r14 - %char = load volatile i8 , i8 *%charptr - %charext = zext i8 %char to i32 - %res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len) - %res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len) - ret i8 *%res2 -} - -; Test a doubled call with a use of %r0 in between. %r0 must be loaded -; for each loop. -define i8 *@f3(i8 *%src, i8 *%charptr, i64 %len) { -; CHECK-LABEL: f3: -; CHECK: llc [[CHAR:%r[1-5]]], 0(%r3) -; CHECK: lr %r0, [[CHAR]] -; CHECK: srst [[RES1:%r[1-5]]], %r2 -; CHECK: lhi %r0, 0 -; CHECK: blah %r0 -; CHECK: lr %r0, [[CHAR]] -; CHECK: srst %r2, [[RES1]] -; CHECK: br %r14 - %char = load volatile i8 , i8 *%charptr - %charext = zext i8 %char to i32 - %res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len) - call void asm sideeffect "blah $0", "{r0}" (i32 0) - %res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len) - ret i8 *%res2 -} diff --git a/test/CodeGen/SystemZ/memcmp-02.ll b/test/CodeGen/SystemZ/memcmp-02.ll deleted file mode 100644 index da11170def79..000000000000 --- a/test/CodeGen/SystemZ/memcmp-02.ll +++ /dev/null @@ -1,139 +0,0 @@ -; Test memcmp using CLC, with i64 results. -; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s - -declare i64 @memcmp(i8 *%src1, i8 *%src2, i64 %size) - -; Zero-length comparisons should be optimized away. -define i64 @f1(i8 *%src1, i8 *%src2) { -; CHECK-LABEL: f1: -; CHECK: lghi %r2, 0 -; CHECK: br %r14 - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 0) - ret i64 %res -} - -; Check a case where the result is used as an integer. -define i64 @f2(i8 *%src1, i8 *%src2) { -; CHECK-LABEL: f2: -; CHECK: clc 0(2,%r2), 0(%r3) -; CHECK: ipm [[REG:%r[0-5]]] -; CHECK: srl [[REG]], 28 -; CHECK: rll [[REG]], [[REG]], 31 -; CHECK: lgfr %r2, [[REG]] -; CHECK: br %r14 - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 2) - ret i64 %res -} - -; Check a case where the result is tested for equality. -define void @f3(i8 *%src1, i8 *%src2, i64 *%dest) { -; CHECK-LABEL: f3: -; CHECK: clc 0(3,%r2), 0(%r3) -; CHECK-NEXT: ber %r14 -; CHECK: br %r14 - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 3) - %cmp = icmp eq i64 %res, 0 - br i1 %cmp, label %exit, label %store - -store: - store i64 0, i64 *%dest - br label %exit - -exit: - ret void -} - -; Check a case where the result is tested for inequality. -define void @f4(i8 *%src1, i8 *%src2, i64 *%dest) { -; CHECK-LABEL: f4: -; CHECK: clc 0(4,%r2), 0(%r3) -; CHECK-NEXT: blhr %r14 -; CHECK: br %r14 -entry: - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 4) - %cmp = icmp ne i64 %res, 0 - br i1 %cmp, label %exit, label %store - -store: - store i64 0, i64 *%dest - br label %exit - -exit: - ret void -} - -; Check a case where the result is tested via slt. -define void @f5(i8 *%src1, i8 *%src2, i64 *%dest) { -; CHECK-LABEL: f5: -; CHECK: clc 0(5,%r2), 0(%r3) -; CHECK-NEXT: blr %r14 -; CHECK: br %r14 -entry: - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 5) - %cmp = icmp slt i64 %res, 0 - br i1 %cmp, label %exit, label %store - -store: - store i64 0, i64 *%dest - br label %exit - -exit: - ret void -} - -; Check a case where the result is tested for sgt. -define void @f6(i8 *%src1, i8 *%src2, i64 *%dest) { -; CHECK-LABEL: f6: -; CHECK: clc 0(6,%r2), 0(%r3) -; CHECK-NEXT: bhr %r14 -; CHECK: br %r14 -entry: - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 6) - %cmp = icmp sgt i64 %res, 0 - br i1 %cmp, label %exit, label %store - -store: - store i64 0, i64 *%dest - br label %exit - -exit: - ret void -} - -; Check the upper end of the CLC range. Here the result is used both as -; an integer and for branching. -define i64 @f7(i8 *%src1, i8 *%src2, i64 *%dest) { -; CHECK-LABEL: f7: -; CHECK: clc 0(256,%r2), 0(%r3) -; CHECK: ipm [[REG:%r[0-5]]] -; CHECK: srl [[REG]], 28 -; CHECK: rll [[REG]], [[REG]], 31 -; CHECK: lgfr %r2, [[REG]] -; CHECK: blr %r14 -; CHECK: br %r14 -entry: - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 256) - %cmp = icmp slt i64 %res, 0 - br i1 %cmp, label %exit, label %store - -store: - store i64 0, i64 *%dest - br label %exit - -exit: - ret i64 %res -} - -; 257 bytes needs two CLCs. -define i64 @f8(i8 *%src1, i8 *%src2) { -; CHECK-LABEL: f8: -; CHECK: clc 0(256,%r2), 0(%r3) -; CHECK: jlh [[LABEL:\..*]] -; CHECK: clc 256(1,%r2), 256(%r3) -; CHECK: [[LABEL]]: -; CHECK: ipm [[REG:%r[0-5]]] -; CHECK: br %r14 - %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 257) - ret i64 %res -} diff --git a/test/CodeGen/SystemZ/pr32372.ll b/test/CodeGen/SystemZ/pr32372.ll new file mode 100644 index 000000000000..c18e238fbaf9 --- /dev/null +++ b/test/CodeGen/SystemZ/pr32372.ll @@ -0,0 +1,31 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc %s -o - -mtriple=s390x-linux-gnu | FileCheck %s + +define void @pr32372(i8*) { +; CHECK-LABEL: pr32372: +; CHECK: # BB#0: # %BB +; CHECK-NEXT: llc %r1, 0(%r2) +; CHECK-NEXT: mvhhi 0(%r1), -3825 +; CHECK-NEXT: llill %r0, 0 +; CHECK-NEXT: dlr %r0, %r1 +; CHECK-NEXT: .LBB0_1: # %CF251 +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: j .LBB0_1 +BB: + %L = load i8, i8* %0 + store i16 -3825, i16* undef + %L5 = load i8, i8* %0 + %B9 = urem i8 %L5, %L + %I107 = insertelement <8 x i8> zeroinitializer, i8 %B9, i32 7 + %ZE141 = zext i8 %L5 to i16 + br label %CF251 + +CF251: ; preds = %CF258, %CF251, %BB + %Shuff217 = shufflevector <8 x i8> zeroinitializer, <8 x i8> %I107, <8 x i32> <i32 0, i32 2, i32 undef, i32 6, i32 8, i32 undef, i32 12, i32 14> + %Cmp227 = icmp sge i16 %ZE141, 0 + br i1 %Cmp227, label %CF251, label %CF258 + +CF258: ; preds = %CF251 + %Shuff230 = shufflevector <2 x i16> undef, <2 x i16> undef, <2 x i32> <i32 3, i32 1> + br label %CF251 +} diff --git a/test/CodeGen/SystemZ/pr32505.ll b/test/CodeGen/SystemZ/pr32505.ll new file mode 100644 index 000000000000..6abad0220164 --- /dev/null +++ b/test/CodeGen/SystemZ/pr32505.ll @@ -0,0 +1,20 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mcpu=zEC12 -o - %s | FileCheck %s + +target triple = "s390x-ibm-linux" + +define <2 x float> @pr32505(<2 x i8> * %a) { +; CHECK-LABEL: pr32505: +; CHECK: # BB#0: +; CHECK-NEXT: lbh %r0, 0(%r2) +; CHECK-NEXT: ldgr %f0, %r0 +; CHECK-NEXT: lbh %r0, 1(%r2) +; CHECK-NEXT: ldgr %f2, %r0 +; CHECK-NEXT: # kill: %F0S<def> %F0S<kill> %F0D<kill> +; CHECK-NEXT: # kill: %F2S<def> %F2S<kill> %F2D<kill> +; CHECK-NEXT: br %r14 + %L17 = load <2 x i8>, <2 x i8>* %a + %Se21 = sext <2 x i8> %L17 to <2 x i32> + %BC = bitcast <2 x i32> %Se21 to <2 x float> + ret <2 x float> %BC +} diff --git a/test/CodeGen/SystemZ/splitMove_undefReg_mverifier.ll b/test/CodeGen/SystemZ/splitMove_undefReg_mverifier.ll new file mode 100644 index 000000000000..db6e3653b506 --- /dev/null +++ b/test/CodeGen/SystemZ/splitMove_undefReg_mverifier.ll @@ -0,0 +1,413 @@ +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s +; +; Regression test for a machine verifier complaint discovered with llvm-stress. +; Test that splitting of a 128 bit store does not result in use of undef phys reg. + +define void @autogen_SD29355(i8*, i32*, i64*, i32, i64, i8) { +; CHECK: .text +BB: + %A4 = alloca double + %A3 = alloca float + %A2 = alloca i8 + %A1 = alloca double + %A = alloca i64 + %L = load i8, i8* %0 + store i8 33, i8* %0 + %E = extractelement <8 x i1> zeroinitializer, i32 2 + br label %CF261 + +CF261: ; preds = %BB + %Shuff = shufflevector <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i32> <i32 undef, i32 3> + %I = insertelement <8 x i8> zeroinitializer, i8 69, i32 3 + %B = udiv i8 -99, 33 + %Tr = trunc i64 -1 to i32 + %Sl = select i1 true, i64* %2, i64* %2 + %L5 = load i64, i64* %Sl + store i64 %L5, i64* %2 + %E6 = extractelement <4 x i16> zeroinitializer, i32 3 + %Shuff7 = shufflevector <4 x i16> zeroinitializer, <4 x i16> zeroinitializer, <4 x i32> <i32 6, i32 0, i32 2, i32 4> + %I8 = insertelement <4 x i16> %Shuff7, i16 27357, i32 0 + %B9 = xor <4 x i16> %Shuff7, %Shuff7 + %Tr10 = trunc i64 %4 to i1 + br label %CF239 + +CF239: ; preds = %CF261 + %Sl11 = select i1 %Tr10, i16 -1, i16 27357 + %L12 = load i8, i8* %0 + store i64 %L5, i64* %A + %E13 = extractelement <8 x i1> zeroinitializer, i32 0 + br label %CF238 + +CF238: ; preds = %CF238, %CF239 + %Shuff14 = shufflevector <4 x i16> zeroinitializer, <4 x i16> zeroinitializer, <4 x i32> <i32 undef, i32 5, i32 7, i32 1> + %I15 = insertelement <4 x i16> %Shuff7, i16 -1, i32 1 + %B16 = fsub double 0xDACBFCEAC1C99968, 0xDACBFCEAC1C99968 + %Sl17 = select i1 %E, i64* %Sl, i64* %Sl + %Cmp = icmp ugt i16 %E6, 27357 + br i1 %Cmp, label %CF238, label %CF251 + +CF251: ; preds = %CF238 + %L18 = load i64, i64* %Sl17 + store i64 0, i64* %Sl + %E19 = extractelement <4 x i16> zeroinitializer, i32 1 + %Shuff20 = shufflevector <2 x i1> zeroinitializer, <2 x i1> zeroinitializer, <2 x i32> <i32 undef, i32 2> + %I21 = insertelement <2 x i1> zeroinitializer, i1 true, i32 0 + %FC = fptoui float 0x3BE9BD7D80000000 to i1 + br label %CF237 + +CF237: ; preds = %CF237, %CF271, %CF268, %CF251 + %Sl22 = select i1 true, i16 -1, i16 %E6 + %Cmp23 = icmp sgt i1 %E13, true + br i1 %Cmp23, label %CF237, label %CF256 + +CF256: ; preds = %CF256, %CF237 + %L24 = load i64, i64* %A + store i64 %L5, i64* %Sl17 + %E25 = extractelement <4 x i16> zeroinitializer, i32 3 + %Shuff26 = shufflevector <4 x i16> %Shuff7, <4 x i16> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 undef> + %I27 = insertelement <4 x i16> zeroinitializer, i16 %Sl22, i32 0 + %B28 = udiv i16 %Sl11, -1 + %ZE = zext i1 true to i32 + %Sl29 = select i1 true, i8 -99, i8 33 + %Cmp30 = fcmp ord double 0xC275146F92573C4, 0x16FB351AF5F9C998 + br i1 %Cmp30, label %CF256, label %CF271 + +CF271: ; preds = %CF256 + %L31 = load i8, i8* %0 + store i64 %L5, i64* %Sl + %E32 = extractelement <4 x i16> zeroinitializer, i32 2 + %Shuff33 = shufflevector <1 x i32> zeroinitializer, <1 x i32> zeroinitializer, <1 x i32> <i32 1> + %I34 = insertelement <4 x i16> zeroinitializer, i16 %Sl11, i32 1 + %PC = bitcast double* %A4 to i1* + %Sl35 = select i1 %FC, i32* %1, i32* %1 + %Cmp36 = icmp ult <2 x i1> %Shuff20, %Shuff20 + %L37 = load i64, i64* %Sl + store i64 %L5, i64* %Sl + %E38 = extractelement <2 x i32> zeroinitializer, i32 0 + %Shuff39 = shufflevector <4 x i16> zeroinitializer, <4 x i16> %Shuff7, <4 x i32> <i32 undef, i32 1, i32 3, i32 undef> + %I40 = insertelement <4 x i16> %Shuff7, i16 %E19, i32 1 + %ZE41 = zext i1 true to i16 + %Sl42 = select i1 true, i1 true, i1 true + br i1 %Sl42, label %CF237, label %CF246 + +CF246: ; preds = %CF246, %CF271 + %Cmp43 = icmp uge i64 %L37, %L18 + br i1 %Cmp43, label %CF246, label %CF249 + +CF249: ; preds = %CF249, %CF263, %CF246 + %L44 = load i64, i64* %A + store i64 %L5, i64* %Sl17 + %E45 = extractelement <4 x i16> %Shuff14, i32 2 + %Shuff46 = shufflevector <1 x i32> zeroinitializer, <1 x i32> zeroinitializer, <1 x i32> <i32 1> + %I47 = insertelement <4 x i16> %Shuff7, i16 %E6, i32 1 + %Sl48 = select i1 %FC, double 0xDACBFCEAC1C99968, double 0xDACBFCEAC1C99968 + %Cmp49 = fcmp ult double 0x9E8F85AE4F8D6C2C, 0x5A7FED9E637D2C1C + br i1 %Cmp49, label %CF249, label %CF263 + +CF263: ; preds = %CF249 + %L50 = load i64, i64* %Sl + store i1 true, i1* %PC + %E51 = extractelement <2 x i1> zeroinitializer, i32 0 + br i1 %E51, label %CF249, label %CF259 + +CF259: ; preds = %CF259, %CF263 + %Shuff52 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 undef, i32 5, i32 7, i32 1> + %I53 = insertelement <4 x i16> zeroinitializer, i16 -1, i32 1 + %B54 = or <2 x i16> %Shuff, zeroinitializer + %Sl55 = select i1 %Sl42, i16 %Sl22, i16 27357 + %Cmp56 = icmp uge i1 %Sl42, true + br i1 %Cmp56, label %CF259, label %CF268 + +CF268: ; preds = %CF259 + %L57 = load i8, i8* %0 + store i64 %L5, i64* %Sl + %E58 = extractelement <4 x i16> %Shuff14, i32 1 + %Shuff59 = shufflevector <1 x i32> %Shuff33, <1 x i32> %Shuff33, <1 x i32> zeroinitializer + %I60 = insertelement <2 x i1> %Shuff20, i1 true, i32 0 + %B61 = frem double 0x5A7FED9E637D2C1C, %B16 + %FC62 = sitofp i8 -99 to float + %Sl63 = select i1 true, i16 %E19, i16 -1 + %Cmp64 = icmp slt i16 %Sl63, 27357 + br i1 %Cmp64, label %CF237, label %CF241 + +CF241: ; preds = %CF241, %CF265, %CF268 + %L65 = load i1, i1* %PC + br i1 %L65, label %CF241, label %CF262 + +CF262: ; preds = %CF262, %CF270, %CF241 + store i64 %L37, i64* %Sl + %E66 = extractelement <4 x i16> %Shuff14, i32 2 + %Shuff67 = shufflevector <4 x i16> %Shuff26, <4 x i16> %Shuff7, <4 x i32> <i32 1, i32 3, i32 undef, i32 7> + %I68 = insertelement <2 x i32> zeroinitializer, i32 454413, i32 1 + %B69 = sub <4 x i16> %I8, %Shuff7 + %Tr70 = trunc i16 %E32 to i1 + br i1 %Tr70, label %CF262, label %CF270 + +CF270: ; preds = %CF262 + %Sl71 = select i1 %Sl42, <8 x i1> zeroinitializer, <8 x i1> zeroinitializer + %Cmp72 = icmp sge <2 x i16> %B54, zeroinitializer + %L73 = load i64, i64* %Sl + store i64 %L73, i64* %Sl + %E74 = extractelement <8 x i1> %Sl71, i32 5 + br i1 %E74, label %CF262, label %CF265 + +CF265: ; preds = %CF270 + %Shuff75 = shufflevector <2 x i32> %I68, <2 x i32> zeroinitializer, <2 x i32> <i32 undef, i32 2> + %I76 = insertelement <2 x i1> %Cmp72, i1 %Sl42, i32 0 + %B77 = xor i16 27357, %B28 + %PC78 = bitcast i1* %PC to i32* + %Sl79 = select i1 %Cmp64, <4 x i16> %Shuff14, <4 x i16> %Shuff7 + %Cmp80 = icmp slt <2 x i1> zeroinitializer, %Shuff20 + %L81 = load i1, i1* %PC + br i1 %L81, label %CF241, label %CF245 + +CF245: ; preds = %CF245, %CF265 + store i1 true, i1* %PC + %E82 = extractelement <1 x i32> %Shuff33, i32 0 + %Shuff83 = shufflevector <4 x i16> zeroinitializer, <4 x i16> %Shuff14, <4 x i32> <i32 2, i32 4, i32 6, i32 0> + %I84 = insertelement <2 x i1> %Shuff20, i1 %Sl42, i32 0 + %FC85 = uitofp i1 %Cmp to float + %Sl86 = select i1 %Tr10, i16 -1, i16 %Sl63 + %Cmp87 = icmp ugt <2 x i1> %I76, %I60 + %L88 = load i32, i32* %PC78 + store i8 33, i8* %0 + %E89 = extractelement <2 x i32> zeroinitializer, i32 1 + %Shuff90 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff52, <4 x i32> <i32 0, i32 undef, i32 4, i32 6> + %I91 = insertelement <2 x i32> %Shuff75, i32 %ZE, i32 0 + %B92 = add i64 -1, %L73 + %Tr93 = trunc i64 0 to i16 + %Sl94 = select i1 %FC, i64 %L37, i64 %L5 + %Cmp95 = icmp sge i64 454853, %B92 + br i1 %Cmp95, label %CF245, label %CF257 + +CF257: ; preds = %CF245 + %L96 = load i64, i64* %Sl + store i1 true, i1* %PC + %E97 = extractelement <2 x i1> %Shuff20, i32 1 + br label %CF + +CF: ; preds = %CF, %CF258, %CF257 + %Shuff98 = shufflevector <2 x i1> %Cmp80, <2 x i1> zeroinitializer, <2 x i32> <i32 undef, i32 0> + %I99 = insertelement <2 x i1> %Shuff98, i1 %Cmp30, i32 0 + %B100 = sub <8 x i8> zeroinitializer, zeroinitializer + %FC101 = uitofp <2 x i1> %I99 to <2 x double> + %Sl102 = select i1 %FC, i16 %Sl63, i16 %E58 + %Cmp103 = fcmp ord double %B16, 0xDACBFCEAC1C99968 + br i1 %Cmp103, label %CF, label %CF240 + +CF240: ; preds = %CF240, %CF260, %CF + %L104 = load i32, i32* %1 + store i1 true, i1* %PC + %E105 = extractelement <4 x i16> %I8, i32 1 + %Shuff106 = shufflevector <4 x i16> %Shuff7, <4 x i16> %I34, <4 x i32> <i32 4, i32 undef, i32 undef, i32 2> + %I107 = insertelement <2 x i1> %Cmp87, i1 %FC, i32 0 + %ZE108 = zext <4 x i16> %B69 to <4 x i64> + %Sl109 = select i1 %Cmp, i16 27357, i16 %Sl102 + %Cmp110 = icmp sge <4 x i16> %B9, zeroinitializer + %L111 = load i64, i64* %Sl + store i8 %L57, i8* %0 + %E112 = extractelement <2 x i1> %Shuff98, i32 0 + br i1 %E112, label %CF240, label %CF254 + +CF254: ; preds = %CF254, %CF267, %CF264, %CF240 + %Shuff113 = shufflevector <2 x i32> %I68, <2 x i32> zeroinitializer, <2 x i32> undef + %I114 = insertelement <4 x i16> zeroinitializer, i16 27357, i32 3 + %B115 = and i16 %Sl102, %Sl11 + %FC116 = uitofp i16 %B115 to double + %Sl117 = select i1 %L81, i32* %1, i32* %1 + %Cmp118 = icmp ne i64 %Sl94, %L50 + br i1 %Cmp118, label %CF254, label %CF267 + +CF267: ; preds = %CF254 + %L119 = load i64, i64* %Sl + store i32 %ZE, i32* %PC78 + %E120 = extractelement <4 x i16> zeroinitializer, i32 1 + %Shuff121 = shufflevector <1 x i32> %Shuff33, <1 x i32> %Shuff33, <1 x i32> zeroinitializer + %I122 = insertelement <1 x i32> %Shuff121, i32 %E82, i32 0 + %B123 = mul <4 x i16> %I40, %I34 + %Sl124 = select i1 %FC, <4 x i1> %Cmp110, <4 x i1> %Cmp110 + %Cmp125 = icmp ne <4 x i64> %ZE108, zeroinitializer + %L126 = load i64, i64* %Sl + store i32 %ZE, i32* %Sl117 + %E127 = extractelement <2 x i1> %Cmp87, i32 1 + br i1 %E127, label %CF254, label %CF264 + +CF264: ; preds = %CF267 + %Shuff128 = shufflevector <4 x i16> %Shuff83, <4 x i16> %I47, <4 x i32> <i32 undef, i32 2, i32 undef, i32 6> + %I129 = insertelement <4 x i16> %Shuff67, i16 %Sl109, i32 2 + %B130 = add i32 %3, %E38 + %FC131 = sitofp i32 %3 to float + %Sl132 = select i1 %Sl42, i64 %L24, i64 %L5 + %Cmp133 = icmp eq <2 x i1> %I99, %Shuff20 + %L134 = load i32, i32* %PC78 + store i32 %L104, i32* %1 + %E135 = extractelement <8 x i1> zeroinitializer, i32 4 + br i1 %E135, label %CF254, label %CF260 + +CF260: ; preds = %CF264 + %Shuff136 = shufflevector <1 x i32> %Shuff59, <1 x i32> %Shuff121, <1 x i32> undef + %I137 = insertelement <4 x i16> %Shuff67, i16 %Sl55, i32 3 + %B138 = lshr <1 x i32> %Shuff33, %Shuff59 + %Sl139 = select i1 %E135, i64 %L119, i64 %L126 + %Cmp140 = icmp slt i8 -99, %Sl29 + br i1 %Cmp140, label %CF240, label %CF247 + +CF247: ; preds = %CF247, %CF272, %CF260 + %L141 = load i32, i32* %Sl117 + store i8 %5, i8* %0 + %E142 = extractelement <2 x i1> %Cmp36, i32 1 + br i1 %E142, label %CF247, label %CF272 + +CF272: ; preds = %CF247 + %Shuff143 = shufflevector <4 x i64> %Shuff90, <4 x i64> %Shuff52, <4 x i32> <i32 6, i32 undef, i32 2, i32 undef> + %I144 = insertelement <1 x i32> %Shuff121, i32 %L88, i32 0 + %Tr145 = trunc i64 %Sl139 to i16 + %Sl146 = select i1 %Cmp49, i32 %L134, i32 %L104 + %L147 = load i32, i32* %PC78 + store i32 %Tr, i32* %Sl117 + %E148 = extractelement <4 x i16> %Shuff67, i32 3 + %Shuff149 = shufflevector <4 x i16> zeroinitializer, <4 x i16> %Shuff67, <4 x i32> <i32 2, i32 4, i32 6, i32 0> + %I150 = insertelement <2 x i1> zeroinitializer, i1 %E127, i32 0 + %B151 = fdiv double 0x16FB351AF5F9C998, 0xC275146F92573C4 + %FC152 = uitofp <1 x i32> %I144 to <1 x double> + %Sl153 = select i1 %Cmp118, <1 x i32> %Shuff136, <1 x i32> %Shuff121 + %Cmp154 = icmp ule i8 %5, %Sl29 + br i1 %Cmp154, label %CF247, label %CF253 + +CF253: ; preds = %CF253, %CF269, %CF272 + %L155 = load i32, i32* %Sl117 + store i32 %L141, i32* %PC78 + %E156 = extractelement <4 x i1> %Cmp125, i32 2 + br i1 %E156, label %CF253, label %CF269 + +CF269: ; preds = %CF253 + %Shuff157 = shufflevector <1 x i32> %Shuff46, <1 x i32> %Shuff121, <1 x i32> <i32 1> + %I158 = insertelement <4 x i16> %Shuff128, i16 %E66, i32 1 + %B159 = shl i64 %L119, %L73 + %Se = sext i16 %B77 to i32 + %Sl160 = select i1 %Cmp56, i16 %Sl63, i16 %B77 + %L161 = load i64, i64* %Sl + store i32 %B130, i32* %Sl117 + %E162 = extractelement <1 x i32> %Shuff59, i32 0 + %Shuff163 = shufflevector <4 x i16> %Shuff7, <4 x i16> %Shuff67, <4 x i32> <i32 5, i32 7, i32 1, i32 3> + %I164 = insertelement <4 x i16> %Shuff106, i16 27357, i32 3 + %Se165 = sext <4 x i1> %Sl124 to <4 x i8> + %Sl166 = select i1 true, i1 %Cmp, i1 %Tr70 + br i1 %Sl166, label %CF253, label %CF255 + +CF255: ; preds = %CF255, %CF266, %CF269 + %Cmp167 = icmp sge i64 %4, %L24 + br i1 %Cmp167, label %CF255, label %CF266 + +CF266: ; preds = %CF255 + %L168 = load i8, i8* %0 + store i32 %E38, i32* %PC78 + %E169 = extractelement <2 x i16> zeroinitializer, i32 1 + %Shuff170 = shufflevector <4 x i16> %Sl79, <4 x i16> %I137, <4 x i32> <i32 6, i32 0, i32 2, i32 4> + %I171 = insertelement <4 x i16> %Shuff163, i16 %ZE41, i32 0 + %Tr172 = trunc i16 %Tr145 to i1 + br i1 %Tr172, label %CF255, label %CF258 + +CF258: ; preds = %CF266 + %Sl173 = select i1 true, <2 x i32> %I68, <2 x i32> %I91 + %Cmp174 = icmp ugt <2 x i1> %Cmp72, %I150 + %L175 = load i32, i32* %Sl117 + store i32 %L104, i32* %Sl117 + %E176 = extractelement <4 x i16> %Shuff67, i32 1 + %Shuff177 = shufflevector <1 x i32> %Shuff121, <1 x i32> %Shuff33, <1 x i32> zeroinitializer + %I178 = insertelement <4 x i16> zeroinitializer, i16 27357, i32 0 + %FC179 = sitofp <4 x i16> %I47 to <4 x float> + %Sl180 = select i1 %FC, i64 %L126, i64 %B92 + %Cmp181 = fcmp ugt double %B61, %B16 + br i1 %Cmp181, label %CF, label %CF236 + +CF236: ; preds = %CF236, %CF258 + %L182 = load i8, i8* %0 + store i32 %E38, i32* %Sl117 + %E183 = extractelement <1 x i32> %Shuff121, i32 0 + %Shuff184 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff90, <4 x i32> <i32 7, i32 undef, i32 3, i32 5> + %I185 = insertelement <4 x i16> %Shuff106, i16 %Tr93, i32 1 + %ZE186 = zext i32 %E162 to i64 + %Sl187 = select i1 %Cmp95, <8 x i8> %B100, <8 x i8> %B100 + %Cmp188 = icmp uge i16 %B115, %Sl11 + br i1 %Cmp188, label %CF236, label %CF242 + +CF242: ; preds = %CF242, %CF250, %CF248, %CF236 + %L189 = load i8, i8* %0 + store i8 %Sl29, i8* %0 + %E190 = extractelement <4 x i16> %B9, i32 3 + %Shuff191 = shufflevector <4 x i16> %Shuff26, <4 x i16> %Shuff26, <4 x i32> <i32 6, i32 0, i32 2, i32 4> + %I192 = insertelement <1 x i32> %I122, i32 %3, i32 0 + %B193 = udiv i8 %5, %L168 + %Se194 = sext <8 x i1> %Sl71 to <8 x i32> + %Sl195 = select i1 %Cmp188, i8 %L182, i8 %L168 + %Cmp196 = icmp slt i16 %B77, %Sl102 + br i1 %Cmp196, label %CF242, label %CF250 + +CF250: ; preds = %CF242 + %L197 = load i64, i64* %Sl + store i32 %ZE, i32* %Sl117 + %E198 = extractelement <2 x i1> %Shuff20, i32 1 + br i1 %E198, label %CF242, label %CF244 + +CF244: ; preds = %CF244, %CF250 + %Shuff199 = shufflevector <1 x i32> %Shuff46, <1 x i32> %Shuff177, <1 x i32> zeroinitializer + %I200 = insertelement <4 x i16> %Shuff191, i16 %Sl86, i32 0 + %B201 = mul i16 %ZE41, %E169 + %Se202 = sext <4 x i16> %I171 to <4 x i64> + %Sl203 = select i1 %Sl166, i32 %E162, i32 %E82 + %Cmp204 = icmp ule i16 %E32, %E120 + br i1 %Cmp204, label %CF244, label %CF248 + +CF248: ; preds = %CF244 + %L205 = load float, float* %A3 + store i32 %Tr, i32* %PC78 + %E206 = extractelement <2 x i1> %Shuff20, i32 1 + br i1 %E206, label %CF242, label %CF243 + +CF243: ; preds = %CF243, %CF273, %CF248 + %Shuff207 = shufflevector <8 x i1> zeroinitializer, <8 x i1> %Sl71, <8 x i32> <i32 4, i32 6, i32 8, i32 undef, i32 12, i32 undef, i32 undef, i32 2> + %I208 = insertelement <2 x i1> %Shuff20, i1 %E198, i32 0 + %B209 = xor <4 x i16> %I129, %I34 + %FC210 = uitofp <8 x i8> zeroinitializer to <8 x double> + %Sl211 = select i1 %E74, i16 %Tr93, i16 %E19 + %Cmp212 = icmp ugt i32 %Se, %E38 + br i1 %Cmp212, label %CF243, label %CF273 + +CF273: ; preds = %CF243 + %L213 = load i32, i32* %PC78 + store i8 %L168, i8* %0 + %E214 = extractelement <2 x i32> %Shuff113, i32 1 + %Shuff215 = shufflevector <4 x i16> %Shuff128, <4 x i16> %I137, <4 x i32> <i32 6, i32 0, i32 2, i32 4> + %I216 = insertelement <2 x i1> %Shuff20, i1 %Cmp30, i32 0 + %B217 = sub <4 x i16> %Shuff83, %I185 + %Tr218 = trunc <4 x i16> %B9 to <4 x i1> + %Sl219 = select i1 %Cmp154, i8 %B, i8 %5 + %Cmp220 = icmp uge <4 x i64> %Shuff52, %Shuff52 + %L221 = load i32, i32* %Sl117 + store i8 %L168, i8* %0 + %E222 = extractelement <4 x i16> %Shuff191, i32 0 + %Shuff223 = shufflevector <4 x i16> %Shuff26, <4 x i16> %I34, <4 x i32> <i32 undef, i32 1, i32 3, i32 5> + %I224 = insertelement <4 x i16> %Shuff26, i16 %Tr145, i32 1 + %FC225 = sitofp i1 %Cmp56 to float + %Sl226 = select i1 %E, i1 %Cmp154, i1 %Sl166 + br i1 %Sl226, label %CF243, label %CF252 + +CF252: ; preds = %CF273 + %Cmp227 = icmp ugt <4 x i64> %Shuff143, zeroinitializer + %L228 = load i32, i32* %Sl117 + store i32 %Tr, i32* %PC78 + %E229 = extractelement <4 x i16> %Shuff163, i32 2 + %Shuff230 = shufflevector <1 x i32> %Shuff199, <1 x i32> zeroinitializer, <1 x i32> <i32 1> + %I231 = insertelement <4 x i16> %Shuff106, i16 %E32, i32 1 + %B232 = srem i32 %Sl203, %Sl203 + %FC233 = fptoui double 0x5A7FED9E637D2C1C to i32 + %Sl234 = select i1 %Cmp103, i8 %B193, i8 %L168 + %Cmp235 = icmp uge <2 x i16> zeroinitializer, zeroinitializer + store i32 %ZE, i32* %PC78 + store i64 %L5, i64* %Sl + store i8 33, i8* %0 + store i8 %L168, i8* %0 + store i1 %Sl226, i1* %PC + ret void +} diff --git a/test/CodeGen/SystemZ/stack-guard.ll b/test/CodeGen/SystemZ/stack-guard.ll index 0889e7ba941e..2908cbe92bbb 100644 --- a/test/CodeGen/SystemZ/stack-guard.ll +++ b/test/CodeGen/SystemZ/stack-guard.ll @@ -17,19 +17,19 @@ define i32 @test_stack_guard() #0 { entry: %a1 = alloca [256 x i32], align 4 %0 = bitcast [256 x i32]* %a1 to i8* - call void @llvm.lifetime.start(i64 1024, i8* %0) + call void @llvm.lifetime.start.p0i8(i64 1024, i8* %0) %arraydecay = getelementptr inbounds [256 x i32], [256 x i32]* %a1, i64 0, i64 0 call void @foo3(i32* %arraydecay) - call void @llvm.lifetime.end(i64 1024, i8* %0) + call void @llvm.lifetime.end.p0i8(i64 1024, i8* %0) ret i32 0 } ; Function Attrs: nounwind -declare void @llvm.lifetime.start(i64, i8* nocapture) +declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) declare void @foo3(i32*) ; Function Attrs: nounwind -declare void @llvm.lifetime.end(i64, i8* nocapture) +declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) attributes #0 = { sspstrong } diff --git a/test/CodeGen/SystemZ/strcmp-02.ll b/test/CodeGen/SystemZ/strcmp-02.ll deleted file mode 100644 index 99d7d9cfa692..000000000000 --- a/test/CodeGen/SystemZ/strcmp-02.ll +++ /dev/null @@ -1,72 +0,0 @@ -; Test strcmp using CLST, i64 version. -; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s - -declare i64 @strcmp(i8 *%src1, i8 *%src2) - -; Check a case where the result is used as an integer. -define i64 @f1(i8 *%src1, i8 *%src2) { -; CHECK-LABEL: f1: -; CHECK: lhi %r0, 0 -; CHECK: [[LABEL:\.[^:]*]]: -; CHECK: clst %r2, %r3 -; CHECK-NEXT: jo [[LABEL]] -; CHECK-NEXT: BB#{{[0-9]+}} -; CHECK-NEXT: ipm [[REG:%r[0-5]]] -; CHECK: srl [[REG]], 28 -; CHECK: rll [[REG]], [[REG]], 31 -; CHECK: lgfr %r2, [[REG]] -; CHECK: br %r14 - %res = call i64 @strcmp(i8 *%src1, i8 *%src2) - ret i64 %res -} - -; Check a case where the result is tested for equality. -define void @f2(i8 *%src1, i8 *%src2, i64 *%dest) { -; CHECK-LABEL: f2: -; CHECK: lhi %r0, 0 -; CHECK: [[LABEL:\.[^:]*]]: -; CHECK: clst %r2, %r3 -; CHECK-NEXT: jo [[LABEL]] -; CHECK-NEXT: BB#{{[0-9]+}} -; CHECK-NEXT: ber %r14 -; CHECK: br %r14 - %res = call i64 @strcmp(i8 *%src1, i8 *%src2) - %cmp = icmp eq i64 %res, 0 - br i1 %cmp, label %exit, label %store - -store: - store i64 0, i64 *%dest - br label %exit - -exit: - ret void -} - -; Test a case where the result is used both as an integer and for -; branching. -define i64 @f3(i8 *%src1, i8 *%src2, i64 *%dest) { -; CHECK-LABEL: f3: -; CHECK: lhi %r0, 0 -; CHECK: [[LABEL:\.[^:]*]]: -; CHECK: clst %r2, %r3 -; CHECK-NEXT: jo [[LABEL]] -; CHECK-NEXT: BB#{{[0-9]+}} -; CHECK-NEXT: ipm [[REG:%r[0-5]]] -; CHECK: srl [[REG]], 28 -; CHECK: rll [[REG]], [[REG]], 31 -; CHECK: lgfr %r2, [[REG]] -; CHECK: blr %r14 -; CHECK: br %r14 -entry: - %res = call i64 @strcmp(i8 *%src1, i8 *%src2) - %cmp = icmp slt i64 %res, 0 - br i1 %cmp, label %exit, label %store - -store: - store i64 0, i64 *%dest - br label %exit - -exit: - ret i64 %res -} diff --git a/test/CodeGen/SystemZ/strlen-02.ll b/test/CodeGen/SystemZ/strlen-02.ll deleted file mode 100644 index e1abbff4b4e0..000000000000 --- a/test/CodeGen/SystemZ/strlen-02.ll +++ /dev/null @@ -1,39 +0,0 @@ -; Test strlen using SRST, i32 version. -; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s - -declare i32 @strlen(i8 *%src) -declare i32 @strnlen(i8 *%src, i32 %len) - -; Test strlen with an i32-based prototype. It would also be valid for -; the uses of %r3 and REG after the LGR to be swapped. -define i32 @f1(i32 %dummy, i8 *%src) { -; CHECK-LABEL: f1: -; CHECK-DAG: lhi %r0, 0 -; CHECK-DAG: lghi %r2, 0 -; CHECK-DAG: lgr [[REG:%r[145]]], %r3 -; CHECK: [[LABEL:\.[^:]*]]: -; CHECK-NEXT: srst %r2, [[REG]] -; CHECK-NEXT: jo [[LABEL]] -; CHECK-NEXT: BB#{{[0-9]+}} -; CHECK-NEXT: sgr %r2, %r3 -; CHECK: br %r14 - %res = call i32 @strlen(i8 *%src) - ret i32 %res -} - -; Test strnlen with an i32-based prototype. -define i32 @f2(i32 zeroext %len, i8 *%src) { -; CHECK-LABEL: f2: -; CHECK-DAG: agr %r2, %r3 -; CHECK-DAG: lhi %r0, 0 -; CHECK-DAG: lgr [[REG:%r[145]]], %r3 -; CHECK: [[LABEL:\.[^:]*]]: -; CHECK-NEXT: srst %r2, [[REG]] -; CHECK-NEXT: jo [[LABEL]] -; CHECK-NEXT: BB#{{[0-9]+}} -; CHECK-NEXT: sgr %r2, %r3 -; CHECK: br %r14 - %res = call i32 @strnlen(i8 *%src, i32 %len) - ret i32 %res -} diff --git a/test/CodeGen/SystemZ/unaligned-01.ll b/test/CodeGen/SystemZ/unaligned-01.ll index 94cad0e1743a..2af1aa79a23f 100644 --- a/test/CodeGen/SystemZ/unaligned-01.ll +++ b/test/CodeGen/SystemZ/unaligned-01.ll @@ -1,10 +1,7 @@ ; Check that unaligned accesses are allowed in general. We check the ; few exceptions (like CRL) in their respective test files. ; -; FIXME: -combiner-alias-analysis (the default for SystemZ) stops -; f1 from being optimized. -; RUN: llc < %s -mtriple=s390x-linux-gnu -combiner-alias-analysis=false \ -; RUN: | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; Check that these four byte stores become a single word store. define void @f1(i8 *%ptr) { diff --git a/test/CodeGen/SystemZ/undef-flag.ll b/test/CodeGen/SystemZ/undef-flag.ll new file mode 100644 index 000000000000..0e6d87ec960f --- /dev/null +++ b/test/CodeGen/SystemZ/undef-flag.ll @@ -0,0 +1,22 @@ +; Test that the backend does not mess up the I/R in case of a use of an undef +; register. This typically happens while expanding a pseudo or otherwise +; replacing an instruction for another. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s + +; LLCRMux +define void @f1(i8*) { +; CHECK-LABEL: f1: +; CHECK-NOT: *** Bad machine code: Using an undefined physical register *** +BB: + %L5 = load i8, i8* %0 + %B9 = lshr i8 %L5, -1 + br label %CF + +CF: ; preds = %CF, %BB + %Cmp25 = icmp ne i8 27, %B9 + br i1 %Cmp25, label %CF, label %CF34 + +CF34: ; preds = %CF + ret void +} diff --git a/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll b/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll new file mode 100644 index 000000000000..271513f2e9ed --- /dev/null +++ b/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll @@ -0,0 +1,5784 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; +; Test that a vector select with a logic combination of two compares do not +; produce any unnecessary pack, unpack or shift instructions. +; And, Or and Xor are tested. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s + + +define <2 x i8> @fun0(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun0: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun1(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun1: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i8> @fun2(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun2: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i32> @fun3(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun3: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i32> @fun4(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun4: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i16> @fun5(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun5: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun6(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun6: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i8> @fun7(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun7: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun8(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun8: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun9(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun9: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i8> @fun10(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun10: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i8> @fun11(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun11: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI11_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x double> @fun12(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { +; CHECK-LABEL: fun12: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x double> %val5, <2 x double> %val6 + ret <2 x double> %sel +} + +define <2 x i16> @fun13(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun13: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI13_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i16> @fun14(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun14: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun15(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun15: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i64> @fun16(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun16: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun17(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun17: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun18(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun18: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun19(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun19: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i16> @fun20(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun20: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI20_0 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun21(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun21: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun22(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun22: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun23(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun23: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI23_0 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun24(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun24: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i32> @fun25(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun25: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = and <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <4 x i16> @fun26(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun26: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i32> @fun27(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun27: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun28(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun28: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i32> @fun29(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun29: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v27 +; CHECK-NEXT: vceqg %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i16> @fun30(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun30: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i8> @fun31(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun31: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI31_0 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <4 x i32> @fun32(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun32: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun33(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun33: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v25, %v29 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i64> @fun34(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun34: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x float> @fun35(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun35: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x i16> @fun36(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun36: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x float> @fun37(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun37: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x double> @fun38(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { +; CHECK-LABEL: fun38: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x double> %val5, <4 x double> %val6 + ret <4 x double> %sel +} + +define <4 x i8> @fun39(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun39: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: larl %r1, .LCPI39_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = and <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <8 x i8> @fun40(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun40: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun41(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun41: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun42(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun42: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i64> @fun43(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun43: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vceqf %v0, %v28, %v25 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v27 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i32> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <8 x i8> @fun44(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun44: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v31 +; CHECK-NEXT: vceqg %v2, %v28, %v29 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vlrepg %v1, 200(%r15) +; CHECK-NEXT: vlrepg %v2, 192(%r15) +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun45(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun45: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun46(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun46: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i32> @fun47(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun47: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x double> @fun48(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun48: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v31, %v31 +; CHECK-NEXT: vmrlf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v31, %v31 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x double> @fun49(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun49: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vn %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x i64> @fun50(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun50: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vn %v1, %v1, %v2 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vn %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vfchdb %v2, %v27, %v2 +; CHECK-NEXT: vn %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <8 x float> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = and <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <16 x i8> @fun51(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun51: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun52(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun52: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i64> @fun53(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun53: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqh %v0, %v28, %v25 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v0 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vceqh %v2, %v30, %v27 +; CHECK-NEXT: vlr %v30, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vn %v1, %v1, %v2 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vmrlg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun54(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun54: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vmrlg %v3, %v1, %v1 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vn %v2, %v3, %v2 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 416(%r15) +; CHECK-NEXT: vl %v5, 288(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v3, %v27, %v3 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v1, %v1, %v3 +; CHECK-NEXT: vuphf %v3, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun55(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun55: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v28, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 448(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vpkf %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 464(%r15) +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 480(%r15) +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 496(%r15) +; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 512(%r15) +; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v31, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vn %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 560(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i16> @fun56(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun56: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrlf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlf %v2, %v0, %v0 +; CHECK-NEXT: vmrlf %v3, %v27, %v27 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v0, %v3, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i8> @fun57(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun57: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vfchdb %v2, %v29, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v2, %v30, %v2 +; CHECK-NEXT: vfchdb %v3, %v28, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i8> @fun58(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun58: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v25, %v29 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun59(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun59: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i32> @fun60(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun60: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v27, %v31 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x i8> @fun61(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun61: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v31, %v0 +; CHECK-NEXT: vceqf %v1, %v29, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v27, %v1 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vn %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i32> @fun62(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun62: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vn %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqg %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x double> @fun63(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { +; CHECK-LABEL: fun63: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vmrlf %v1, %v0, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 416(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vn %v1, %v1, %v2 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vuphh %v4, %v3 +; CHECK-NEXT: vn %v2, %v4, %v2 +; CHECK-NEXT: vuphf %v4, %v2 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vmrlf %v5, %v4, %v4 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrhf %v4, %v4, %v4 +; CHECK-NEXT: vmrlg %v3, %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v31, %v31 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v4, %v6, %v4 +; CHECK-NEXT: vl %v6, 320(%r15) +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v5, 448(%r15) +; CHECK-NEXT: vn %v3, %v3, %v4 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 +; CHECK-NEXT: vl %v4, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vmrlg %v0, %v3, %v3 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x double> %val5, <16 x double> %val6 + ret <16 x double> %sel +} + +define <16 x i32> @fun64(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun64: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vn %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vn %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vfchdb %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vn %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = and <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <2 x i8> @fun65(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun65: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun66(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun66: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i8> @fun67(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun67: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i32> @fun68(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun68: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i32> @fun69(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun69: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i16> @fun70(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun70: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun71(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun71: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i8> @fun72(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun72: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun73(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun73: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun74(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun74: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i8> @fun75(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun75: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i8> @fun76(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun76: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI76_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x double> @fun77(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { +; CHECK-LABEL: fun77: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x double> %val5, <2 x double> %val6 + ret <2 x double> %sel +} + +define <2 x i16> @fun78(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun78: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI78_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i16> @fun79(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun79: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun80(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun80: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i64> @fun81(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun81: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun82(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun82: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun83(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun83: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun84(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun84: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i16> @fun85(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun85: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI85_0 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun86(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun86: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun87(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun87: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun88(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun88: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI88_0 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun89(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun89: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i32> @fun90(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun90: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = or <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <4 x i16> @fun91(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun91: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i32> @fun92(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun92: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun93(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun93: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i32> @fun94(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun94: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v27 +; CHECK-NEXT: vceqg %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i16> @fun95(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun95: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i8> @fun96(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun96: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI96_0 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <4 x i32> @fun97(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun97: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun98(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun98: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v25, %v29 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i64> @fun99(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun99: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x float> @fun100(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun100: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x i16> @fun101(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun101: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x float> @fun102(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun102: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x double> @fun103(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { +; CHECK-LABEL: fun103: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x double> %val5, <4 x double> %val6 + ret <4 x double> %sel +} + +define <4 x i8> @fun104(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun104: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: larl %r1, .LCPI104_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = or <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <8 x i8> @fun105(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun105: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun106(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun106: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun107(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun107: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i64> @fun108(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun108: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vceqf %v0, %v28, %v25 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v27 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i32> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <8 x i8> @fun109(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun109: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v31 +; CHECK-NEXT: vceqg %v2, %v28, %v29 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vlrepg %v1, 200(%r15) +; CHECK-NEXT: vlrepg %v2, 192(%r15) +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun110(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun110: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun111(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun111: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i32> @fun112(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun112: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x double> @fun113(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun113: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v31, %v31 +; CHECK-NEXT: vmrlf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v31, %v31 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x double> @fun114(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun114: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vo %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x i64> @fun115(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun115: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vo %v1, %v1, %v2 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vo %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vfchdb %v2, %v27, %v2 +; CHECK-NEXT: vo %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <8 x float> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = or <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <16 x i8> @fun116(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun116: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun117(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun117: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i64> @fun118(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun118: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqh %v0, %v28, %v25 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v0 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vceqh %v2, %v30, %v27 +; CHECK-NEXT: vlr %v30, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vo %v1, %v1, %v2 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vmrlg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun119(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun119: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vmrlg %v3, %v1, %v1 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vo %v2, %v3, %v2 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 416(%r15) +; CHECK-NEXT: vl %v5, 288(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v3, %v27, %v3 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v1, %v1, %v3 +; CHECK-NEXT: vuphf %v3, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun120(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun120: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v28, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 448(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vpkf %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 464(%r15) +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 480(%r15) +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 496(%r15) +; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 512(%r15) +; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v31, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vo %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 560(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i16> @fun121(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun121: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrlf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlf %v2, %v0, %v0 +; CHECK-NEXT: vmrlf %v3, %v27, %v27 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v0, %v3, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i8> @fun122(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun122: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vfchdb %v2, %v29, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v2, %v30, %v2 +; CHECK-NEXT: vfchdb %v3, %v28, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i8> @fun123(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun123: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v25, %v29 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun124(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun124: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i32> @fun125(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun125: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v27, %v31 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x i8> @fun126(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun126: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v31, %v0 +; CHECK-NEXT: vceqf %v1, %v29, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v27, %v1 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vo %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i32> @fun127(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun127: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vo %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqg %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x double> @fun128(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { +; CHECK-LABEL: fun128: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vmrlf %v1, %v0, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 416(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vo %v1, %v1, %v2 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vuphh %v4, %v3 +; CHECK-NEXT: vo %v2, %v4, %v2 +; CHECK-NEXT: vuphf %v4, %v2 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vmrlf %v5, %v4, %v4 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrhf %v4, %v4, %v4 +; CHECK-NEXT: vmrlg %v3, %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v31, %v31 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v4, %v6, %v4 +; CHECK-NEXT: vl %v6, 320(%r15) +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v5, 448(%r15) +; CHECK-NEXT: vo %v3, %v3, %v4 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 +; CHECK-NEXT: vl %v4, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vmrlg %v0, %v3, %v3 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x double> %val5, <16 x double> %val6 + ret <16 x double> %sel +} + +define <16 x i32> @fun129(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun129: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vo %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vo %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vfchdb %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vo %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = or <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <2 x i8> @fun130(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun130: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun131(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun131: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i8> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i8> @fun132(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun132: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v28, %v30 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i32> @fun133(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun133: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i32> @fun134(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun134: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i16> @fun135(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun135: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun136(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun136: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i8> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i8> @fun137(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun137: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i16> @fun138(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun138: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun139(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun139: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i16> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i8> @fun140(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun140: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v28, %v30 +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x i8> @fun141(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i8> %val5, <2 x i8> %val6) { +; CHECK-LABEL: fun141: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI141_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i8> %val5, <2 x i8> %val6 + ret <2 x i8> %sel +} + +define <2 x double> @fun142(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4, <2 x double> %val5, <2 x double> %val6) { +; CHECK-LABEL: fun142: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x double> %val5, <2 x double> %val6 + ret <2 x double> %sel +} + +define <2 x i16> @fun143(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun143: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI143_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i16> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i16> @fun144(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun144: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i32> @fun145(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun145: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <2 x i64> @fun146(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun146: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i32> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun147(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun147: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun148(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun148: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun149(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun149: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i32> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i16> @fun150(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun150: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI150_0 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x i64> @fun151(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun151: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = icmp eq <2 x i64> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i64> @fun152(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4, <2 x i64> %val5, <2 x i64> %val6) { +; CHECK-LABEL: fun152: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i64> %val5, <2 x i64> %val6 + ret <2 x i64> %sel +} + +define <2 x i16> @fun153(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i16> %val5, <2 x i16> %val6) { +; CHECK-LABEL: fun153: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v28, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI153_0 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <2 x i64> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i16> %val5, <2 x i16> %val6 + ret <2 x i16> %sel +} + +define <2 x float> @fun154(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4, <2 x float> %val5, <2 x float> %val6) { +; CHECK-LABEL: fun154: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x float> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x float> %val5, <2 x float> %val6 + ret <2 x float> %sel +} + +define <2 x i32> @fun155(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4, <2 x i32> %val5, <2 x i32> %val6) { +; CHECK-LABEL: fun155: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v30 +; CHECK-NEXT: vpkg %v1, %v1, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <2 x float> %val1, %val2 + %cmp1 = fcmp ogt <2 x double> %val3, %val4 + %and = xor <2 x i1> %cmp0, %cmp1 + %sel = select <2 x i1> %and, <2 x i32> %val5, <2 x i32> %val6 + ret <2 x i32> %sel +} + +define <4 x i16> @fun156(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun156: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i32> @fun157(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun157: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun158(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun158: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v28, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i32> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i32> @fun159(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun159: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v27 +; CHECK-NEXT: vceqg %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i16> @fun160(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun160: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x i8> @fun161(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun161: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v26 +; CHECK-NEXT: larl %r1, .LCPI161_0 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i32> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <4 x i32> @fun162(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i32> %val5, <4 x i32> %val6) { +; CHECK-LABEL: fun162: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i32> %val5, <4 x i32> %val6 + ret <4 x i32> %sel +} + +define <4 x i64> @fun163(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun163: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v25, %v29 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = icmp eq <4 x i64> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x i64> @fun164(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i64> %val5, <4 x i64> %val6) { +; CHECK-LABEL: fun164: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v2, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v26, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i64> %val5, <4 x i64> %val6 + ret <4 x i64> %sel +} + +define <4 x float> @fun165(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun165: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v27, %v31 +; CHECK-NEXT: vceqg %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v29 +; CHECK-NEXT: vceqg %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <4 x i64> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x i16> @fun166(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x i16> %val5, <4 x i16> %val6) { +; CHECK-LABEL: fun166: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i16> %val5, <4 x i16> %val6 + ret <4 x i16> %sel +} + +define <4 x float> @fun167(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x float> %val5, <4 x float> %val6) { +; CHECK-LABEL: fun167: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x float> %val5, <4 x float> %val6 + ret <4 x float> %sel +} + +define <4 x double> @fun168(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4, <4 x double> %val5, <4 x double> %val6) { +; CHECK-LABEL: fun168: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x float> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x double> %val5, <4 x double> %val6 + ret <4 x double> %sel +} + +define <4 x i8> @fun169(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4, <4 x i8> %val5, <4 x i8> %val6) { +; CHECK-LABEL: fun169: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v27 +; CHECK-NEXT: vfchdb %v1, %v28, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: larl %r1, .LCPI169_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <4 x float> %val1, %val2 + %cmp1 = fcmp ogt <4 x double> %val3, %val4 + %and = xor <4 x i1> %cmp0, %cmp1 + %sel = select <4 x i1> %and, <4 x i8> %val5, <4 x i8> %val6 + ret <4 x i8> %sel +} + +define <8 x i8> @fun170(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun170: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun171(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun171: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun172(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun172: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v28, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i16> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i64> @fun173(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun173: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vceqf %v0, %v28, %v25 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v26, %v31, %v2, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v27 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i32> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <8 x i8> @fun174(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i8> %val5, <8 x i8> %val6) { +; CHECK-LABEL: fun174: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v30, %v31 +; CHECK-NEXT: vceqg %v2, %v28, %v29 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vlrepg %v1, 200(%r15) +; CHECK-NEXT: vlrepg %v2, 192(%r15) +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i8> %val5, <8 x i8> %val6 + ret <8 x i8> %sel +} + +define <8 x i16> @fun175(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4, <8 x i16> %val5, <8 x i16> %val6) { +; CHECK-LABEL: fun175: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v29, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i16> %val5, <8 x i16> %val6 + ret <8 x i16> %sel +} + +define <8 x i32> @fun176(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun176: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v26 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i16> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x i32> @fun177(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4, <8 x i32> %val5, <8 x i32> %val6) { +; CHECK-LABEL: fun177: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = icmp eq <8 x i64> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i32> %val5, <8 x i32> %val6 + ret <8 x i32> %sel +} + +define <8 x double> @fun178(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun178: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v31, %v31 +; CHECK-NEXT: vmrlf %v2, %v27, %v27 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v31, %v31 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x float> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x double> @fun179(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4, <8 x double> %val5, <8 x double> %val6) { +; CHECK-LABEL: fun179: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqf %v2, %v26, %v30 +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vx %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <8 x i32> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x double> %val5, <8 x double> %val6 + ret <8 x double> %sel +} + +define <8 x i64> @fun180(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4, <8 x i64> %val5, <8 x i64> %val6) { +; CHECK-LABEL: fun180: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 224(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vx %v1, %v1, %v2 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vx %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vfchdb %v2, %v27, %v2 +; CHECK-NEXT: vx %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = fcmp ogt <8 x float> %val1, %val2 + %cmp1 = fcmp ogt <8 x double> %val3, %val4 + %and = xor <8 x i1> %cmp0, %cmp1 + %sel = select <8 x i1> %and, <8 x i64> %val5, <8 x i64> %val6 + ret <8 x i64> %sel +} + +define <16 x i8> @fun181(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun181: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun182(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun182: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v28, %v30 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v1 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i8> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i64> @fun183(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun183: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vceqh %v0, %v28, %v25 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v0 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v24, %v29, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v31, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v0, %v3, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vceqh %v2, %v30, %v27 +; CHECK-NEXT: vlr %v30, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vx %v1, %v1, %v2 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v27, %v4, %v3, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vmrlg %v2, %v1, %v1 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v29, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun184(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun184: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v3, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vpkg %v2, %v1, %v1 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vl %v5, 256(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vmrlg %v3, %v1, %v1 +; CHECK-NEXT: vuphb %v3, %v3 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vx %v2, %v3, %v2 +; CHECK-NEXT: vuphf %v3, %v2 +; CHECK-NEXT: vsldb %v1, %v1, %v1, 12 +; CHECK-NEXT: vsel %v25, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vl %v4, 416(%r15) +; CHECK-NEXT: vl %v5, 288(%r15) +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vceqf %v3, %v27, %v3 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v1, %v1, %v3 +; CHECK-NEXT: vuphf %v3, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v29, %v5, %v4, %v3 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vl %v4, 240(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v3, %v0 +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i64> @fun185(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i64> %val5, <16 x i64> %val6) { +; CHECK-LABEL: fun185: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v28, %v0 +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 448(%r15) +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vpkf %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 464(%r15) +; CHECK-NEXT: vl %v3, 336(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v2, %v1 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 480(%r15) +; CHECK-NEXT: vsel %v28, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 496(%r15) +; CHECK-NEXT: vsel %v30, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 512(%r15) +; CHECK-NEXT: vsel %v25, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v3, 400(%r15) +; CHECK-NEXT: vsldb %v2, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vceqg %v1, %v31, %v1 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 528(%r15) +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vl %v3, 416(%r15) +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vsldb %v2, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v2, %v2 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 544(%r15) +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vceqg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 432(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vx %v0, %v0, %v1 +; CHECK-NEXT: vl %v1, 560(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i64> %val5, <16 x i64> %val6 + ret <16 x i64> %sel +} + +define <16 x i16> @fun186(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun186: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrlf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vuphb %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vmrlf %v2, %v0, %v0 +; CHECK-NEXT: vmrlf %v3, %v27, %v27 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v27, %v27 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v0, %v3, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v2 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vpkf %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i8> @fun187(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun187: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 288(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v31, %v1 +; CHECK-NEXT: vfchdb %v2, %v29, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v2, %v30, %v2 +; CHECK-NEXT: vfchdb %v3, %v28, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vceqb %v1, %v24, %v26 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i8> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i8> @fun188(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun188: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v25, %v29 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i16> @fun189(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i16> %val5, <16 x i16> %val6) { +; CHECK-LABEL: fun189: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqh %v0, %v27, %v31 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i16> %val5, <16 x i16> %val6 + ret <16 x i16> %sel +} + +define <16 x i32> @fun190(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun190: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v25, %v29 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v27, %v31 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v3, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i16> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x i8> @fun191(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4, <16 x i8> %val5, <16 x i8> %val6) { +; CHECK-LABEL: fun191: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v31, %v0 +; CHECK-NEXT: vceqf %v1, %v29, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v1, %v27, %v1 +; CHECK-NEXT: vceqf %v2, %v25, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vceqh %v2, %v24, %v28 +; CHECK-NEXT: vx %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i32> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i8> %val5, <16 x i8> %val6 + ret <16 x i8> %sel +} + +define <16 x i32> @fun192(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun192: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vx %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vceqg %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = icmp eq <16 x i64> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + +define <16 x double> @fun193(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4, <16 x double> %val5, <16 x double> %val6) { +; CHECK-LABEL: fun193: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vmrlf %v1, %v0, %v0 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v0, %v0, %v0 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vl %v4, 224(%r15) +; CHECK-NEXT: vl %v5, 416(%r15) +; CHECK-NEXT: vl %v6, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v1 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vuphf %v2, %v0 +; CHECK-NEXT: vsel %v24, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vl %v4, 256(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vl %v3, 384(%r15) +; CHECK-NEXT: vx %v1, %v1, %v2 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v4, %v3, %v2 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vmrlf %v3, %v2, %v2 +; CHECK-NEXT: vmrlf %v4, %v29, %v29 +; CHECK-NEXT: vmrhf %v2, %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v2, %v4, %v2 +; CHECK-NEXT: vpkg %v2, %v2, %v3 +; CHECK-NEXT: vceqh %v3, %v26, %v30 +; CHECK-NEXT: vuphh %v4, %v3 +; CHECK-NEXT: vx %v2, %v4, %v2 +; CHECK-NEXT: vuphf %v4, %v2 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 208(%r15) +; CHECK-NEXT: vmrlf %v5, %v4, %v4 +; CHECK-NEXT: vmrlf %v6, %v31, %v31 +; CHECK-NEXT: vmrhf %v4, %v4, %v4 +; CHECK-NEXT: vmrlg %v3, %v3, %v3 +; CHECK-NEXT: vuphh %v3, %v3 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vmrhf %v6, %v31, %v31 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v4, %v6, %v4 +; CHECK-NEXT: vl %v6, 320(%r15) +; CHECK-NEXT: vpkg %v4, %v4, %v5 +; CHECK-NEXT: vl %v5, 448(%r15) +; CHECK-NEXT: vx %v3, %v3, %v4 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v29, %v6, %v5, %v4 +; CHECK-NEXT: vl %v4, 368(%r15) +; CHECK-NEXT: vl %v5, 240(%r15) +; CHECK-NEXT: vsel %v26, %v5, %v4, %v0 +; CHECK-NEXT: vl %v4, 272(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v4, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vmrlg %v0, %v2, %v2 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vmrlg %v0, %v3, %v3 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x float> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x double> %val5, <16 x double> %val6 + ret <16 x double> %sel +} + +define <16 x i32> @fun194(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4, <16 x i32> %val5, <16 x i32> %val6) { +; CHECK-LABEL: fun194: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vx %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 416(%r15) +; CHECK-NEXT: vl %v3, 352(%r15) +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vl %v0, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v0, %v2, %v0 +; CHECK-NEXT: vceqh %v2, %v26, %v30 +; CHECK-NEXT: vuphh %v3, %v2 +; CHECK-NEXT: vx %v0, %v3, %v0 +; CHECK-NEXT: vl %v3, 448(%r15) +; CHECK-NEXT: vl %v4, 384(%r15) +; CHECK-NEXT: vsel %v28, %v4, %v3, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v3, %v29, %v3 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vpkg %v0, %v3, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v3, 368(%r15) +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vsel %v26, %v3, %v1, %v0 +; CHECK-NEXT: vl %v0, 336(%r15) +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vfchdb %v1, %v3, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vx %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp0 = icmp eq <16 x i16> %val1, %val2 + %cmp1 = fcmp ogt <16 x double> %val3, %val4 + %and = xor <16 x i1> %cmp0, %cmp1 + %sel = select <16 x i1> %and, <16 x i32> %val5, <16 x i32> %val6 + ret <16 x i32> %sel +} + diff --git a/test/CodeGen/SystemZ/vec-cmpsel.ll b/test/CodeGen/SystemZ/vec-cmpsel.ll new file mode 100644 index 000000000000..2d518a2cc838 --- /dev/null +++ b/test/CodeGen/SystemZ/vec-cmpsel.ll @@ -0,0 +1,3378 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; +; Test that vector compare / select combinations do not produce any +; unnecessary pack /unpack / shift instructions. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s + + +define <2 x i8> @fun0(<2 x i8> %val1, <2 x i8> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun0: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun1(<2 x i8> %val1, <2 x i8> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun1: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun2(<2 x i8> %val1, <2 x i8> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun2: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun3(<2 x i8> %val1, <2 x i8> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun3: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun4(<2 x i8> %val1, <2 x i8> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun4: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun5(<2 x i8> %val1, <2 x i8> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun5: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i8> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun6(<2 x i16> %val1, <2 x i16> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun6: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun7(<2 x i16> %val1, <2 x i16> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun7: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun8(<2 x i16> %val1, <2 x i16> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun8: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun9(<2 x i16> %val1, <2 x i16> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun9: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun10(<2 x i16> %val1, <2 x i16> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun10: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun11(<2 x i16> %val1, <2 x i16> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun11: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i16> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun12(<2 x i32> %val1, <2 x i32> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun12: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI12_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun13(<2 x i32> %val1, <2 x i32> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun13: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun14(<2 x i32> %val1, <2 x i32> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun14: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun15(<2 x i32> %val1, <2 x i32> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun15: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun16(<2 x i32> %val1, <2 x i32> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun16: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun17(<2 x i32> %val1, <2 x i32> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun17: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i32> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun18(<2 x i64> %val1, <2 x i64> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun18: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vrepih %v1, 1807 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun19(<2 x i64> %val1, <2 x i64> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun19: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI19_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun20(<2 x i64> %val1, <2 x i64> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun20: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun21(<2 x i64> %val1, <2 x i64> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun21: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun22(<2 x i64> %val1, <2 x i64> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun22: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun23(<2 x i64> %val1, <2 x i64> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun23: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <2 x i64> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <4 x i8> @fun24(<4 x i8> %val1, <4 x i8> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun24: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun25(<4 x i8> %val1, <4 x i8> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun25: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun26(<4 x i8> %val1, <4 x i8> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun26: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun27(<4 x i8> %val1, <4 x i8> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun27: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun28(<4 x i8> %val1, <4 x i8> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun28: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun29(<4 x i8> %val1, <4 x i8> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun29: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i8> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun30(<4 x i16> %val1, <4 x i16> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun30: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun31(<4 x i16> %val1, <4 x i16> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun31: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun32(<4 x i16> %val1, <4 x i16> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun32: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun33(<4 x i16> %val1, <4 x i16> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun33: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun34(<4 x i16> %val1, <4 x i16> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun34: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun35(<4 x i16> %val1, <4 x i16> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun35: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i16> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun36(<4 x i32> %val1, <4 x i32> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun36: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI36_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun37(<4 x i32> %val1, <4 x i32> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun37: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun38(<4 x i32> %val1, <4 x i32> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun38: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun39(<4 x i32> %val1, <4 x i32> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun39: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun40(<4 x i32> %val1, <4 x i32> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun40: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun41(<4 x i32> %val1, <4 x i32> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun41: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v26 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i32> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun42(<4 x i64> %val1, <4 x i64> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun42: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI42_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun43(<4 x i64> %val1, <4 x i64> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun43: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI43_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun44(<4 x i64> %val1, <4 x i64> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun44: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun45(<4 x i64> %val1, <4 x i64> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun45: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun46(<4 x i64> %val1, <4 x i64> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun46: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vceqg %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun47(<4 x i64> %val1, <4 x i64> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun47: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqg %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <4 x i64> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <8 x i8> @fun48(<8 x i8> %val1, <8 x i8> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun48: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun49(<8 x i8> %val1, <8 x i8> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun49: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun50(<8 x i8> %val1, <8 x i8> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun50: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun51(<8 x i8> %val1, <8 x i8> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun51: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 6 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun52(<8 x i8> %val1, <8 x i8> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun52: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun53(<8 x i8> %val1, <8 x i8> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun53: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 6 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i8> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun54(<8 x i16> %val1, <8 x i16> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun54: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vpkh %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun55(<8 x i16> %val1, <8 x i16> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun55: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun56(<8 x i16> %val1, <8 x i16> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun56: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun57(<8 x i16> %val1, <8 x i16> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun57: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun58(<8 x i16> %val1, <8 x i16> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun58: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun59(<8 x i16> %val1, <8 x i16> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun59: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v26 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i16> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun60(<8 x i32> %val1, <8 x i32> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun60: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI60_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun61(<8 x i32> %val1, <8 x i32> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun61: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vceqf %v1, %v24, %v28 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun62(<8 x i32> %val1, <8 x i32> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun62: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun63(<8 x i32> %val1, <8 x i32> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun63: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun64(<8 x i32> %val1, <8 x i32> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun64: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqf %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun65(<8 x i32> %val1, <8 x i32> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun65: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqf %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i32> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun66(<8 x i64> %val1, <8 x i64> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun66: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v27 +; CHECK-NEXT: vceqg %v2, %v24, %v25 +; CHECK-NEXT: larl %r1, .LCPI66_0 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vlrepg %v1, 168(%r15) +; CHECK-NEXT: vlrepg %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun67(<8 x i64> %val1, <8 x i64> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun67: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vceqg %v1, %v26, %v27 +; CHECK-NEXT: vceqg %v2, %v24, %v25 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun68(<8 x i64> %val1, <8 x i64> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun68: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vceqg %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun69(<8 x i64> %val1, <8 x i64> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun69: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun70(<8 x i64> %val1, <8 x i64> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun70: +; CHECK: # BB#0: +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vceqg %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vceqg %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun71(<8 x i64> %val1, <8 x i64> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun71: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <8 x i64> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <16 x i8> @fun72(<16 x i8> %val1, <16 x i8> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun72: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun73(<16 x i8> %val1, <16 x i8> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun73: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun74(<16 x i8> %val1, <16 x i8> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun74: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun75(<16 x i8> %val1, <16 x i8> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun75: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v2, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v2, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v27, %v2, %v1 +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v25, %v29, %v2, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v31, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun76(<16 x i8> %val1, <16 x i8> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun76: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v29, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v31, %v1 +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v27, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun77(<16 x i8> %val1, <16 x i8> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun77: +; CHECK: # BB#0: +; CHECK-NEXT: vceqb %v0, %v24, %v26 +; CHECK-NEXT: vuphb %v1, %v0 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v2, %v1 +; CHECK-NEXT: vpkf %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v2, %v1 +; CHECK-NEXT: vpkg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vsel %v28, %v25, %v2, %v1 +; CHECK-NEXT: vl %v2, 240(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 6 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v27, %v2, %v1 +; CHECK-NEXT: vl %v2, 256(%r15) +; CHECK-NEXT: vmrlg %v1, %v0, %v0 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v25, %v29, %v2, %v1 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 10 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v31, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsldb %v1, %v0, %v0, 12 +; CHECK-NEXT: vuphb %v1, %v1 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 14 +; CHECK-NEXT: vuphh %v1, %v1 +; CHECK-NEXT: vuphb %v0, %v0 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v1 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i8> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun78(<16 x i16> %val1, <16 x i16> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun78: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v26, %v30 +; CHECK-NEXT: vceqh %v1, %v24, %v28 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun79(<16 x i16> %val1, <16 x i16> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun79: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vceqh %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun80(<16 x i16> %val1, <16 x i16> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun80: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun81(<16 x i16> %val1, <16 x i16> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun81: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v27, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsldb %v0, %v1, %v1, 12 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun82(<16 x i16> %val1, <16 x i16> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun82: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun83(<16 x i16> %val1, <16 x i16> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun83: +; CHECK: # BB#0: +; CHECK-NEXT: vceqh %v0, %v24, %v28 +; CHECK-NEXT: vuphh %v1, %v0 +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vceqh %v1, %v26, %v30 +; CHECK-NEXT: vuphh %v2, %v1 +; CHECK-NEXT: vl %v3, 288(%r15) +; CHECK-NEXT: vl %v4, 160(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v25, %v4, %v3, %v2 +; CHECK-NEXT: vpkg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vsel %v26, %v27, %v3, %v2 +; CHECK-NEXT: vmrlg %v2, %v0, %v0 +; CHECK-NEXT: vuphh %v2, %v2 +; CHECK-NEXT: vsldb %v0, %v0, %v0, 12 +; CHECK-NEXT: vl %v3, 256(%r15) +; CHECK-NEXT: vuphf %v2, %v2 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 272(%r15) +; CHECK-NEXT: vl %v3, 176(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v2, %v0 +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v29, %v3, %v2, %v0 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vsldb %v0, %v1, %v1, 12 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i16> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun84(<16 x i32> %val1, <16 x i32> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun84: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vceqf %v1, %v28, %v29 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vceqf %v1, %v26, %v27 +; CHECK-NEXT: vceqf %v2, %v24, %v25 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun85(<16 x i32> %val1, <16 x i32> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun85: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v0, %v26, %v27 +; CHECK-NEXT: vceqf %v1, %v24, %v25 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vceqf %v1, %v28, %v29 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun86(<16 x i32> %val1, <16 x i32> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun86: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqf %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun87(<16 x i32> %val1, <16 x i32> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun87: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v25 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vceqf %v2, %v26, %v27 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vceqf %v3, %v28, %v29 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vceqf %v4, %v30, %v31 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun88(<16 x i32> %val1, <16 x i32> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun88: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqf %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vceqf %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqf %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vceqf %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun89(<16 x i32> %val1, <16 x i32> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun89: +; CHECK: # BB#0: +; CHECK-NEXT: vceqf %v1, %v24, %v25 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vceqf %v2, %v26, %v27 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vceqf %v3, %v28, %v29 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vceqf %v4, %v30, %v31 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i32> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun90(<16 x i64> %val1, <16 x i64> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun90: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vceqg %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vceqg %v1, %v30, %v1 +; CHECK-NEXT: vceqg %v2, %v28, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vceqg %v2, %v26, %v2 +; CHECK-NEXT: vceqg %v3, %v24, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun91(<16 x i64> %val1, <16 x i64> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun91: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vceqg %v1, %v26, %v1 +; CHECK-NEXT: vceqg %v2, %v24, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vceqg %v1, %v27, %v1 +; CHECK-NEXT: vceqg %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun92(<16 x i64> %val1, <16 x i64> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun92: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun93(<16 x i64> %val1, <16 x i64> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun93: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vceqg %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun94(<16 x i64> %val1, <16 x i64> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun94: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vceqg %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vceqg %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vceqg %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vceqg %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun95(<16 x i64> %val1, <16 x i64> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun95: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vceqg %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vceqg %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vceqg %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vceqg %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vceqg %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vceqg %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vceqg %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vceqg %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = icmp eq <16 x i64> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <2 x i8> @fun96(<2 x float> %val1, <2 x float> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun96: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: larl %r1, .LCPI96_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun97(<2 x float> %val1, <2 x float> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun97: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun98(<2 x float> %val1, <2 x float> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun98: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun99(<2 x float> %val1, <2 x float> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun99: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun100(<2 x float> %val1, <2 x float> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun100: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun101(<2 x float> %val1, <2 x float> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun101: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x float> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <2 x i8> @fun102(<2 x double> %val1, <2 x double> %val2, <2 x i8> %val3, <2 x i8> %val4) { +; CHECK-LABEL: fun102: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vrepih %v1, 1807 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i8> %val3, <2 x i8> %val4 + ret <2 x i8> %sel +} + +define <2 x i16> @fun103(<2 x double> %val1, <2 x double> %val2, <2 x i16> %val3, <2 x i16> %val4) { +; CHECK-LABEL: fun103: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI103_0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i16> %val3, <2 x i16> %val4 + ret <2 x i16> %sel +} + +define <2 x i32> @fun104(<2 x double> %val1, <2 x double> %val2, <2 x i32> %val3, <2 x i32> %val4) { +; CHECK-LABEL: fun104: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i32> %val3, <2 x i32> %val4 + ret <2 x i32> %sel +} + +define <2 x i64> @fun105(<2 x double> %val1, <2 x double> %val2, <2 x i64> %val3, <2 x i64> %val4) { +; CHECK-LABEL: fun105: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x i64> %val3, <2 x i64> %val4 + ret <2 x i64> %sel +} + +define <2 x float> @fun106(<2 x double> %val1, <2 x double> %val2, <2 x float> %val3, <2 x float> %val4) { +; CHECK-LABEL: fun106: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vpkg %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x float> %val3, <2 x float> %val4 + ret <2 x float> %sel +} + +define <2 x double> @fun107(<2 x double> %val1, <2 x double> %val2, <2 x double> %val3, <2 x double> %val4) { +; CHECK-LABEL: fun107: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v26 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <2 x double> %val1, %val2 + %sel = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4 + ret <2 x double> %sel +} + +define <4 x i8> @fun108(<4 x float> %val1, <4 x float> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun108: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: larl %r1, .LCPI108_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 0(%r1) +; CHECK-NEXT: vperm %v0, %v0, %v0, %v1 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun109(<4 x float> %val1, <4 x float> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun109: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vpkf %v0, %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun110(<4 x float> %val1, <4 x float> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun110: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun111(<4 x float> %val1, <4 x float> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun111: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun112(<4 x float> %val1, <4 x float> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun112: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v30, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun113(<4 x float> %val1, <4 x float> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun113: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v26, %v26 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v24, %v28, %v25, %v1 +; CHECK-NEXT: vsel %v26, %v30, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x float> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <4 x i8> @fun114(<4 x double> %val1, <4 x double> %val2, <4 x i8> %val3, <4 x i8> %val4) { +; CHECK-LABEL: fun114: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI114_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i8> %val3, <4 x i8> %val4 + ret <4 x i8> %sel +} + +define <4 x i16> @fun115(<4 x double> %val1, <4 x double> %val2, <4 x i16> %val3, <4 x i16> %val4) { +; CHECK-LABEL: fun115: +; CHECK: # BB#0: +; CHECK-NEXT: larl %r1, .LCPI115_0 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i16> %val3, <4 x i16> %val4 + ret <4 x i16> %sel +} + +define <4 x i32> @fun116(<4 x double> %val1, <4 x double> %val2, <4 x i32> %val3, <4 x i32> %val4) { +; CHECK-LABEL: fun116: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i32> %val3, <4 x i32> %val4 + ret <4 x i32> %sel +} + +define <4 x i64> @fun117(<4 x double> %val1, <4 x double> %val2, <4 x i64> %val3, <4 x i64> %val4) { +; CHECK-LABEL: fun117: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x i64> %val3, <4 x i64> %val4 + ret <4 x i64> %sel +} + +define <4 x float> @fun118(<4 x double> %val1, <4 x double> %val2, <4 x float> %val3, <4 x float> %val4) { +; CHECK-LABEL: fun118: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vfchdb %v1, %v24, %v28 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x float> %val3, <4 x float> %val4 + ret <4 x float> %sel +} + +define <4 x double> @fun119(<4 x double> %val1, <4 x double> %val2, <4 x double> %val3, <4 x double> %val4) { +; CHECK-LABEL: fun119: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v24, %v28 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vfchdb %v0, %v26, %v30 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <4 x double> %val1, %val2 + %sel = select <4 x i1> %cmp, <4 x double> %val3, <4 x double> %val4 + ret <4 x double> %sel +} + +define <8 x i8> @fun120(<8 x float> %val1, <8 x float> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun120: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: larl %r1, .LCPI120_0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun121(<8 x float> %val1, <8 x float> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun121: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v27, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun122(<8 x float> %val1, <8 x float> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun122: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun123(<8 x float> %val1, <8 x float> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun123: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun124(<8 x float> %val1, <8 x float> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun124: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v29, %v0 +; CHECK-NEXT: vmrlf %v0, %v30, %v30 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vsel %v26, %v27, %v31, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun125(<8 x float> %val1, <8 x float> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun125: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v28, %v28 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vuphf %v1, %v0 +; CHECK-NEXT: vsel %v24, %v25, %v2, %v1 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrlg %v0, %v0, %v0 +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 192(%r15) +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vuphf %v2, %v1 +; CHECK-NEXT: vsel %v28, %v29, %v3, %v2 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v27, %v2, %v0 +; CHECK-NEXT: vmrlg %v0, %v1, %v1 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vuphf %v0, %v0 +; CHECK-NEXT: vsel %v30, %v31, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x float> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <8 x i8> @fun126(<8 x double> %val1, <8 x double> %val2, <8 x i8> %val3, <8 x i8> %val4) { +; CHECK-LABEL: fun126: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v26, %v27 +; CHECK-NEXT: vfchdb %v2, %v24, %v25 +; CHECK-NEXT: larl %r1, .LCPI126_0 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 0(%r1) +; CHECK-NEXT: vperm %v0, %v1, %v0, %v2 +; CHECK-NEXT: vlrepg %v1, 168(%r15) +; CHECK-NEXT: vlrepg %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i8> %val3, <8 x i8> %val4 + ret <8 x i8> %sel +} + +define <8 x i16> @fun127(<8 x double> %val1, <8 x double> %val2, <8 x i16> %val3, <8 x i16> %val4) { +; CHECK-LABEL: fun127: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vfchdb %v1, %v26, %v27 +; CHECK-NEXT: vfchdb %v2, %v24, %v25 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i16> %val3, <8 x i16> %val4 + ret <8 x i16> %sel +} + +define <8 x i32> @fun128(<8 x double> %val1, <8 x double> %val2, <8 x i32> %val3, <8 x i32> %val4) { +; CHECK-LABEL: fun128: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vfchdb %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i32> %val3, <8 x i32> %val4 + ret <8 x i32> %sel +} + +define <8 x i64> @fun129(<8 x double> %val1, <8 x double> %val2, <8 x i64> %val3, <8 x i64> %val4) { +; CHECK-LABEL: fun129: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x i64> %val3, <8 x i64> %val4 + ret <8 x i64> %sel +} + +define <8 x float> @fun130(<8 x double> %val1, <8 x double> %val2, <8 x float> %val3, <8 x float> %val4) { +; CHECK-LABEL: fun130: +; CHECK: # BB#0: +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vfchdb %v1, %v24, %v25 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vfchdb %v1, %v28, %v29 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x float> %val3, <8 x float> %val4 + ret <8 x float> %sel +} + +define <8 x double> @fun131(<8 x double> %val1, <8 x double> %val2, <8 x double> %val3, <8 x double> %val4) { +; CHECK-LABEL: fun131: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v25 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v27 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v29 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v31 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <8 x double> %val1, %val2 + %sel = select <8 x i1> %cmp, <8 x double> %val3, <8 x double> %val4 + ret <8 x double> %sel +} + +define <16 x i8> @fun132(<16 x float> %val1, <16 x float> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun132: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vmrhf %v4, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vmrlf %v2, %v25, %v25 +; CHECK-NEXT: vmrlf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vmrhf %v3, %v25, %v25 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun133(<16 x float> %val1, <16 x float> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun133: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vmrhf %v3, %v24, %v24 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v25, %v25 +; CHECK-NEXT: vmrlf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v25, %v25 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vmrhf %v3, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vmrlf %v1, %v29, %v29 +; CHECK-NEXT: vmrlf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vmrhf %v2, %v29, %v29 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun134(<16 x float> %val1, <16 x float> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun134: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun135(<16 x float> %val1, <16 x float> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun135: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vpkg %v1, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrhf %v5, %v28, %v28 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v0 +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vmrlf %v3, %v29, %v29 +; CHECK-NEXT: vmrlf %v4, %v28, %v28 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vmrlf %v4, %v31, %v31 +; CHECK-NEXT: vmrlf %v5, %v30, %v30 +; CHECK-NEXT: vmrhf %v6, %v30, %v30 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v31, %v31 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun136(<16 x float> %val1, <16 x float> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun136: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v1, %v26, %v26 +; CHECK-NEXT: vmrhf %v2, %v26, %v26 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v27, %v27 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v29, %v29 +; CHECK-NEXT: vmrlf %v1, %v28, %v28 +; CHECK-NEXT: vmrhf %v2, %v28, %v28 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v29, %v29 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vmrlf %v0, %v31, %v31 +; CHECK-NEXT: vmrlf %v1, %v30, %v30 +; CHECK-NEXT: vmrhf %v2, %v30, %v30 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v31, %v31 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 208(%r15) +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 272(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun137(<16 x float> %val1, <16 x float> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun137: +; CHECK: # BB#0: +; CHECK-NEXT: vmrlf %v0, %v25, %v25 +; CHECK-NEXT: vmrlf %v1, %v24, %v24 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vfchdb %v0, %v1, %v0 +; CHECK-NEXT: vmrhf %v1, %v25, %v25 +; CHECK-NEXT: vmrhf %v2, %v24, %v24 +; CHECK-NEXT: vldeb %v1, %v1 +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vl %v4, 192(%r15) +; CHECK-NEXT: vl %v6, 224(%r15) +; CHECK-NEXT: vl %v7, 256(%r15) +; CHECK-NEXT: vfchdb %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vpkg %v1, %v1, %v0 +; CHECK-NEXT: vuphf %v0, %v1 +; CHECK-NEXT: vsel %v24, %v3, %v2, %v0 +; CHECK-NEXT: vmrlf %v0, %v27, %v27 +; CHECK-NEXT: vmrlf %v2, %v26, %v26 +; CHECK-NEXT: vmrhf %v3, %v26, %v26 +; CHECK-NEXT: vmrhf %v5, %v28, %v28 +; CHECK-NEXT: vmrlg %v1, %v1, %v1 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vldeb %v0, %v0 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vfchdb %v0, %v2, %v0 +; CHECK-NEXT: vmrhf %v2, %v27, %v27 +; CHECK-NEXT: vldeb %v2, %v2 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vfchdb %v2, %v3, %v2 +; CHECK-NEXT: vl %v3, 320(%r15) +; CHECK-NEXT: vpkg %v2, %v2, %v0 +; CHECK-NEXT: vuphf %v0, %v2 +; CHECK-NEXT: vsel %v0, %v4, %v3, %v0 +; CHECK-NEXT: vmrlf %v3, %v29, %v29 +; CHECK-NEXT: vmrlf %v4, %v28, %v28 +; CHECK-NEXT: vlr %v28, %v0 +; CHECK-NEXT: vldeb %v3, %v3 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vfchdb %v3, %v4, %v3 +; CHECK-NEXT: vmrhf %v4, %v29, %v29 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vl %v5, 352(%r15) +; CHECK-NEXT: vpkg %v3, %v4, %v3 +; CHECK-NEXT: vuphf %v4, %v3 +; CHECK-NEXT: vsel %v25, %v6, %v5, %v4 +; CHECK-NEXT: vmrlf %v4, %v31, %v31 +; CHECK-NEXT: vmrlf %v5, %v30, %v30 +; CHECK-NEXT: vmrhf %v6, %v30, %v30 +; CHECK-NEXT: vldeb %v4, %v4 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vfchdb %v4, %v5, %v4 +; CHECK-NEXT: vmrhf %v5, %v31, %v31 +; CHECK-NEXT: vldeb %v5, %v5 +; CHECK-NEXT: vldeb %v6, %v6 +; CHECK-NEXT: vfchdb %v5, %v6, %v5 +; CHECK-NEXT: vl %v6, 384(%r15) +; CHECK-NEXT: vpkg %v4, %v5, %v4 +; CHECK-NEXT: vuphf %v5, %v4 +; CHECK-NEXT: vsel %v29, %v7, %v6, %v5 +; CHECK-NEXT: vl %v5, 304(%r15) +; CHECK-NEXT: vl %v6, 176(%r15) +; CHECK-NEXT: vsel %v26, %v6, %v5, %v1 +; CHECK-NEXT: vl %v5, 208(%r15) +; CHECK-NEXT: vmrlg %v1, %v2, %v2 +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v30, %v5, %v2, %v1 +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vmrlg %v1, %v3, %v3 +; CHECK-NEXT: vl %v3, 240(%r15) +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v27, %v3, %v2, %v1 +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vl %v3, 272(%r15) +; CHECK-NEXT: vmrlg %v1, %v4, %v4 +; CHECK-NEXT: vuphf %v1, %v1 +; CHECK-NEXT: vsel %v31, %v3, %v2, %v1 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x float> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + +define <16 x i8> @fun138(<16 x double> %val1, <16 x double> %val2, <16 x i8> %val3, <16 x i8> %val4) { +; CHECK-LABEL: fun138: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 208(%r15) +; CHECK-NEXT: vl %v2, 192(%r15) +; CHECK-NEXT: vfchdb %v1, %v30, %v1 +; CHECK-NEXT: vfchdb %v2, %v28, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vl %v2, 176(%r15) +; CHECK-NEXT: vl %v3, 160(%r15) +; CHECK-NEXT: vfchdb %v2, %v26, %v2 +; CHECK-NEXT: vfchdb %v3, %v24, %v3 +; CHECK-NEXT: vpkg %v2, %v3, %v2 +; CHECK-NEXT: vpkf %v1, %v2, %v1 +; CHECK-NEXT: vpkh %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 304(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i8> %val3, <16 x i8> %val4 + ret <16 x i8> %sel +} + +define <16 x i16> @fun139(<16 x double> %val1, <16 x double> %val2, <16 x i16> %val3, <16 x i16> %val4) { +; CHECK-LABEL: fun139: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 176(%r15) +; CHECK-NEXT: vl %v2, 160(%r15) +; CHECK-NEXT: vfchdb %v1, %v26, %v1 +; CHECK-NEXT: vfchdb %v2, %v24, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 320(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 240(%r15) +; CHECK-NEXT: vl %v2, 224(%r15) +; CHECK-NEXT: vfchdb %v1, %v27, %v1 +; CHECK-NEXT: vfchdb %v2, %v25, %v2 +; CHECK-NEXT: vpkg %v1, %v2, %v1 +; CHECK-NEXT: vpkf %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 336(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i16> %val3, <16 x i16> %val4 + ret <16 x i16> %sel +} + +define <16 x i32> @fun140(<16 x double> %val1, <16 x double> %val2, <16 x i32> %val3, <16 x i32> %val4) { +; CHECK-LABEL: fun140: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vfchdb %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i32> %val3, <16 x i32> %val4 + ret <16 x i32> %sel +} + +define <16 x i64> @fun141(<16 x double> %val1, <16 x double> %val2, <16 x i64> %val3, <16 x i64> %val4) { +; CHECK-LABEL: fun141: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x i64> %val3, <16 x i64> %val4 + ret <16 x i64> %sel +} + +define <16 x float> @fun142(<16 x double> %val1, <16 x double> %val2, <16 x float> %val3, <16 x float> %val4) { +; CHECK-LABEL: fun142: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 160(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vfchdb %v1, %v24, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 352(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 192(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vfchdb %v1, %v28, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 368(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 224(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vfchdb %v1, %v25, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 384(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vl %v1, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vfchdb %v1, %v29, %v1 +; CHECK-NEXT: vpkg %v0, %v1, %v0 +; CHECK-NEXT: vl %v1, 400(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x float> %val3, <16 x float> %val4 + ret <16 x float> %sel +} + +define <16 x double> @fun143(<16 x double> %val1, <16 x double> %val2, <16 x double> %val3, <16 x double> %val4) { +; CHECK-LABEL: fun143: +; CHECK: # BB#0: +; CHECK-NEXT: vl %v0, 160(%r15) +; CHECK-NEXT: vl %v1, 416(%r15) +; CHECK-NEXT: vl %v2, 288(%r15) +; CHECK-NEXT: vfchdb %v0, %v24, %v0 +; CHECK-NEXT: vsel %v24, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 176(%r15) +; CHECK-NEXT: vl %v1, 432(%r15) +; CHECK-NEXT: vl %v2, 304(%r15) +; CHECK-NEXT: vfchdb %v0, %v26, %v0 +; CHECK-NEXT: vsel %v26, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 192(%r15) +; CHECK-NEXT: vl %v1, 448(%r15) +; CHECK-NEXT: vl %v2, 320(%r15) +; CHECK-NEXT: vfchdb %v0, %v28, %v0 +; CHECK-NEXT: vsel %v28, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 208(%r15) +; CHECK-NEXT: vl %v1, 464(%r15) +; CHECK-NEXT: vl %v2, 336(%r15) +; CHECK-NEXT: vfchdb %v0, %v30, %v0 +; CHECK-NEXT: vsel %v30, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 224(%r15) +; CHECK-NEXT: vl %v1, 480(%r15) +; CHECK-NEXT: vl %v2, 352(%r15) +; CHECK-NEXT: vfchdb %v0, %v25, %v0 +; CHECK-NEXT: vsel %v25, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 240(%r15) +; CHECK-NEXT: vl %v1, 496(%r15) +; CHECK-NEXT: vl %v2, 368(%r15) +; CHECK-NEXT: vfchdb %v0, %v27, %v0 +; CHECK-NEXT: vsel %v27, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 256(%r15) +; CHECK-NEXT: vfchdb %v0, %v29, %v0 +; CHECK-NEXT: vl %v1, 512(%r15) +; CHECK-NEXT: vl %v2, 384(%r15) +; CHECK-NEXT: vsel %v29, %v2, %v1, %v0 +; CHECK-NEXT: vl %v0, 272(%r15) +; CHECK-NEXT: vfchdb %v0, %v31, %v0 +; CHECK-NEXT: vl %v1, 528(%r15) +; CHECK-NEXT: vl %v2, 400(%r15) +; CHECK-NEXT: vsel %v31, %v2, %v1, %v0 +; CHECK-NEXT: br %r14 + %cmp = fcmp ogt <16 x double> %val1, %val2 + %sel = select <16 x i1> %cmp, <16 x double> %val3, <16 x double> %val4 + ret <16 x double> %sel +} + diff --git a/test/CodeGen/SystemZ/vec-sext.ll b/test/CodeGen/SystemZ/vec-sext.ll new file mode 100644 index 000000000000..9831de52ee83 --- /dev/null +++ b/test/CodeGen/SystemZ/vec-sext.ll @@ -0,0 +1,91 @@ +; Test that vector sexts are done efficently with unpack instructions also in +; case of fewer elements than allowed, e.g. <2 x i32>. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s + + +define <2 x i16> @fun1(<2 x i8> %val1) { +; CHECK-LABEL: fun1: +; CHECK: vuphb %v24, %v24 +; CHECK-NEXT: br %r14 + %z = sext <2 x i8> %val1 to <2 x i16> + ret <2 x i16> %z +} + +define <2 x i32> @fun2(<2 x i8> %val1) { +; CHECK-LABEL: fun2: +; CHECK: vuphb %v0, %v24 +; CHECK-NEXT: vuphh %v24, %v0 +; CHECK-NEXT: br %r14 + %z = sext <2 x i8> %val1 to <2 x i32> + ret <2 x i32> %z +} + +define <2 x i64> @fun3(<2 x i8> %val1) { +; CHECK-LABEL: fun3: +; CHECK: vuphb %v0, %v24 +; CHECK-NEXT: vuphh %v0, %v0 +; CHECK-NEXT: vuphf %v24, %v0 +; CHECK-NEXT: br %r14 + %z = sext <2 x i8> %val1 to <2 x i64> + ret <2 x i64> %z +} + +define <2 x i32> @fun4(<2 x i16> %val1) { +; CHECK-LABEL: fun4: +; CHECK: vuphh %v24, %v24 +; CHECK-NEXT: br %r14 + %z = sext <2 x i16> %val1 to <2 x i32> + ret <2 x i32> %z +} + +define <2 x i64> @fun5(<2 x i16> %val1) { +; CHECK-LABEL: fun5: +; CHECK: vuphh %v0, %v24 +; CHECK-NEXT: vuphf %v24, %v0 +; CHECK-NEXT: br %r14 + %z = sext <2 x i16> %val1 to <2 x i64> + ret <2 x i64> %z +} + +define <2 x i64> @fun6(<2 x i32> %val1) { +; CHECK-LABEL: fun6: +; CHECK: vuphf %v24, %v24 +; CHECK-NEXT: br %r14 + %z = sext <2 x i32> %val1 to <2 x i64> + ret <2 x i64> %z +} + +define <4 x i16> @fun7(<4 x i8> %val1) { +; CHECK-LABEL: fun7: +; CHECK: vuphb %v24, %v24 +; CHECK-NEXT: br %r14 + %z = sext <4 x i8> %val1 to <4 x i16> + ret <4 x i16> %z +} + +define <4 x i32> @fun8(<4 x i8> %val1) { +; CHECK-LABEL: fun8: +; CHECK: vuphb %v0, %v24 +; CHECK-NEXT: vuphh %v24, %v0 +; CHECK-NEXT: br %r14 + %z = sext <4 x i8> %val1 to <4 x i32> + ret <4 x i32> %z +} + +define <4 x i32> @fun9(<4 x i16> %val1) { +; CHECK-LABEL: fun9: +; CHECK: vuphh %v24, %v24 +; CHECK-NEXT: br %r14 + %z = sext <4 x i16> %val1 to <4 x i32> + ret <4 x i32> %z +} + +define <8 x i16> @fun10(<8 x i8> %val1) { +; CHECK-LABEL: fun10: +; CHECK: vuphb %v24, %v24 +; CHECK-NEXT: br %r14 + %z = sext <8 x i8> %val1 to <8 x i16> + ret <8 x i16> %z +} + diff --git a/test/CodeGen/SystemZ/vec-trunc-to-i1.ll b/test/CodeGen/SystemZ/vec-trunc-to-i1.ll new file mode 100644 index 000000000000..705fe3dbac90 --- /dev/null +++ b/test/CodeGen/SystemZ/vec-trunc-to-i1.ll @@ -0,0 +1,37 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s +; +; Check that a widening truncate to a vector of i1 elements can be handled. + + +define void @pr32275(<4 x i8> %B15) { +; CHECK-LABEL: pr32275: +; CHECK: # BB#0: # %BB +; CHECK-NEXT: vrepif %v0, 1 +; CHECK-NEXT: .LBB0_1: # %CF34 +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: vlgvb %r0, %v24, 3 +; CHECK-NEXT: vlgvb %r1, %v24, 1 +; CHECK-NEXT: vlvgp %v1, %r1, %r0 +; CHECK-NEXT: vlgvb %r0, %v24, 0 +; CHECK-NEXT: vlvgf %v1, %r0, 0 +; CHECK-NEXT: vlgvb %r0, %v24, 2 +; CHECK-NEXT: vlvgf %v1, %r0, 2 +; CHECK-NEXT: vn %v1, %v1, %v0 +; CHECK-NEXT: vlgvf %r0, %v1, 3 +; CHECK-NEXT: tmll %r0, 1 +; CHECK-NEXT: jne .LBB0_1 +; CHECK-NEXT: # BB#2: # %CF36 +; CHECK-NEXT: br %r14 +BB: + br label %CF34 + +CF34: + %Tr24 = trunc <4 x i8> %B15 to <4 x i1> + %E28 = extractelement <4 x i1> %Tr24, i32 3 + br i1 %E28, label %CF34, label %CF36 + +CF36: + ret void +} diff --git a/test/CodeGen/SystemZ/vec-zext.ll b/test/CodeGen/SystemZ/vec-zext.ll new file mode 100644 index 000000000000..831594d4020c --- /dev/null +++ b/test/CodeGen/SystemZ/vec-zext.ll @@ -0,0 +1,91 @@ +; Test that vector zexts are done efficently with unpack instructions also in +; case of fewer elements than allowed, e.g. <2 x i32>. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s + + +define <2 x i16> @fun1(<2 x i8> %val1) { +; CHECK-LABEL: fun1: +; CHECK: vuplhb %v24, %v24 +; CHECK-NEXT: br %r14 + %z = zext <2 x i8> %val1 to <2 x i16> + ret <2 x i16> %z +} + +define <2 x i32> @fun2(<2 x i8> %val1) { +; CHECK-LABEL: fun2: +; CHECK: vuplhb %v0, %v24 +; CHECK-NEXT: vuplhh %v24, %v0 +; CHECK-NEXT: br %r14 + %z = zext <2 x i8> %val1 to <2 x i32> + ret <2 x i32> %z +} + +define <2 x i64> @fun3(<2 x i8> %val1) { +; CHECK-LABEL: fun3: +; CHECK: vuplhb %v0, %v24 +; CHECK-NEXT: vuplhh %v0, %v0 +; CHECK-NEXT: vuplhf %v24, %v0 +; CHECK-NEXT: br %r14 + %z = zext <2 x i8> %val1 to <2 x i64> + ret <2 x i64> %z +} + +define <2 x i32> @fun4(<2 x i16> %val1) { +; CHECK-LABEL: fun4: +; CHECK: vuplhh %v24, %v24 +; CHECK-NEXT: br %r14 + %z = zext <2 x i16> %val1 to <2 x i32> + ret <2 x i32> %z +} + +define <2 x i64> @fun5(<2 x i16> %val1) { +; CHECK-LABEL: fun5: +; CHECK: vuplhh %v0, %v24 +; CHECK-NEXT: vuplhf %v24, %v0 +; CHECK-NEXT: br %r14 + %z = zext <2 x i16> %val1 to <2 x i64> + ret <2 x i64> %z +} + +define <2 x i64> @fun6(<2 x i32> %val1) { +; CHECK-LABEL: fun6: +; CHECK: vuplhf %v24, %v24 +; CHECK-NEXT: br %r14 + %z = zext <2 x i32> %val1 to <2 x i64> + ret <2 x i64> %z +} + +define <4 x i16> @fun7(<4 x i8> %val1) { +; CHECK-LABEL: fun7: +; CHECK: vuplhb %v24, %v24 +; CHECK-NEXT: br %r14 + %z = zext <4 x i8> %val1 to <4 x i16> + ret <4 x i16> %z +} + +define <4 x i32> @fun8(<4 x i8> %val1) { +; CHECK-LABEL: fun8: +; CHECK: vuplhb %v0, %v24 +; CHECK-NEXT: vuplhh %v24, %v0 +; CHECK-NEXT: br %r14 + %z = zext <4 x i8> %val1 to <4 x i32> + ret <4 x i32> %z +} + +define <4 x i32> @fun9(<4 x i16> %val1) { +; CHECK-LABEL: fun9: +; CHECK: vuplhh %v24, %v24 +; CHECK-NEXT: br %r14 + %z = zext <4 x i16> %val1 to <4 x i32> + ret <4 x i32> %z +} + +define <8 x i16> @fun10(<8 x i8> %val1) { +; CHECK-LABEL: fun10: +; CHECK: vuplhb %v24, %v24 +; CHECK-NEXT: br %r14 + %z = zext <8 x i8> %val1 to <8 x i16> + ret <8 x i16> %z +} + diff --git a/test/CodeGen/SystemZ/vectorizer-output-3xi32.ll b/test/CodeGen/SystemZ/vectorizer-output-3xi32.ll new file mode 100644 index 000000000000..3e7ba6095926 --- /dev/null +++ b/test/CodeGen/SystemZ/vectorizer-output-3xi32.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 +; +; This tescase origininates from the BB-vectorizer output. + +define void @fun() { + %1 = zext <3 x i1> zeroinitializer to <3 x i32> + %2 = extractelement <3 x i32> %1, i32 2 + store i32 %2, i32* undef, align 8 + unreachable +} |