diff options
Diffstat (limited to 'test/CodeGen/PowerPC/expand-isel-6.mir')
-rw-r--r-- | test/CodeGen/PowerPC/expand-isel-6.mir | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/expand-isel-6.mir b/test/CodeGen/PowerPC/expand-isel-6.mir new file mode 100644 index 000000000000..5aed399e677a --- /dev/null +++ b/test/CodeGen/PowerPC/expand-isel-6.mir @@ -0,0 +1,57 @@ +# This file tests the scenario when ISEL is the last instruction of the last +# Basic Block, i.e., the BB cannot fall through to its successor situation. +# RUN: llc -ppc-gen-isel=false -run-pass ppc-expand-isel -o - %s | FileCheck %s + +--- | + target datalayout = "E-m:e-i64:64-n32:64" + target triple = "powerpc64-unknown-linux-gnu" + define signext i32 @testExpandISEL(i32 signext %i, i32 signext %j) { + entry: + %cmp = icmp sgt i32 %i, 0 + %add = add nsw i32 %i, 1 + %cond = select i1 %cmp, i32 %add, i32 %j + ret i32 %cond + } + +... +--- +name: testExpandISEL +alignment: 2 +exposesReturnsTwice: false +legalized: false +regBankSelected: false +selected: false +tracksRegLiveness: true +liveins: + - { reg: '%x0' } + - { reg: '%x3' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %x0, %x3 + + %r5 = ADDI %r3, 1 + %cr0 = CMPWI %r3, 0 + %r3 = ISEL %zero, %r0, %cr0gt + ; CHECK: BC %cr0gt, %[[TRUE:bb.[0-9]+]] + ; CHECK: %[[FALSE:bb.[0-9]+]] + ; CHECK: %r3 = ORI %r0, 0 + ; CHECK: B %[[SUCCESSOR:bb.[0-9]+]] + ; CHECK: [[TRUE]] + ; CHECK: %r3 = ADDI %zero, 0 + + +... |