aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
diff options
context:
space:
mode:
Diffstat (limited to 'test/CodeGen/Hexagon/expand-condsets-rm-reg.mir')
-rw-r--r--test/CodeGen/Hexagon/expand-condsets-rm-reg.mir2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir b/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
index 983035e228cc..f3d105f75da2 100644
--- a/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
+++ b/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
@@ -1,4 +1,4 @@
-# RUN: llc -march=hexagon -run-pass expand-condsets -o - 2>&1 %s -verify-machineinstrs -debug-only=expand-condsets | FileCheck %s
+# RUN: llc -march=hexagon -run-pass expand-condsets -o - %s -verify-machineinstrs -debug-only=expand-condsets 2>&1 | FileCheck %s
# REQUIRES: asserts
# Check that coalesced registers are removed from live intervals.