diff options
Diffstat (limited to 'test/CodeGen/ARM/vshrn.ll')
-rw-r--r-- | test/CodeGen/ARM/vshrn.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/ARM/vshrn.ll b/test/CodeGen/ARM/vshrn.ll index e2544f424a2c..40a94fee0d78 100644 --- a/test/CodeGen/ARM/vshrn.ll +++ b/test/CodeGen/ARM/vshrn.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @vshrns8(<8 x i16>* %A) nounwind { -;CHECK: vshrns8: +;CHECK-LABEL: vshrns8: ;CHECK: vshrn.i16 %tmp1 = load <8 x i16>* %A %tmp2 = call <8 x i8> @llvm.arm.neon.vshiftn.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >) @@ -9,7 +9,7 @@ define <8 x i8> @vshrns8(<8 x i16>* %A) nounwind { } define <4 x i16> @vshrns16(<4 x i32>* %A) nounwind { -;CHECK: vshrns16: +;CHECK-LABEL: vshrns16: ;CHECK: vshrn.i32 %tmp1 = load <4 x i32>* %A %tmp2 = call <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >) @@ -17,7 +17,7 @@ define <4 x i16> @vshrns16(<4 x i32>* %A) nounwind { } define <2 x i32> @vshrns32(<2 x i64>* %A) nounwind { -;CHECK: vshrns32: +;CHECK-LABEL: vshrns32: ;CHECK: vshrn.i64 %tmp1 = load <2 x i64>* %A %tmp2 = call <2 x i32> @llvm.arm.neon.vshiftn.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >) @@ -29,7 +29,7 @@ declare <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind re declare <2 x i32> @llvm.arm.neon.vshiftn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone define <8 x i8> @vrshrns8(<8 x i16>* %A) nounwind { -;CHECK: vrshrns8: +;CHECK-LABEL: vrshrns8: ;CHECK: vrshrn.i16 %tmp1 = load <8 x i16>* %A %tmp2 = call <8 x i8> @llvm.arm.neon.vrshiftn.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >) @@ -37,7 +37,7 @@ define <8 x i8> @vrshrns8(<8 x i16>* %A) nounwind { } define <4 x i16> @vrshrns16(<4 x i32>* %A) nounwind { -;CHECK: vrshrns16: +;CHECK-LABEL: vrshrns16: ;CHECK: vrshrn.i32 %tmp1 = load <4 x i32>* %A %tmp2 = call <4 x i16> @llvm.arm.neon.vrshiftn.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >) @@ -45,7 +45,7 @@ define <4 x i16> @vrshrns16(<4 x i32>* %A) nounwind { } define <2 x i32> @vrshrns32(<2 x i64>* %A) nounwind { -;CHECK: vrshrns32: +;CHECK-LABEL: vrshrns32: ;CHECK: vrshrn.i64 %tmp1 = load <2 x i64>* %A %tmp2 = call <2 x i32> @llvm.arm.neon.vrshiftn.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >) |