diff options
Diffstat (limited to 'test/CodeGen/ARM/build-attributes.ll')
| -rw-r--r-- | test/CodeGen/ARM/build-attributes.ll | 297 |
1 files changed, 297 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/build-attributes.ll b/test/CodeGen/ARM/build-attributes.ll index 2e382308bf51..1982fa98ef41 100644 --- a/test/CodeGen/ARM/build-attributes.ll +++ b/test/CodeGen/ARM/build-attributes.ll @@ -7,6 +7,8 @@ ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi | FileCheck %s --check-prefix=V6M ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST +; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi | FileCheck %s --check-prefix=V6M +; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s | FileCheck %s --check-prefix=ARM1156T2F-S ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING @@ -53,9 +55,21 @@ ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1 +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 | FileCheck %s --check-prefix=SC000 +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST +; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD @@ -67,15 +81,26 @@ ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 +; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 +; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST +; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72 +; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST +; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A +; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST +; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-NOFPU @@ -92,10 +117,17 @@ ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=PCS-R9-USE ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -arm-reserve-r9 | FileCheck %s --check-prefix=PCS-R9-RESERVE +; ARMv8.1a (AArch32) +; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN +; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN +; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; ARMv8a (AArch32) ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN +; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN +; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN +; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; ARMv7a ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN @@ -113,6 +145,11 @@ ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN +; ARMv6k +; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN +; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=STRICT-ALIGN +; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN +; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; ARMv6m ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-no-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN @@ -162,6 +199,8 @@ ; V6-FAST-NOT: .eabi_attribute 22 ; V6-FAST: .eabi_attribute 23, 1 +;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for +;; V6-M, however we don't model the OS extension so this is fine. ; V6M: .eabi_attribute 6, 12 ; V6M-NOT: .eabi_attribute 7 ; V6M: .eabi_attribute 8, 0 @@ -723,6 +762,102 @@ ; CORTEX-M0-FAST-NOT: .eabi_attribute 22 ; CORTEX-M0-FAST: .eabi_attribute 23, 1 +; CORTEX-M0PLUS: .cpu cortex-m0plus +; CORTEX-M0PLUS: .eabi_attribute 6, 12 +; CORTEX-M0PLUS-NOT: .eabi_attribute 7 +; CORTEX-M0PLUS: .eabi_attribute 8, 0 +; CORTEX-M0PLUS: .eabi_attribute 9, 1 +; CORTEX-M0PLUS-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-M0PLUS: .eabi_attribute 20, 1 +; CORTEX-M0PLUS: .eabi_attribute 21, 1 +; CORTEX-M0PLUS-NOT: .eabi_attribute 22 +; CORTEX-M0PLUS: .eabi_attribute 23, 3 +; CORTEX-M0PLUS: .eabi_attribute 24, 1 +; CORTEX-M0PLUS: .eabi_attribute 25, 1 +; CORTEX-M0PLUS-NOT: .eabi_attribute 27 +; CORTEX-M0PLUS-NOT: .eabi_attribute 28 +; CORTEX-M0PLUS-NOT: .eabi_attribute 36 +; CORTEX-M0PLUS: .eabi_attribute 38, 1 +; CORTEX-M0PLUS-NOT: .eabi_attribute 42 +; CORTEX-M0PLUS-NOT: .eabi_attribute 44 +; CORTEX-M0PLUS-NOT: .eabi_attribute 68 + +; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19 +;; Despite the M0+ CPU having no FPU in this scenario, we chose to +;; flush to positive zero here. There's no hardware support doing +;; this, but the fast maths software library might and such behaviour +;; would match hardware support on this architecture revision if it +;; existed. +; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20 +; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21 +; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22 +; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1 + +; CORTEX-M1: .cpu cortex-m1 +; CORTEX-M1: .eabi_attribute 6, 12 +; CORTEX-M1-NOT: .eabi_attribute 7 +; CORTEX-M1: .eabi_attribute 8, 0 +; CORTEX-M1: .eabi_attribute 9, 1 +; CORTEX-M1-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-M1: .eabi_attribute 20, 1 +; CORTEX-M1: .eabi_attribute 21, 1 +; CORTEX-M1-NOT: .eabi_attribute 22 +; CORTEX-M1: .eabi_attribute 23, 3 +; CORTEX-M1: .eabi_attribute 24, 1 +; CORTEX-M1: .eabi_attribute 25, 1 +; CORTEX-M1-NOT: .eabi_attribute 27 +; CORTEX-M1-NOT: .eabi_attribute 28 +; CORTEX-M1-NOT: .eabi_attribute 36 +; CORTEX-M1: .eabi_attribute 38, 1 +; CORTEX-M1-NOT: .eabi_attribute 42 +; CORTEX-M1-NOT: .eabi_attribute 44 +; CORTEX-M1-NOT: .eabi_attribute 68 + +; CORTEX-M1-FAST-NOT: .eabi_attribute 19 +;; Despite the M1 CPU having no FPU in this scenario, we chose to +;; flush to positive zero here. There's no hardware support doing +;; this, but the fast maths software library might and such behaviour +;; would match hardware support on this architecture revision if it +;; existed. +; CORTEX-M1-FAST-NOT: .eabi_attribute 20 +; CORTEX-M1-FAST-NOT: .eabi_attribute 21 +; CORTEX-M1-FAST-NOT: .eabi_attribute 22 +; CORTEX-M1-FAST: .eabi_attribute 23, 1 + +; SC000: .cpu sc000 +; SC000: .eabi_attribute 6, 12 +; SC000-NOT: .eabi_attribute 7 +; SC000: .eabi_attribute 8, 0 +; SC000: .eabi_attribute 9, 1 +; SC000-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; SC000: .eabi_attribute 20, 1 +; SC000: .eabi_attribute 21, 1 +; SC000-NOT: .eabi_attribute 22 +; SC000: .eabi_attribute 23, 3 +; SC000: .eabi_attribute 24, 1 +; SC000: .eabi_attribute 25, 1 +; SC000-NOT: .eabi_attribute 27 +; SC000-NOT: .eabi_attribute 28 +; SC000-NOT: .eabi_attribute 36 +; SC000: .eabi_attribute 38, 1 +; SC000-NOT: .eabi_attribute 42 +; SC000-NOT: .eabi_attribute 44 +; SC000-NOT: .eabi_attribute 68 + +; SC000-FAST-NOT: .eabi_attribute 19 +;; Despite the SC000 CPU having no FPU in this scenario, we chose to +;; flush to positive zero here. There's no hardware support doing +;; this, but the fast maths software library might and such behaviour +;; would match hardware support on this architecture revision if it +;; existed. +; SC000-FAST-NOT: .eabi_attribute 20 +; SC000-FAST-NOT: .eabi_attribute 21 +; SC000-FAST-NOT: .eabi_attribute 22 +; SC000-FAST: .eabi_attribute 23, 1 + ; CORTEX-M3: .cpu cortex-m3 ; CORTEX-M3: .eabi_attribute 6, 10 ; CORTEX-M3: .eabi_attribute 7, 77 @@ -753,6 +888,36 @@ ; CORTEX-M3-FAST-NOT: .eabi_attribute 22 ; CORTEX-M3-FAST: .eabi_attribute 23, 1 +; SC300: .cpu sc300 +; SC300: .eabi_attribute 6, 10 +; SC300: .eabi_attribute 7, 77 +; SC300: .eabi_attribute 8, 0 +; SC300: .eabi_attribute 9, 2 +; SC300-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; SC300: .eabi_attribute 20, 1 +; SC300: .eabi_attribute 21, 1 +; SC300-NOT: .eabi_attribute 22 +; SC300: .eabi_attribute 23, 3 +; SC300: .eabi_attribute 24, 1 +; SC300: .eabi_attribute 25, 1 +; SC300-NOT: .eabi_attribute 27 +; SC300-NOT: .eabi_attribute 28 +; SC300-NOT: .eabi_attribute 36 +; SC300: .eabi_attribute 38, 1 +; SC300-NOT: .eabi_attribute 42 +; SC300-NOT: .eabi_attribute 44 +; SC300-NOT: .eabi_attribute 68 + +; SC300-FAST-NOT: .eabi_attribute 19 +;; Despite there being no FPU, we chose to flush to zero preserving +;; sign. This matches what the hardware would do for this architecture +;; revision. +; SC300-FAST: .eabi_attribute 20, 2 +; SC300-FAST-NOT: .eabi_attribute 21 +; SC300-FAST-NOT: .eabi_attribute 22 +; SC300-FAST: .eabi_attribute 23, 1 + ; CORTEX-M4-SOFT: .cpu cortex-m4 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77 @@ -835,6 +1000,7 @@ ; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27 ; CORTEX-M7: .eabi_attribute 36, 1 ; CORTEX-M7: .eabi_attribute 38, 1 +; CORTEX-M7-NOT: .eabi_attribute 44 ; CORTEX-M7: .eabi_attribute 14, 0 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19 @@ -848,6 +1014,49 @@ ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1 +; CORTEX-R4: .cpu cortex-r4 +; CORTEX-R4: .eabi_attribute 6, 10 +; CORTEX-R4: .eabi_attribute 7, 82 +; CORTEX-R4: .eabi_attribute 8, 1 +; CORTEX-R4: .eabi_attribute 9, 2 +; CORTEX-R4-NOT: .fpu vfpv3-d16 +; CORTEX-R4-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-R4: .eabi_attribute 20, 1 +; CORTEX-R4: .eabi_attribute 21, 1 +; CORTEX-R4-NOT: .eabi_attribute 22 +; CORTEX-R4: .eabi_attribute 23, 3 +; CORTEX-R4: .eabi_attribute 24, 1 +; CORTEX-R4: .eabi_attribute 25, 1 +; CORTEX-R4-NOT: .eabi_attribute 28 +; CORTEX-R4-NOT: .eabi_attribute 36 +; CORTEX-R4: .eabi_attribute 38, 1 +; CORTEX-R4-NOT: .eabi_attribute 42 +; CORTEX-R4-NOT: .eabi_attribute 44 +; CORTEX-R4-NOT: .eabi_attribute 68 + +; CORTEX-R4F: .cpu cortex-r4f +; CORTEX-R4F: .eabi_attribute 6, 10 +; CORTEX-R4F: .eabi_attribute 7, 82 +; CORTEX-R4F: .eabi_attribute 8, 1 +; CORTEX-R4F: .eabi_attribute 9, 2 +; CORTEX-R4F: .fpu vfpv3-d16 +; CORTEX-R4F-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-R4F: .eabi_attribute 20, 1 +; CORTEX-R4F: .eabi_attribute 21, 1 +; CORTEX-R4F-NOT: .eabi_attribute 22 +; CORTEX-R4F: .eabi_attribute 23, 3 +; CORTEX-R4F: .eabi_attribute 24, 1 +; CORTEX-R4F: .eabi_attribute 25, 1 +; CORTEX-R4F: .eabi_attribute 27, 1 +; CORTEX-R4F-NOT: .eabi_attribute 28 +; CORTEX-R4F-NOT: .eabi_attribute 36 +; CORTEX-R4F: .eabi_attribute 38, 1 +; CORTEX-R4F-NOT: .eabi_attribute 42 +; CORTEX-R4F-NOT: .eabi_attribute 44 +; CORTEX-R4F-NOT: .eabi_attribute 68 + ; CORTEX-R5: .cpu cortex-r5 ; CORTEX-R5: .eabi_attribute 6, 10 ; CORTEX-R5: .eabi_attribute 7, 82 @@ -877,6 +1086,35 @@ ; CORTEX-R5-FAST-NOT: .eabi_attribute 22 ; CORTEX-R5-FAST: .eabi_attribute 23, 1 +; CORTEX-R7: .cpu cortex-r7 +; CORTEX-R7: .eabi_attribute 6, 10 +; CORTEX-R7: .eabi_attribute 7, 82 +; CORTEX-R7: .eabi_attribute 8, 1 +; CORTEX-R7: .eabi_attribute 9, 2 +; CORTEX-R7: .fpu vfpv3-d16 +; CORTEX-R7-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-R7: .eabi_attribute 20, 1 +; CORTEX-R7: .eabi_attribute 21, 1 +; CORTEX-R7-NOT: .eabi_attribute 22 +; CORTEX-R7: .eabi_attribute 23, 3 +; CORTEX-R7: .eabi_attribute 24, 1 +; CORTEX-R7: .eabi_attribute 25, 1 +; CORTEX-R7: .eabi_attribute 27, 1 +; CORTEX-R7-NOT: .eabi_attribute 28 +; CORTEX-R7-NOT: .eabi_attribute 36 +; CORTEX-R7: .eabi_attribute 38, 1 +; CORTEX-R7: .eabi_attribute 42, 1 +; CORTEX-R7: .eabi_attribute 44, 2 +; CORTEX-R7-NOT: .eabi_attribute 68 + +; CORTEX-R7-FAST-NOT: .eabi_attribute 19 +;; The R7 has the VFPv3 FP unit, which always flushes preserving sign. +; CORTEX-R7-FAST: .eabi_attribute 20, 2 +; CORTEX-R7-FAST-NOT: .eabi_attribute 21 +; CORTEX-R7-FAST-NOT: .eabi_attribute 22 +; CORTEX-R7-FAST: .eabi_attribute 23, 1 + ; CORTEX-A53: .cpu cortex-a53 ; CORTEX-A53: .eabi_attribute 6, 14 ; CORTEX-A53: .eabi_attribute 7, 65 @@ -937,6 +1175,65 @@ ; CORTEX-A57-FAST-NOT: .eabi_attribute 22 ; CORTEX-A57-FAST: .eabi_attribute 23, 1 +; CORTEX-A72: .cpu cortex-a72 +; CORTEX-A72: .eabi_attribute 6, 14 +; CORTEX-A72: .eabi_attribute 7, 65 +; CORTEX-A72: .eabi_attribute 8, 1 +; CORTEX-A72: .eabi_attribute 9, 2 +; CORTEX-A72: .fpu crypto-neon-fp-armv8 +; CORTEX-A72: .eabi_attribute 12, 3 +; CORTEX-A72-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-A72: .eabi_attribute 20, 1 +; CORTEX-A72: .eabi_attribute 21, 1 +; CORTEX-A72-NOT: .eabi_attribute 22 +; CORTEX-A72: .eabi_attribute 23, 3 +; CORTEX-A72: .eabi_attribute 24, 1 +; CORTEX-A72: .eabi_attribute 25, 1 +; CORTEX-A72-NOT: .eabi_attribute 27 +; CORTEX-A72-NOT: .eabi_attribute 28 +; CORTEX-A72: .eabi_attribute 36, 1 +; CORTEX-A72: .eabi_attribute 38, 1 +; CORTEX-A72: .eabi_attribute 42, 1 +; CORTEX-A72-NOT: .eabi_attribute 44 +; CORTEX-A72: .eabi_attribute 68, 3 + +; CORTEX-A72-FAST-NOT: .eabi_attribute 19 +;; The A72 has the ARMv8 FP unit, which always flushes preserving sign. +; CORTEX-A72-FAST: .eabi_attribute 20, 2 +; CORTEX-A72-FAST-NOT: .eabi_attribute 21 +; CORTEX-A72-FAST-NOT: .eabi_attribute 22 +; CORTEX-A72-FAST: .eabi_attribute 23, 1 + +; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14 +; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65 +; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1 +; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2 +; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8 +; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4 +; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1 +; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1 +; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22 +; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3 +; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1 +; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1 +; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27 +; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28 +; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1 +; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1 +; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1 +; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44 +; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3 + +; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19 +;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign. +; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2 +; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21 +; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22 +; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1 + ; RELOC-PIC: .eabi_attribute 15, 1 ; RELOC-PIC: .eabi_attribute 16, 1 ; RELOC-PIC: .eabi_attribute 17, 2 |