diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/constant-fold-mi-operands.ll')
| -rw-r--r-- | test/CodeGen/AMDGPU/constant-fold-mi-operands.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll b/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll index 0ff75ab58003..0831d250b9e7 100644 --- a/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll +++ b/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll @@ -5,7 +5,7 @@ ; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}} ; GCN-NOT: [[RESULT]] ; GCN: buffer_store_dword [[RESULT]] -define void @fold_mi_v_and_0(i32 addrspace(1)* %out) { +define amdgpu_kernel void @fold_mi_v_and_0(i32 addrspace(1)* %out) { %x = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0 %size = call i32 @llvm.amdgcn.groupstaticsize() %and = and i32 %size, %x @@ -17,7 +17,7 @@ define void @fold_mi_v_and_0(i32 addrspace(1)* %out) { ; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}} ; GCN-NOT: [[RESULT]] ; GCN: buffer_store_dword [[RESULT]] -define void @fold_mi_s_and_0(i32 addrspace(1)* %out, i32 %x) #0 { +define amdgpu_kernel void @fold_mi_s_and_0(i32 addrspace(1)* %out, i32 %x) #0 { %size = call i32 @llvm.amdgcn.groupstaticsize() %and = and i32 %size, %x store i32 %and, i32 addrspace(1)* %out @@ -28,7 +28,7 @@ define void @fold_mi_s_and_0(i32 addrspace(1)* %out, i32 %x) #0 { ; GCN: v_mbcnt_lo_u32_b32_e64 [[RESULT:v[0-9]+]] ; GCN-NOT: [[RESULT]] ; GCN: buffer_store_dword [[RESULT]] -define void @fold_mi_v_or_0(i32 addrspace(1)* %out) { +define amdgpu_kernel void @fold_mi_v_or_0(i32 addrspace(1)* %out) { %x = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0 %size = call i32 @llvm.amdgcn.groupstaticsize() %or = or i32 %size, %x @@ -42,7 +42,7 @@ define void @fold_mi_v_or_0(i32 addrspace(1)* %out) { ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[SVAL]] ; GCN-NOT: [[VVAL]] ; GCN: buffer_store_dword [[VVAL]] -define void @fold_mi_s_or_0(i32 addrspace(1)* %out, i32 %x) #0 { +define amdgpu_kernel void @fold_mi_s_or_0(i32 addrspace(1)* %out, i32 %x) #0 { %size = call i32 @llvm.amdgcn.groupstaticsize() %or = or i32 %size, %x store i32 %or, i32 addrspace(1)* %out @@ -53,7 +53,7 @@ define void @fold_mi_s_or_0(i32 addrspace(1)* %out, i32 %x) #0 { ; GCN: v_mbcnt_lo_u32_b32_e64 [[RESULT:v[0-9]+]] ; GCN-NOT: [[RESULT]] ; GCN: buffer_store_dword [[RESULT]] -define void @fold_mi_v_xor_0(i32 addrspace(1)* %out) { +define amdgpu_kernel void @fold_mi_v_xor_0(i32 addrspace(1)* %out) { %x = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0 %size = call i32 @llvm.amdgcn.groupstaticsize() %xor = xor i32 %size, %x @@ -67,7 +67,7 @@ define void @fold_mi_v_xor_0(i32 addrspace(1)* %out) { ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[SVAL]] ; GCN-NOT: [[VVAL]] ; GCN: buffer_store_dword [[VVAL]] -define void @fold_mi_s_xor_0(i32 addrspace(1)* %out, i32 %x) #0 { +define amdgpu_kernel void @fold_mi_s_xor_0(i32 addrspace(1)* %out, i32 %x) #0 { %size = call i32 @llvm.amdgcn.groupstaticsize() %xor = xor i32 %size, %x store i32 %xor, i32 addrspace(1)* %out @@ -78,7 +78,7 @@ define void @fold_mi_s_xor_0(i32 addrspace(1)* %out, i32 %x) #0 { ; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], -1{{$}} ; GCN-NOT: [[RESULT]] ; GCN: buffer_store_dword [[RESULT]] -define void @fold_mi_s_not_0(i32 addrspace(1)* %out, i32 %x) #0 { +define amdgpu_kernel void @fold_mi_s_not_0(i32 addrspace(1)* %out, i32 %x) #0 { %size = call i32 @llvm.amdgcn.groupstaticsize() %xor = xor i32 %size, -1 store i32 %xor, i32 addrspace(1)* %out @@ -91,7 +91,7 @@ define void @fold_mi_s_not_0(i32 addrspace(1)* %out, i32 %x) #0 { ; GCN-NEXT: v_not_b32_e32 v[[RESULT_LO]] ; GCN-NEXT: v_mov_b32_e32 v[[RESULT_HI:[0-9]+]], -1{{$}} ; GCN-NEXT: buffer_store_dwordx2 v{{\[}}[[RESULT_LO]]:[[RESULT_HI]]{{\]}} -define void @fold_mi_v_not_0(i64 addrspace(1)* %out) { +define amdgpu_kernel void @fold_mi_v_not_0(i64 addrspace(1)* %out) { %vreg = load volatile i64, i64 addrspace(1)* undef %ctpop = call i64 @llvm.ctpop.i64(i64 %vreg) %xor = xor i64 %ctpop, -1 @@ -110,7 +110,7 @@ define void @fold_mi_v_not_0(i64 addrspace(1)* %out) { ; GCN-DAG: v_or_b32_e32 v[[RESULT_LO]], v[[VREG1_LO]], v[[RESULT_LO]] ; GCN-DAG: v_mov_b32_e32 v[[RESULT_HI:[0-9]+]], v[[VREG1_HI]] ; GCN: buffer_store_dwordx2 v{{\[}}[[RESULT_LO]]:[[RESULT_HI]]{{\]}} -define void @fold_mi_or_neg1(i64 addrspace(1)* %out) { +define amdgpu_kernel void @fold_mi_or_neg1(i64 addrspace(1)* %out) { %vreg0 = load volatile i64, i64 addrspace(1)* undef %vreg1 = load volatile i64, i64 addrspace(1)* undef %ctpop = call i64 @llvm.ctpop.i64(i64 %vreg0) @@ -126,7 +126,7 @@ define void @fold_mi_or_neg1(i64 addrspace(1)* %out) { ; GCN: v_not_b32 ; GCN: v_and_b32 ; GCN-NOT: v_and_b32 -define void @fold_mi_and_neg1(i64 addrspace(1)* %out) { +define amdgpu_kernel void @fold_mi_and_neg1(i64 addrspace(1)* %out) { %vreg0 = load volatile i64, i64 addrspace(1)* undef %vreg1 = load volatile i64, i64 addrspace(1)* undef %ctpop = call i64 @llvm.ctpop.i64(i64 %vreg0) |