diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll')
-rw-r--r-- | test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll b/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll index f7dc1a9d37e8..3616ec1f45d3 100644 --- a/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll +++ b/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll @@ -7,7 +7,7 @@ ; GCN-LABEL: {{^}}materialize_0_i32: ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_0_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_0_i32(i32 addrspace(1)* %out) { store i32 0, i32 addrspace(1)* %out ret void } @@ -16,7 +16,7 @@ define void @materialize_0_i32(i32 addrspace(1)* %out) { ; GCN: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}} ; GCN: v_mov_b32_e32 v[[HIK:[0-9]+]], v[[LOK]]{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_0_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_0_i64(i64 addrspace(1)* %out) { store i64 0, i64 addrspace(1)* %out ret void } @@ -24,7 +24,7 @@ define void @materialize_0_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_neg1_i32: ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], -1{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_neg1_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_neg1_i32(i32 addrspace(1)* %out) { store i32 -1, i32 addrspace(1)* %out ret void } @@ -33,7 +33,7 @@ define void @materialize_neg1_i32(i32 addrspace(1)* %out) { ; GCN: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}} ; GCN: v_mov_b32_e32 v[[HIK:[0-9]+]], v[[LOK]]{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_neg1_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_neg1_i64(i64 addrspace(1)* %out) { store i64 -1, i64 addrspace(1)* %out ret void } @@ -41,7 +41,7 @@ define void @materialize_neg1_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_signbit_i32: ; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 1{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_signbit_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_signbit_i32(i32 addrspace(1)* %out) { store i32 -2147483648, i32 addrspace(1)* %out ret void } @@ -50,7 +50,7 @@ define void @materialize_signbit_i32(i32 addrspace(1)* %out) { ; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}} ; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], 1{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_signbit_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_signbit_i64(i64 addrspace(1)* %out) { store i64 -9223372036854775808, i64 addrspace(1)* %out ret void } @@ -58,7 +58,7 @@ define void @materialize_signbit_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_rev_neg16_i32: ; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], -16{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_rev_neg16_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_neg16_i32(i32 addrspace(1)* %out) { store i32 268435455, i32 addrspace(1)* %out ret void } @@ -67,7 +67,7 @@ define void @materialize_rev_neg16_i32(i32 addrspace(1)* %out) { ; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}} ; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], -16{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_rev_neg16_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_neg16_i64(i64 addrspace(1)* %out) { store i64 1152921504606846975, i64 addrspace(1)* %out ret void } @@ -75,7 +75,7 @@ define void @materialize_rev_neg16_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_rev_neg17_i32: ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0xf7ffffff{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_rev_neg17_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_neg17_i32(i32 addrspace(1)* %out) { store i32 -134217729, i32 addrspace(1)* %out ret void } @@ -84,7 +84,7 @@ define void @materialize_rev_neg17_i32(i32 addrspace(1)* %out) { ; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}} ; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0xf7ffffff{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_rev_neg17_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_neg17_i64(i64 addrspace(1)* %out) { store i64 -576460752303423489, i64 addrspace(1)* %out ret void } @@ -92,7 +92,7 @@ define void @materialize_rev_neg17_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_rev_64_i32: ; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 64{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_rev_64_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_64_i32(i32 addrspace(1)* %out) { store i32 33554432, i32 addrspace(1)* %out ret void } @@ -101,7 +101,7 @@ define void @materialize_rev_64_i32(i32 addrspace(1)* %out) { ; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}} ; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], 64{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_rev_64_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_64_i64(i64 addrspace(1)* %out) { store i64 144115188075855872, i64 addrspace(1)* %out ret void } @@ -109,7 +109,7 @@ define void @materialize_rev_64_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_rev_65_i32: ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0x82000000{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_rev_65_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_65_i32(i32 addrspace(1)* %out) { store i32 -2113929216, i32 addrspace(1)* %out ret void } @@ -118,7 +118,7 @@ define void @materialize_rev_65_i32(i32 addrspace(1)* %out) { ; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}} ; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0x82000000{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_rev_65_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_65_i64(i64 addrspace(1)* %out) { store i64 -9079256848778919936, i64 addrspace(1)* %out ret void } @@ -126,7 +126,7 @@ define void @materialize_rev_65_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_rev_3_i32: ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], -2.0{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_rev_3_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_3_i32(i32 addrspace(1)* %out) { store i32 -1073741824, i32 addrspace(1)* %out ret void } @@ -135,7 +135,7 @@ define void @materialize_rev_3_i32(i32 addrspace(1)* %out) { ; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}} ; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], -2.0{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_rev_3_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_3_i64(i64 addrspace(1)* %out) { store i64 -4611686018427387904, i64 addrspace(1)* %out ret void } @@ -143,7 +143,7 @@ define void @materialize_rev_3_i64(i64 addrspace(1)* %out) { ; GCN-LABEL: {{^}}materialize_rev_1.0_i32: ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0x1fc{{$}} ; GCN: buffer_store_dword [[K]] -define void @materialize_rev_1.0_i32(i32 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_1.0_i32(i32 addrspace(1)* %out) { store i32 508, i32 addrspace(1)* %out ret void } @@ -152,70 +152,70 @@ define void @materialize_rev_1.0_i32(i32 addrspace(1)* %out) { ; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0x1fc{{$}} ; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0{{$}} ; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}} -define void @materialize_rev_1.0_i64(i64 addrspace(1)* %out) { +define amdgpu_kernel void @materialize_rev_1.0_i64(i64 addrspace(1)* %out) { store i64 508, i64 addrspace(1)* %out ret void } ; GCN-LABEL: {{^}}s_materialize_0_i32: ; GCN: s_mov_b32 s{{[0-9]+}}, 0{{$}} -define void @s_materialize_0_i32() { +define amdgpu_kernel void @s_materialize_0_i32() { call void asm sideeffect "; use $0", "s"(i32 0) ret void } ; GCN-LABEL: {{^}}s_materialize_1_i32: ; GCN: s_mov_b32 s{{[0-9]+}}, 1{{$}} -define void @s_materialize_1_i32() { +define amdgpu_kernel void @s_materialize_1_i32() { call void asm sideeffect "; use $0", "s"(i32 1) ret void } ; GCN-LABEL: {{^}}s_materialize_neg1_i32: ; GCN: s_mov_b32 s{{[0-9]+}}, -1{{$}} -define void @s_materialize_neg1_i32() { +define amdgpu_kernel void @s_materialize_neg1_i32() { call void asm sideeffect "; use $0", "s"(i32 -1) ret void } ; GCN-LABEL: {{^}}s_materialize_signbit_i32: ; GCN: s_brev_b32 s{{[0-9]+}}, 1{{$}} -define void @s_materialize_signbit_i32() { +define amdgpu_kernel void @s_materialize_signbit_i32() { call void asm sideeffect "; use $0", "s"(i32 -2147483648) ret void } ; GCN-LABEL: {{^}}s_materialize_rev_64_i32: ; GCN: s_brev_b32 s{{[0-9]+}}, 64{{$}} -define void @s_materialize_rev_64_i32() { +define amdgpu_kernel void @s_materialize_rev_64_i32() { call void asm sideeffect "; use $0", "s"(i32 33554432) ret void } ; GCN-LABEL: {{^}}s_materialize_rev_65_i32: ; GCN: s_mov_b32 s{{[0-9]+}}, 0x82000000{{$}} -define void @s_materialize_rev_65_i32() { +define amdgpu_kernel void @s_materialize_rev_65_i32() { call void asm sideeffect "; use $0", "s"(i32 -2113929216) ret void } ; GCN-LABEL: {{^}}s_materialize_rev_neg16_i32: ; GCN: s_brev_b32 s{{[0-9]+}}, -16{{$}} -define void @s_materialize_rev_neg16_i32() { +define amdgpu_kernel void @s_materialize_rev_neg16_i32() { call void asm sideeffect "; use $0", "s"(i32 268435455) ret void } ; GCN-LABEL: {{^}}s_materialize_rev_neg17_i32: ; GCN: s_mov_b32 s{{[0-9]+}}, 0xf7ffffff{{$}} -define void @s_materialize_rev_neg17_i32() { +define amdgpu_kernel void @s_materialize_rev_neg17_i32() { call void asm sideeffect "; use $0", "s"(i32 -134217729) ret void } ; GCN-LABEL: {{^}}s_materialize_rev_1.0_i32: ; GCN: s_movk_i32 s{{[0-9]+}}, 0x1fc{{$}} -define void @s_materialize_rev_1.0_i32() { +define amdgpu_kernel void @s_materialize_rev_1.0_i32() { call void asm sideeffect "; use $0", "s"(i32 508) ret void } |