diff options
Diffstat (limited to 'test/Analysis/DivergenceAnalysis')
7 files changed, 51 insertions, 30 deletions
diff --git a/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll b/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll index e3323dc5e21c..3214dd41eeb4 100644 --- a/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll +++ b/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll @@ -12,4 +12,34 @@ define {i32, i1} @test2(i32* %ptr, i32 %cmp, i32 %new) { ret {i32, i1} %orig } +; CHECK: DIVERGENT: %ret = call i32 @llvm.amdgcn.atomic.inc.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false) +define i32 @test_atomic_inc_i32(i32 addrspace(1)* %ptr, i32 %val) #0 { + %ret = call i32 @llvm.amdgcn.atomic.inc.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false) + ret i32 %ret +} + +; CHECK: DIVERGENT: %ret = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false) +define i64 @test_atomic_inc_i64(i64 addrspace(1)* %ptr, i64 %val) #0 { + %ret = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false) + ret i64 %ret +} + +; CHECK: DIVERGENT: %ret = call i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false) +define i32 @test_atomic_dec_i32(i32 addrspace(1)* %ptr, i32 %val) #0 { + %ret = call i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false) + ret i32 %ret +} + +; CHECK: DIVERGENT: %ret = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false) +define i64 @test_atomic_dec_i64(i64 addrspace(1)* %ptr, i64 %val) #0 { + %ret = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false) + ret i64 %ret +} + +declare i32 @llvm.amdgcn.atomic.inc.i32.p1i32(i32 addrspace(1)* nocapture, i32, i32, i32, i1) #1 +declare i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* nocapture, i64, i32, i32, i1) #1 +declare i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* nocapture, i32, i32, i32, i1) #1 +declare i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* nocapture, i64, i32, i32, i1) #1 + attributes #0 = { nounwind } +attributes #1 = { nounwind argmemonly } diff --git a/test/Analysis/DivergenceAnalysis/AMDGPU/interp-intrinsics.ll b/test/Analysis/DivergenceAnalysis/AMDGPU/interp-intrinsics.ll deleted file mode 100644 index d1c90ba608c8..000000000000 --- a/test/Analysis/DivergenceAnalysis/AMDGPU/interp-intrinsics.ll +++ /dev/null @@ -1,22 +0,0 @@ -; RUN: opt -mtriple amdgcn--- -analyze -divergence %s | FileCheck %s - -; CHECK-LABEL: 'fs_interp' -; CHECK: DIVERGENT: %v = call float @llvm.SI.fs.interp( -define amdgpu_ps void @fs_interp(i32 inreg %prim_mask, <2 x i32> %interp_param) #1 { - %v = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %prim_mask, <2 x i32> %interp_param) - store volatile float %v, float addrspace(1)* undef - ret void -} - -; CHECK-LABEL: 'fs_constant' -; CHECK: DIVERGENT: %v = call float @llvm.SI.fs.constant( -define amdgpu_ps void @fs_constant(i32 inreg %prim_mask, <2 x i32> %interp_param) #1 { - %v = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %prim_mask) - store volatile float %v, float addrspace(1)* undef - ret void -} - -declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #0 -declare float @llvm.SI.fs.constant(i32, i32, i32) #0 - -attributes #0 = { nounwind readnone } diff --git a/test/Analysis/DivergenceAnalysis/AMDGPU/intrinsics.ll b/test/Analysis/DivergenceAnalysis/AMDGPU/intrinsics.ll new file mode 100644 index 000000000000..d22669522591 --- /dev/null +++ b/test/Analysis/DivergenceAnalysis/AMDGPU/intrinsics.ll @@ -0,0 +1,13 @@ +; RUN: opt -mtriple=amdgcn-- -analyze -divergence %s | FileCheck %s + +; CHECK: DIVERGENT: %swizzle = call i32 @llvm.amdgcn.ds.swizzle(i32 %src, i32 100) #0 +define amdgpu_kernel void @ds_swizzle(i32 addrspace(1)* %out, i32 %src) #0 { + %swizzle = call i32 @llvm.amdgcn.ds.swizzle(i32 %src, i32 100) #0 + store i32 %swizzle, i32 addrspace(1)* %out, align 4 + ret void +} + +declare i32 @llvm.amdgcn.ds.swizzle(i32, i32) #1 + +attributes #0 = { nounwind convergent } +attributes #1 = { nounwind readnone convergent } diff --git a/test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll b/test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll index 73674d0599e2..0acb050c2519 100644 --- a/test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll +++ b/test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll @@ -3,7 +3,7 @@ ; CHECK: DIVERGENT: ; CHECK-NOT: %arg0 ; CHECK-NOT: %arg1 -; CHECK-NOT; %arg2 +; CHECK-NOT: %arg2 ; CHECK: <2 x i32> %arg3 ; CHECK: DIVERGENT: <3 x i32> %arg4 ; CHECK: DIVERGENT: float %arg5 diff --git a/test/Analysis/DivergenceAnalysis/AMDGPU/no-return-blocks.ll b/test/Analysis/DivergenceAnalysis/AMDGPU/no-return-blocks.ll index b4fa79a6ba9f..6144ffea5b61 100644 --- a/test/Analysis/DivergenceAnalysis/AMDGPU/no-return-blocks.ll +++ b/test/Analysis/DivergenceAnalysis/AMDGPU/no-return-blocks.ll @@ -5,7 +5,7 @@ ; CHECK: DIVERGENT: %tmp11 = load volatile float, float addrspace(1)* %tmp5, align 4 ; The post dominator tree does not have a root node in this case -define void @no_return_blocks(float addrspace(1)* noalias nocapture readonly %arg, float addrspace(1)* noalias nocapture readonly %arg1) #0 { +define amdgpu_kernel void @no_return_blocks(float addrspace(1)* noalias nocapture readonly %arg, float addrspace(1)* noalias nocapture readonly %arg1) #0 { bb0: %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() #0 %tmp2 = sext i32 %tmp to i64 diff --git a/test/Analysis/DivergenceAnalysis/AMDGPU/unreachable-loop-block.ll b/test/Analysis/DivergenceAnalysis/AMDGPU/unreachable-loop-block.ll index ca93dda2c573..7ade8eabd451 100644 --- a/test/Analysis/DivergenceAnalysis/AMDGPU/unreachable-loop-block.ll +++ b/test/Analysis/DivergenceAnalysis/AMDGPU/unreachable-loop-block.ll @@ -1,7 +1,7 @@ ; RUN: opt %s -mtriple amdgcn-- -analyze -divergence | FileCheck %s ; CHECK: DIVERGENT: %tmp = cmpxchg volatile -define void @unreachable_loop(i32 %tidx) #0 { +define amdgpu_kernel void @unreachable_loop(i32 %tidx) #0 { entry: unreachable diff --git a/test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll b/test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll index 669ee802c516..98fbc88a2cfd 100644 --- a/test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll +++ b/test/Analysis/DivergenceAnalysis/AMDGPU/workitem-intrinsics.ll @@ -7,35 +7,35 @@ declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0 declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0 ; CHECK: DIVERGENT: %id.x = call i32 @llvm.amdgcn.workitem.id.x() -define void @workitem_id_x() #1 { +define amdgpu_kernel void @workitem_id_x() #1 { %id.x = call i32 @llvm.amdgcn.workitem.id.x() store volatile i32 %id.x, i32 addrspace(1)* undef ret void } ; CHECK: DIVERGENT: %id.y = call i32 @llvm.amdgcn.workitem.id.y() -define void @workitem_id_y() #1 { +define amdgpu_kernel void @workitem_id_y() #1 { %id.y = call i32 @llvm.amdgcn.workitem.id.y() store volatile i32 %id.y, i32 addrspace(1)* undef ret void } ; CHECK: DIVERGENT: %id.z = call i32 @llvm.amdgcn.workitem.id.z() -define void @workitem_id_z() #1 { +define amdgpu_kernel void @workitem_id_z() #1 { %id.z = call i32 @llvm.amdgcn.workitem.id.z() store volatile i32 %id.z, i32 addrspace(1)* undef ret void } ; CHECK: DIVERGENT: %mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 0, i32 0) -define void @mbcnt_lo() #1 { +define amdgpu_kernel void @mbcnt_lo() #1 { %mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 0, i32 0) store volatile i32 %mbcnt.lo, i32 addrspace(1)* undef ret void } ; CHECK: DIVERGENT: %mbcnt.hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 0, i32 0) -define void @mbcnt_hi() #1 { +define amdgpu_kernel void @mbcnt_hi() #1 { %mbcnt.hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 0, i32 0) store volatile i32 %mbcnt.hi, i32 addrspace(1)* undef ret void |