diff options
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 59 |
1 files changed, 43 insertions, 16 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index d26b04556abb..54ff0d9966cb 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -182,6 +182,9 @@ static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); +static DecodeStatus +DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); @@ -201,6 +204,8 @@ static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, const void *Decoder); static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); @@ -538,10 +543,6 @@ template<unsigned MinLog, unsigned MaxLog> static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); -template <int shift> -static DecodeStatus DecodeExpandedImmOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder); template<unsigned start> static DecodeStatus DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, @@ -1087,8 +1088,12 @@ DecodeStatus ARMDisassembler::getThumbInstruction(MCInst &MI, uint64_t &Size, } } + uint32_t Coproc = fieldFromInstruction(Insn32, 8, 4); + const uint8_t *DecoderTable = ARM::isCDECoproc(Coproc, STI) + ? DecoderTableThumb2CDE32 + : DecoderTableThumb2CoProc32; Result = - decodeInstruction(DecoderTableThumb2CoProc32, MI, Insn32, Address, this, STI); + decodeInstruction(DecoderTable, MI, Insn32, Address, this, STI); if (Result != MCDisassembler::Fail) { Size = 4; Check(Result, AddThumbPredicate(MI)); @@ -1220,10 +1225,12 @@ static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler::Success; + // According to the Arm ARM RegNo = 14 is undefined, but we return fail + // rather than SoftFail as there is no GPRPair table entry for index 7. if (RegNo > 13) return MCDisassembler::Fail; - if ((RegNo & 1) || RegNo == 0xe) + if (RegNo & 1) S = MCDisassembler::SoftFail; unsigned RegisterPair = GPRPairDecoderTable[RegNo/2]; @@ -1231,6 +1238,19 @@ static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, return S; } +static DecodeStatus DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, const void *Decoder) { + if (RegNo > 13) + return MCDisassembler::Fail; + + unsigned RegisterPair = GPRPairDecoderTable[RegNo/2]; + Inst.addOperand(MCOperand::createReg(RegisterPair)); + + if ((RegNo & 1) || RegNo > 10) + return MCDisassembler::SoftFail; + return MCDisassembler::Success; +} + static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { @@ -6068,6 +6088,23 @@ static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, return MCDisassembler::Success; } +static DecodeStatus +DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, const void *Decoder) { + if (RegNo == 15) { + Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV)); + return MCDisassembler::Success; + } + + unsigned Register = GPRDecoderTable[RegNo]; + Inst.addOperand(MCOperand::createReg(Register)); + + if (RegNo == 13) + return MCDisassembler::SoftFail; + + return MCDisassembler::Success; +} + static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler::Success; @@ -6395,16 +6432,6 @@ static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val, return S; } -template <int shift> -static DecodeStatus DecodeExpandedImmOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder) { - Val <<= shift; - - Inst.addOperand(MCOperand::createImm(Val)); - return MCDisassembler::Success; -} - template<unsigned start> static DecodeStatus DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, |