diff options
Diffstat (limited to 'contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp')
-rw-r--r-- | contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp | 86 |
1 files changed, 55 insertions, 31 deletions
diff --git a/contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp b/contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp index d7397a32f074..6cca2276856d 100644 --- a/contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp +++ b/contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp @@ -1,3 +1,4 @@ + //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information -== ----------===// // // The LLVM Compiler Infrastructure @@ -14,28 +15,30 @@ #include "Mips16RegisterInfo.h" #include "Mips16InstrInfo.h" #include "Mips.h" +#include "Mips16InstrInfo.h" #include "MipsAnalyzeImmediate.h" #include "MipsInstrInfo.h" -#include "MipsSubtarget.h" #include "MipsMachineFunction.h" -#include "llvm/Constants.h" -#include "llvm/DebugInfo.h" -#include "llvm/Type.h" -#include "llvm/Function.h" -#include "llvm/CodeGen/ValueTypes.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineFunction.h" +#include "MipsSubtarget.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/MachineFrameInfo.h" -#include "llvm/Target/TargetFrameLowering.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetOptions.h" -#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/DebugInfo.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/Function.h" +#include "llvm/IR/Type.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/BitVector.h" -#include "llvm/ADT/STLExtras.h" +#include "llvm/Target/TargetFrameLowering.h" +#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOptions.h" using namespace llvm; @@ -43,25 +46,36 @@ Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST, const Mips16InstrInfo &I) : MipsRegisterInfo(ST), TII(I) {} -// This function eliminate ADJCALLSTACKDOWN, -// ADJCALLSTACKUP pseudo instructions -void Mips16RegisterInfo:: -eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, - MachineBasicBlock::iterator I) const { - const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); - - if (!TFI->hasReservedCallFrame(MF)) { - int64_t Amount = I->getOperand(0).getImm(); - - if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) - Amount = -Amount; +bool Mips16RegisterInfo::requiresRegisterScavenging + (const MachineFunction &MF) const { + return true; +} +bool Mips16RegisterInfo::requiresFrameIndexScavenging + (const MachineFunction &MF) const { + return true; +} - const Mips16InstrInfo *II = static_cast<const Mips16InstrInfo*>(&TII); +bool Mips16RegisterInfo::useFPForScavengingIndex + (const MachineFunction &MF) const { + return false; +} - II->adjustStackPtr(Mips::SP, Amount, MBB, I); - } +bool Mips16RegisterInfo::saveScavengerRegister + (MachineBasicBlock &MBB, + MachineBasicBlock::iterator I, + MachineBasicBlock::iterator &UseMI, + const TargetRegisterClass *RC, + unsigned Reg) const { + DebugLoc DL; + TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true); + TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); + return true; +} - MBB.erase(I); +const TargetRegisterClass * +Mips16RegisterInfo::intRegClass(unsigned Size) const { + assert(Size == 4); + return &Mips::CPU16RegsRegClass; } void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II, @@ -114,13 +128,23 @@ void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II, // by adding the size of the stack: // incoming argument, callee-saved register location or local variable. int64_t Offset; + bool IsKill = false; Offset = SPOffset + (int64_t)StackSize; Offset += MI.getOperand(OpNo + 1).getImm(); DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n"); - MI.getOperand(OpNo).ChangeToRegister(FrameReg, false); + if (!MI.isDebugValue() && ( ((FrameReg != Mips::SP) && !isInt<16>(Offset)) || + ((FrameReg == Mips::SP) && !isInt<15>(Offset)) )) { + MachineBasicBlock &MBB = *MI.getParent(); + DebugLoc DL = II->getDebugLoc(); + unsigned NewImm; + FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm); + Offset = SignExtend64<16>(NewImm); + IsKill = true; + } + MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); MI.getOperand(OpNo + 1).ChangeToImmediate(Offset); |