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path: root/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
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-rw-r--r--contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index eef6ae677ac8..db949f3476e2 100644
--- a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3721,6 +3721,10 @@ bool RISCVDAGToDAGISel::performCombineVMergeAndVOps(SDNode *N) {
assert(!Mask || cast<RegisterSDNode>(Mask)->getReg() == RISCV::V0);
assert(!Glue || Glue.getValueType() == MVT::Glue);
+ // If the EEW of True is different from vmerge's SEW, then we can't fold.
+ if (True.getSimpleValueType() != N->getSimpleValueType(0))
+ return false;
+
// We require that either merge and false are the same, or that merge
// is undefined.
if (Merge != False && !isImplicitDef(Merge))