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diff --git a/contrib/gcc/doc/tm.texi b/contrib/gcc/doc/tm.texi new file mode 100644 index 000000000000..e9797bfd53f7 --- /dev/null +++ b/contrib/gcc/doc/tm.texi @@ -0,0 +1,8614 @@ +@c Copyright (C) 1988,1989,1992,1993,1994,1995,1996,1997,1998,1999,2000,2001,2002 +@c Free Software Foundation, Inc. +@c This is part of the GCC manual. +@c For copying conditions, see the file gcc.texi. + +@node Target Macros +@chapter Target Description Macros and Functions +@cindex machine description macros +@cindex target description macros +@cindex macros, target description +@cindex @file{tm.h} macros + +In addition to the file @file{@var{machine}.md}, a machine description +includes a C header file conventionally given the name +@file{@var{machine}.h} and a C source file named @file{@var{machine}.c}. +The header file defines numerous macros that convey the information +about the target machine that does not fit into the scheme of the +@file{.md} file. The file @file{tm.h} should be a link to +@file{@var{machine}.h}. The header file @file{config.h} includes +@file{tm.h} and most compiler source files include @file{config.h}. The +source file defines a variable @code{targetm}, which is a structure +containing pointers to functions and data relating to the target +machine. @file{@var{machine}.c} should also contain their definitions, +if they are not defined elsewhere in GCC, and other functions called +through the macros defined in the @file{.h} file. + +@menu +* Target Structure:: The @code{targetm} variable. +* Driver:: Controlling how the driver runs the compilation passes. +* Run-time Target:: Defining @samp{-m} options like @option{-m68000} and @option{-m68020}. +* Per-Function Data:: Defining data structures for per-function information. +* Storage Layout:: Defining sizes and alignments of data. +* Type Layout:: Defining sizes and properties of basic user data types. +* Escape Sequences:: Defining the value of target character escape sequences +* Registers:: Naming and describing the hardware registers. +* Register Classes:: Defining the classes of hardware registers. +* Stack and Calling:: Defining which way the stack grows and by how much. +* Varargs:: Defining the varargs macros. +* Trampolines:: Code set up at run time to enter a nested function. +* Library Calls:: Controlling how library routines are implicitly called. +* Addressing Modes:: Defining addressing modes valid for memory operands. +* Condition Code:: Defining how insns update the condition code. +* Costs:: Defining relative costs of different operations. +* Scheduling:: Adjusting the behavior of the instruction scheduler. +* Sections:: Dividing storage into text, data, and other sections. +* PIC:: Macros for position independent code. +* Assembler Format:: Defining how to write insns and pseudo-ops to output. +* Debugging Info:: Defining the format of debugging output. +* Cross-compilation:: Handling floating point for cross-compilers. +* Mode Switching:: Insertion of mode-switching instructions. +* Target Attributes:: Defining target-specific uses of @code{__attribute__}. +* Misc:: Everything else. +@end menu + +@node Target Structure +@section The Global @code{targetm} Variable +@cindex target hooks +@cindex target functions + +@deftypevar {struct gcc_target} targetm +The target @file{.c} file must define the global @code{targetm} variable +which contains pointers to functions and data relating to the target +machine. The variable is declared in @file{target.h}; +@file{target-def.h} defines the macro @code{TARGET_INITIALIZER} which is +used to initialize the variable, and macros for the default initializers +for elements of the structure. The @file{.c} file should override those +macros for which the default definition is inappropriate. For example: +@smallexample +#include "target.h" +#include "target-def.h" + +/* @r{Initialize the GCC target structure.} */ + +#undef TARGET_COMP_TYPE_ATTRIBUTES +#define TARGET_COMP_TYPE_ATTRIBUTES @var{machine}_comp_type_attributes + +struct gcc_target targetm = TARGET_INITIALIZER; +@end smallexample +@end deftypevar + +Where a macro should be defined in the @file{.c} file in this manner to +form part of the @code{targetm} structure, it is documented below as a +``Target Hook'' with a prototype. Many macros will change in future +from being defined in the @file{.h} file to being part of the +@code{targetm} structure. + +@node Driver +@section Controlling the Compilation Driver, @file{gcc} +@cindex driver +@cindex controlling the compilation driver + +@c prevent bad page break with this line +You can control the compilation driver. + +@table @code +@findex SWITCH_TAKES_ARG +@item SWITCH_TAKES_ARG (@var{char}) +A C expression which determines whether the option @option{-@var{char}} +takes arguments. The value should be the number of arguments that +option takes--zero, for many options. + +By default, this macro is defined as +@code{DEFAULT_SWITCH_TAKES_ARG}, which handles the standard options +properly. You need not define @code{SWITCH_TAKES_ARG} unless you +wish to add additional options which take arguments. Any redefinition +should call @code{DEFAULT_SWITCH_TAKES_ARG} and then check for +additional options. + +@findex WORD_SWITCH_TAKES_ARG +@item WORD_SWITCH_TAKES_ARG (@var{name}) +A C expression which determines whether the option @option{-@var{name}} +takes arguments. The value should be the number of arguments that +option takes--zero, for many options. This macro rather than +@code{SWITCH_TAKES_ARG} is used for multi-character option names. + +By default, this macro is defined as +@code{DEFAULT_WORD_SWITCH_TAKES_ARG}, which handles the standard options +properly. You need not define @code{WORD_SWITCH_TAKES_ARG} unless you +wish to add additional options which take arguments. Any redefinition +should call @code{DEFAULT_WORD_SWITCH_TAKES_ARG} and then check for +additional options. + +@findex SWITCH_CURTAILS_COMPILATION +@item SWITCH_CURTAILS_COMPILATION (@var{char}) +A C expression which determines whether the option @option{-@var{char}} +stops compilation before the generation of an executable. The value is +boolean, nonzero if the option does stop an executable from being +generated, zero otherwise. + +By default, this macro is defined as +@code{DEFAULT_SWITCH_CURTAILS_COMPILATION}, which handles the standard +options properly. You need not define +@code{SWITCH_CURTAILS_COMPILATION} unless you wish to add additional +options which affect the generation of an executable. Any redefinition +should call @code{DEFAULT_SWITCH_CURTAILS_COMPILATION} and then check +for additional options. + +@findex SWITCHES_NEED_SPACES +@item SWITCHES_NEED_SPACES +A string-valued C expression which enumerates the options for which +the linker needs a space between the option and its argument. + +If this macro is not defined, the default value is @code{""}. + +@findex TARGET_OPTION_TRANSLATE_TABLE +@item TARGET_OPTION_TRANSLATE_TABLE +If defined, a list of pairs of strings, the first of which is a +potential command line target to the @file{gcc} driver program, and the +second of which is a space-separated (tabs and other whitespace are not +supported) list of options with which to replace the first option. The +target defining this list is responsible for assuring that the results +are valid. Replacement options may not be the @code{--opt} style, they +must be the @code{-opt} style. It is the intention of this macro to +provide a mechanism for substitution that affects the multilibs chosen, +such as one option that enables many options, some of which select +multilibs. Example nonsensical definition, where @code{-malt-abi}, +@code{-EB}, and @code{-mspoo} cause different multilibs to be chosen: + +@example +#define TARGET_OPTION_TRANSLATE_TABLE \ +@{ "-fast", "-march=fast-foo -malt-abi -I/usr/fast-foo" @}, \ +@{ "-compat", "-EB -malign=4 -mspoo" @} +@end example + +@findex CPP_SPEC +@item CPP_SPEC +A C string constant that tells the GCC driver program options to +pass to CPP@. It can also specify how to translate options you +give to GCC into options for GCC to pass to the CPP@. + +Do not define this macro if it does not need to do anything. + +@findex CPLUSPLUS_CPP_SPEC +@item CPLUSPLUS_CPP_SPEC +This macro is just like @code{CPP_SPEC}, but is used for C++, rather +than C@. If you do not define this macro, then the value of +@code{CPP_SPEC} (if any) will be used instead. + +@findex NO_BUILTIN_SIZE_TYPE +@item NO_BUILTIN_SIZE_TYPE +If this macro is defined, the preprocessor will not define the built-in macro +@code{__SIZE_TYPE__}. The macro @code{__SIZE_TYPE__} must then be defined +by @code{CPP_SPEC} instead. + +This should be defined if @code{SIZE_TYPE} depends on target dependent flags +which are not accessible to the preprocessor. Otherwise, it should not +be defined. + +@findex NO_BUILTIN_PTRDIFF_TYPE +@item NO_BUILTIN_PTRDIFF_TYPE +If this macro is defined, the preprocessor will not define the built-in macro +@code{__PTRDIFF_TYPE__}. The macro @code{__PTRDIFF_TYPE__} must then be +defined by @code{CPP_SPEC} instead. + +This should be defined if @code{PTRDIFF_TYPE} depends on target dependent flags +which are not accessible to the preprocessor. Otherwise, it should not +be defined. + +@findex NO_BUILTIN_WCHAR_TYPE +@item NO_BUILTIN_WCHAR_TYPE +If this macro is defined, the preprocessor will not define the built-in macro +@code{__WCHAR_TYPE__}. The macro @code{__WCHAR_TYPE__} must then be +defined by @code{CPP_SPEC} instead. + +This should be defined if @code{WCHAR_TYPE} depends on target dependent flags +which are not accessible to the preprocessor. Otherwise, it should not +be defined. + +@findex NO_BUILTIN_WINT_TYPE +@item NO_BUILTIN_WINT_TYPE +If this macro is defined, the preprocessor will not define the built-in macro +@code{__WINT_TYPE__}. The macro @code{__WINT_TYPE__} must then be +defined by @code{CPP_SPEC} instead. + +This should be defined if @code{WINT_TYPE} depends on target dependent flags +which are not accessible to the preprocessor. Otherwise, it should not +be defined. + +@findex SIGNED_CHAR_SPEC +@item SIGNED_CHAR_SPEC +A C string constant that tells the GCC driver program options to +pass to CPP@. By default, this macro is defined to pass the option +@option{-D__CHAR_UNSIGNED__} to CPP if @code{char} will be treated as +@code{unsigned char} by @code{cc1}. + +Do not define this macro unless you need to override the default +definition. + +@findex CC1_SPEC +@item CC1_SPEC +A C string constant that tells the GCC driver program options to +pass to @code{cc1}, @code{cc1plus}, @code{f771}, and the other language +front ends. +It can also specify how to translate options you give to GCC into options +for GCC to pass to front ends. + +Do not define this macro if it does not need to do anything. + +@findex CC1PLUS_SPEC +@item CC1PLUS_SPEC +A C string constant that tells the GCC driver program options to +pass to @code{cc1plus}. It can also specify how to translate options you +give to GCC into options for GCC to pass to the @code{cc1plus}. + +Do not define this macro if it does not need to do anything. +Note that everything defined in CC1_SPEC is already passed to +@code{cc1plus} so there is no need to duplicate the contents of +CC1_SPEC in CC1PLUS_SPEC@. + +@findex ASM_SPEC +@item ASM_SPEC +A C string constant that tells the GCC driver program options to +pass to the assembler. It can also specify how to translate options +you give to GCC into options for GCC to pass to the assembler. +See the file @file{sun3.h} for an example of this. + +Do not define this macro if it does not need to do anything. + +@findex ASM_FINAL_SPEC +@item ASM_FINAL_SPEC +A C string constant that tells the GCC driver program how to +run any programs which cleanup after the normal assembler. +Normally, this is not needed. See the file @file{mips.h} for +an example of this. + +Do not define this macro if it does not need to do anything. + +@findex LINK_SPEC +@item LINK_SPEC +A C string constant that tells the GCC driver program options to +pass to the linker. It can also specify how to translate options you +give to GCC into options for GCC to pass to the linker. + +Do not define this macro if it does not need to do anything. + +@findex LIB_SPEC +@item LIB_SPEC +Another C string constant used much like @code{LINK_SPEC}. The difference +between the two is that @code{LIB_SPEC} is used at the end of the +command given to the linker. + +If this macro is not defined, a default is provided that +loads the standard C library from the usual place. See @file{gcc.c}. + +@findex LIBGCC_SPEC +@item LIBGCC_SPEC +Another C string constant that tells the GCC driver program +how and when to place a reference to @file{libgcc.a} into the +linker command line. This constant is placed both before and after +the value of @code{LIB_SPEC}. + +If this macro is not defined, the GCC driver provides a default that +passes the string @option{-lgcc} to the linker. + +@findex STARTFILE_SPEC +@item STARTFILE_SPEC +Another C string constant used much like @code{LINK_SPEC}. The +difference between the two is that @code{STARTFILE_SPEC} is used at +the very beginning of the command given to the linker. + +If this macro is not defined, a default is provided that loads the +standard C startup file from the usual place. See @file{gcc.c}. + +@findex ENDFILE_SPEC +@item ENDFILE_SPEC +Another C string constant used much like @code{LINK_SPEC}. The +difference between the two is that @code{ENDFILE_SPEC} is used at +the very end of the command given to the linker. + +Do not define this macro if it does not need to do anything. + +@findex THREAD_MODEL_SPEC +@item THREAD_MODEL_SPEC +GCC @code{-v} will print the thread model GCC was configured to use. +However, this doesn't work on platforms that are multilibbed on thread +models, such as AIX 4.3. On such platforms, define +@code{THREAD_MODEL_SPEC} such that it evaluates to a string without +blanks that names one of the recognized thread models. @code{%*}, the +default value of this macro, will expand to the value of +@code{thread_file} set in @file{config.gcc}. + +@findex EXTRA_SPECS +@item EXTRA_SPECS +Define this macro to provide additional specifications to put in the +@file{specs} file that can be used in various specifications like +@code{CC1_SPEC}. + +The definition should be an initializer for an array of structures, +containing a string constant, that defines the specification name, and a +string constant that provides the specification. + +Do not define this macro if it does not need to do anything. + +@code{EXTRA_SPECS} is useful when an architecture contains several +related targets, which have various @code{@dots{}_SPECS} which are similar +to each other, and the maintainer would like one central place to keep +these definitions. + +For example, the PowerPC System V.4 targets use @code{EXTRA_SPECS} to +define either @code{_CALL_SYSV} when the System V calling sequence is +used or @code{_CALL_AIX} when the older AIX-based calling sequence is +used. + +The @file{config/rs6000/rs6000.h} target file defines: + +@example +#define EXTRA_SPECS \ + @{ "cpp_sysv_default", CPP_SYSV_DEFAULT @}, + +#define CPP_SYS_DEFAULT "" +@end example + +The @file{config/rs6000/sysv.h} target file defines: +@smallexample +#undef CPP_SPEC +#define CPP_SPEC \ +"%@{posix: -D_POSIX_SOURCE @} \ +%@{mcall-sysv: -D_CALL_SYSV @} %@{mcall-aix: -D_CALL_AIX @} \ +%@{!mcall-sysv: %@{!mcall-aix: %(cpp_sysv_default) @}@} \ +%@{msoft-float: -D_SOFT_FLOAT@} %@{mcpu=403: -D_SOFT_FLOAT@}" + +#undef CPP_SYSV_DEFAULT +#define CPP_SYSV_DEFAULT "-D_CALL_SYSV" +@end smallexample + +while the @file{config/rs6000/eabiaix.h} target file defines +@code{CPP_SYSV_DEFAULT} as: + +@smallexample +#undef CPP_SYSV_DEFAULT +#define CPP_SYSV_DEFAULT "-D_CALL_AIX" +@end smallexample + +@findex LINK_LIBGCC_SPECIAL +@item LINK_LIBGCC_SPECIAL +Define this macro if the driver program should find the library +@file{libgcc.a} itself and should not pass @option{-L} options to the +linker. If you do not define this macro, the driver program will pass +the argument @option{-lgcc} to tell the linker to do the search and will +pass @option{-L} options to it. + +@findex LINK_LIBGCC_SPECIAL_1 +@item LINK_LIBGCC_SPECIAL_1 +Define this macro if the driver program should find the library +@file{libgcc.a}. If you do not define this macro, the driver program will pass +the argument @option{-lgcc} to tell the linker to do the search. +This macro is similar to @code{LINK_LIBGCC_SPECIAL}, except that it does +not affect @option{-L} options. + +@findex LINK_COMMAND_SPEC +@item LINK_COMMAND_SPEC +A C string constant giving the complete command line need to execute the +linker. When you do this, you will need to update your port each time a +change is made to the link command line within @file{gcc.c}. Therefore, +define this macro only if you need to completely redefine the command +line for invoking the linker and there is no other way to accomplish +the effect you need. + +@findex LINK_ELIMINATE_DUPLICATE_LDIRECTORIES +@item LINK_ELIMINATE_DUPLICATE_LDIRECTORIES +A nonzero value causes @command{collect2} to remove duplicate @option{-L@var{directory}} search +directories from linking commands. Do not give it a nonzero value if +removing duplicate search directories changes the linker's semantics. + +@findex MULTILIB_DEFAULTS +@item MULTILIB_DEFAULTS +Define this macro as a C expression for the initializer of an array of +string to tell the driver program which options are defaults for this +target and thus do not need to be handled specially when using +@code{MULTILIB_OPTIONS}. + +Do not define this macro if @code{MULTILIB_OPTIONS} is not defined in +the target makefile fragment or if none of the options listed in +@code{MULTILIB_OPTIONS} are set by default. +@xref{Target Fragment}. + +@findex RELATIVE_PREFIX_NOT_LINKDIR +@item RELATIVE_PREFIX_NOT_LINKDIR +Define this macro to tell @code{gcc} that it should only translate +a @option{-B} prefix into a @option{-L} linker option if the prefix +indicates an absolute file name. + +@findex STANDARD_EXEC_PREFIX +@item STANDARD_EXEC_PREFIX +Define this macro as a C string constant if you wish to override the +standard choice of @file{/usr/local/lib/gcc-lib/} as the default prefix to +try when searching for the executable files of the compiler. + +@findex MD_EXEC_PREFIX +@item MD_EXEC_PREFIX +If defined, this macro is an additional prefix to try after +@code{STANDARD_EXEC_PREFIX}. @code{MD_EXEC_PREFIX} is not searched +when the @option{-b} option is used, or the compiler is built as a cross +compiler. If you define @code{MD_EXEC_PREFIX}, then be sure to add it +to the list of directories used to find the assembler in @file{configure.in}. + +@findex STANDARD_STARTFILE_PREFIX +@item STANDARD_STARTFILE_PREFIX +Define this macro as a C string constant if you wish to override the +standard choice of @file{/usr/local/lib/} as the default prefix to +try when searching for startup files such as @file{crt0.o}. + +@findex MD_STARTFILE_PREFIX +@item MD_STARTFILE_PREFIX +If defined, this macro supplies an additional prefix to try after the +standard prefixes. @code{MD_EXEC_PREFIX} is not searched when the +@option{-b} option is used, or when the compiler is built as a cross +compiler. + +@findex MD_STARTFILE_PREFIX_1 +@item MD_STARTFILE_PREFIX_1 +If defined, this macro supplies yet another prefix to try after the +standard prefixes. It is not searched when the @option{-b} option is +used, or when the compiler is built as a cross compiler. + +@findex INIT_ENVIRONMENT +@item INIT_ENVIRONMENT +Define this macro as a C string constant if you wish to set environment +variables for programs called by the driver, such as the assembler and +loader. The driver passes the value of this macro to @code{putenv} to +initialize the necessary environment variables. + +@findex LOCAL_INCLUDE_DIR +@item LOCAL_INCLUDE_DIR +Define this macro as a C string constant if you wish to override the +standard choice of @file{/usr/local/include} as the default prefix to +try when searching for local header files. @code{LOCAL_INCLUDE_DIR} +comes before @code{SYSTEM_INCLUDE_DIR} in the search order. + +Cross compilers do not search either @file{/usr/local/include} or its +replacement. + +@findex MODIFY_TARGET_NAME +@item MODIFY_TARGET_NAME +Define this macro if you with to define command-line switches that modify the +default target name + +For each switch, you can include a string to be appended to the first +part of the configuration name or a string to be deleted from the +configuration name, if present. The definition should be an initializer +for an array of structures. Each array element should have three +elements: the switch name (a string constant, including the initial +dash), one of the enumeration codes @code{ADD} or @code{DELETE} to +indicate whether the string should be inserted or deleted, and the string +to be inserted or deleted (a string constant). + +For example, on a machine where @samp{64} at the end of the +configuration name denotes a 64-bit target and you want the @option{-32} +and @option{-64} switches to select between 32- and 64-bit targets, you would +code + +@smallexample +#define MODIFY_TARGET_NAME \ + @{ @{ "-32", DELETE, "64"@}, \ + @{"-64", ADD, "64"@}@} +@end smallexample + + +@findex SYSTEM_INCLUDE_DIR +@item SYSTEM_INCLUDE_DIR +Define this macro as a C string constant if you wish to specify a +system-specific directory to search for header files before the standard +directory. @code{SYSTEM_INCLUDE_DIR} comes before +@code{STANDARD_INCLUDE_DIR} in the search order. + +Cross compilers do not use this macro and do not search the directory +specified. + +@findex STANDARD_INCLUDE_DIR +@item STANDARD_INCLUDE_DIR +Define this macro as a C string constant if you wish to override the +standard choice of @file{/usr/include} as the default prefix to +try when searching for header files. + +Cross compilers do not use this macro and do not search either +@file{/usr/include} or its replacement. + +@findex STANDARD_INCLUDE_COMPONENT +@item STANDARD_INCLUDE_COMPONENT +The ``component'' corresponding to @code{STANDARD_INCLUDE_DIR}. +See @code{INCLUDE_DEFAULTS}, below, for the description of components. +If you do not define this macro, no component is used. + +@findex INCLUDE_DEFAULTS +@item INCLUDE_DEFAULTS +Define this macro if you wish to override the entire default search path +for include files. For a native compiler, the default search path +usually consists of @code{GCC_INCLUDE_DIR}, @code{LOCAL_INCLUDE_DIR}, +@code{SYSTEM_INCLUDE_DIR}, @code{GPLUSPLUS_INCLUDE_DIR}, and +@code{STANDARD_INCLUDE_DIR}. In addition, @code{GPLUSPLUS_INCLUDE_DIR} +and @code{GCC_INCLUDE_DIR} are defined automatically by @file{Makefile}, +and specify private search areas for GCC@. The directory +@code{GPLUSPLUS_INCLUDE_DIR} is used only for C++ programs. + +The definition should be an initializer for an array of structures. +Each array element should have four elements: the directory name (a +string constant), the component name (also a string constant), a flag +for C++-only directories, +and a flag showing that the includes in the directory don't need to be +wrapped in @code{extern @samp{C}} when compiling C++. Mark the end of +the array with a null element. + +The component name denotes what GNU package the include file is part of, +if any, in all upper-case letters. For example, it might be @samp{GCC} +or @samp{BINUTILS}. If the package is part of a vendor-supplied +operating system, code the component name as @samp{0}. + +For example, here is the definition used for VAX/VMS: + +@example +#define INCLUDE_DEFAULTS \ +@{ \ + @{ "GNU_GXX_INCLUDE:", "G++", 1, 1@}, \ + @{ "GNU_CC_INCLUDE:", "GCC", 0, 0@}, \ + @{ "SYS$SYSROOT:[SYSLIB.]", 0, 0, 0@}, \ + @{ ".", 0, 0, 0@}, \ + @{ 0, 0, 0, 0@} \ +@} +@end example +@end table + +Here is the order of prefixes tried for exec files: + +@enumerate +@item +Any prefixes specified by the user with @option{-B}. + +@item +The environment variable @code{GCC_EXEC_PREFIX}, if any. + +@item +The directories specified by the environment variable @code{COMPILER_PATH}. + +@item +The macro @code{STANDARD_EXEC_PREFIX}. + +@item +@file{/usr/lib/gcc/}. + +@item +The macro @code{MD_EXEC_PREFIX}, if any. +@end enumerate + +Here is the order of prefixes tried for startfiles: + +@enumerate +@item +Any prefixes specified by the user with @option{-B}. + +@item +The environment variable @code{GCC_EXEC_PREFIX}, if any. + +@item +The directories specified by the environment variable @code{LIBRARY_PATH} +(or port-specific name; native only, cross compilers do not use this). + +@item +The macro @code{STANDARD_EXEC_PREFIX}. + +@item +@file{/usr/lib/gcc/}. + +@item +The macro @code{MD_EXEC_PREFIX}, if any. + +@item +The macro @code{MD_STARTFILE_PREFIX}, if any. + +@item +The macro @code{STANDARD_STARTFILE_PREFIX}. + +@item +@file{/lib/}. + +@item +@file{/usr/lib/}. +@end enumerate + +@node Run-time Target +@section Run-time Target Specification +@cindex run-time target specification +@cindex predefined macros +@cindex target specifications + +@c prevent bad page break with this line +Here are run-time target specifications. + +@table @code +@findex CPP_PREDEFINES +@item CPP_PREDEFINES +Define this to be a string constant containing @option{-D} options to +define the predefined macros that identify this machine and system. +These macros will be predefined unless the @option{-ansi} option (or a +@option{-std} option for strict ISO C conformance) is specified. + +In addition, a parallel set of macros are predefined, whose names are +made by appending @samp{__} at the beginning and at the end. These +@samp{__} macros are permitted by the ISO standard, so they are +predefined regardless of whether @option{-ansi} or a @option{-std} option +is specified. + +For example, on the Sun, one can use the following value: + +@smallexample +"-Dmc68000 -Dsun -Dunix" +@end smallexample + +The result is to define the macros @code{__mc68000__}, @code{__sun__} +and @code{__unix__} unconditionally, and the macros @code{mc68000}, +@code{sun} and @code{unix} provided @option{-ansi} is not specified. + +@findex extern int target_flags +@item extern int target_flags; +This declaration should be present. + +@cindex optional hardware or system features +@cindex features, optional, in system conventions +@item TARGET_@dots{} +This series of macros is to allow compiler command arguments to +enable or disable the use of optional features of the target machine. +For example, one machine description serves both the 68000 and +the 68020; a command argument tells the compiler whether it should +use 68020-only instructions or not. This command argument works +by means of a macro @code{TARGET_68020} that tests a bit in +@code{target_flags}. + +Define a macro @code{TARGET_@var{featurename}} for each such option. +Its definition should test a bit in @code{target_flags}. It is +recommended that a helper macro @code{TARGET_MASK_@var{featurename}} +is defined for each bit-value to test, and used in +@code{TARGET_@var{featurename}} and @code{TARGET_SWITCHES}. For +example: + +@smallexample +#define TARGET_MASK_68020 1 +#define TARGET_68020 (target_flags & TARGET_MASK_68020) +@end smallexample + +One place where these macros are used is in the condition-expressions +of instruction patterns. Note how @code{TARGET_68020} appears +frequently in the 68000 machine description file, @file{m68k.md}. +Another place they are used is in the definitions of the other +macros in the @file{@var{machine}.h} file. + +@findex TARGET_SWITCHES +@item TARGET_SWITCHES +This macro defines names of command options to set and clear +bits in @code{target_flags}. Its definition is an initializer +with a subgrouping for each command option. + +Each subgrouping contains a string constant, that defines the option +name, a number, which contains the bits to set in +@code{target_flags}, and a second string which is the description +displayed by @option{--help}. If the number is negative then the bits specified +by the number are cleared instead of being set. If the description +string is present but empty, then no help information will be displayed +for that option, but it will not count as an undocumented option. The +actual option name is made by appending @samp{-m} to the specified name. +Non-empty description strings should be marked with @code{N_(@dots{})} for +@command{xgettext}. In addition to the description for @option{--help}, +more detailed documentation for each option should be added to +@file{invoke.texi}. + +One of the subgroupings should have a null string. The number in +this grouping is the default value for @code{target_flags}. Any +target options act starting with that value. + +Here is an example which defines @option{-m68000} and @option{-m68020} +with opposite meanings, and picks the latter as the default: + +@smallexample +#define TARGET_SWITCHES \ + @{ @{ "68020", TARGET_MASK_68020, "" @}, \ + @{ "68000", -TARGET_MASK_68020, \ + N_("Compile for the 68000") @}, \ + @{ "", TARGET_MASK_68020, "" @}@} +@end smallexample + +@findex TARGET_OPTIONS +@item TARGET_OPTIONS +This macro is similar to @code{TARGET_SWITCHES} but defines names of command +options that have values. Its definition is an initializer with a +subgrouping for each command option. + +Each subgrouping contains a string constant, that defines the fixed part +of the option name, the address of a variable, and a description string +(which should again be marked with @code{N_(@dots{})}). +The variable, type @code{char *}, is set to the variable part of the +given option if the fixed part matches. The actual option name is made +by appending @samp{-m} to the specified name. Again, each option should +also be documented in @file{invoke.texi}. + +Here is an example which defines @option{-mshort-data-@var{number}}. If the +given option is @option{-mshort-data-512}, the variable @code{m88k_short_data} +will be set to the string @code{"512"}. + +@smallexample +extern char *m88k_short_data; +#define TARGET_OPTIONS \ + @{ @{ "short-data-", &m88k_short_data, \ + N_("Specify the size of the short data section") @} @} +@end smallexample + +@findex TARGET_VERSION +@item TARGET_VERSION +This macro is a C statement to print on @code{stderr} a string +describing the particular machine description choice. Every machine +description should define @code{TARGET_VERSION}. For example: + +@smallexample +#ifdef MOTOROLA +#define TARGET_VERSION \ + fprintf (stderr, " (68k, Motorola syntax)"); +#else +#define TARGET_VERSION \ + fprintf (stderr, " (68k, MIT syntax)"); +#endif +@end smallexample + +@findex OVERRIDE_OPTIONS +@item OVERRIDE_OPTIONS +Sometimes certain combinations of command options do not make sense on +a particular target machine. You can define a macro +@code{OVERRIDE_OPTIONS} to take account of this. This macro, if +defined, is executed once just after all the command options have been +parsed. + +Don't use this macro to turn on various extra optimizations for +@option{-O}. That is what @code{OPTIMIZATION_OPTIONS} is for. + +@findex OPTIMIZATION_OPTIONS +@item OPTIMIZATION_OPTIONS (@var{level}, @var{size}) +Some machines may desire to change what optimizations are performed for +various optimization levels. This macro, if defined, is executed once +just after the optimization level is determined and before the remainder +of the command options have been parsed. Values set in this macro are +used as the default values for the other command line options. + +@var{level} is the optimization level specified; 2 if @option{-O2} is +specified, 1 if @option{-O} is specified, and 0 if neither is specified. + +@var{size} is nonzero if @option{-Os} is specified and zero otherwise. + +You should not use this macro to change options that are not +machine-specific. These should uniformly selected by the same +optimization level on all supported machines. Use this macro to enable +machine-specific optimizations. + +@strong{Do not examine @code{write_symbols} in +this macro!} The debugging options are not supposed to alter the +generated code. + +@findex CAN_DEBUG_WITHOUT_FP +@item CAN_DEBUG_WITHOUT_FP +Define this macro if debugging can be performed even without a frame +pointer. If this macro is defined, GCC will turn on the +@option{-fomit-frame-pointer} option whenever @option{-O} is specified. +@end table + +@node Per-Function Data +@section Defining data structures for per-function information. +@cindex per-function data +@cindex data structures + +If the target needs to store information on a per-function basis, GCC +provides a macro and a couple of variables to allow this. Note, just +using statics to store the information is a bad idea, since GCC supports +nested functions, so you can be halfway through encoding one function +when another one comes along. + +GCC defines a data structure called @code{struct function} which +contains all of the data specific to an individual function. This +structure contains a field called @code{machine} whose type is +@code{struct machine_function *}, which can be used by targets to point +to their own specific data. + +If a target needs per-function specific data it should define the type +@code{struct machine_function} and also the macro +@code{INIT_EXPANDERS}. This macro should be used to initialize some or +all of the function pointers @code{init_machine_status}, +@code{free_machine_status} and @code{mark_machine_status}. These +pointers are explained below. + +One typical use of per-function, target specific data is to create an +RTX to hold the register containing the function's return address. This +RTX can then be used to implement the @code{__builtin_return_address} +function, for level 0. + +Note---earlier implementations of GCC used a single data area to hold +all of the per-function information. Thus when processing of a nested +function began the old per-function data had to be pushed onto a +stack, and when the processing was finished, it had to be popped off the +stack. GCC used to provide function pointers called +@code{save_machine_status} and @code{restore_machine_status} to handle +the saving and restoring of the target specific information. Since the +single data area approach is no longer used, these pointers are no +longer supported. + +The macro and function pointers are described below. + +@table @code +@findex INIT_EXPANDERS +@item INIT_EXPANDERS +Macro called to initialize any target specific information. This macro +is called once per function, before generation of any RTL has begun. +The intention of this macro is to allow the initialization of the +function pointers below. + +@findex init_machine_status +@item init_machine_status +This is a @code{void (*)(struct function *)} function pointer. If this +pointer is non-@code{NULL} it will be called once per function, before function +compilation starts, in order to allow the target to perform any target +specific initialization of the @code{struct function} structure. It is +intended that this would be used to initialize the @code{machine} of +that structure. + +@findex free_machine_status +@item free_machine_status +This is a @code{void (*)(struct function *)} function pointer. If this +pointer is non-@code{NULL} it will be called once per function, after the +function has been compiled, in order to allow any memory allocated +during the @code{init_machine_status} function call to be freed. + +@findex mark_machine_status +@item mark_machine_status +This is a @code{void (*)(struct function *)} function pointer. If this +pointer is non-@code{NULL} it will be called once per function in order to mark +any data items in the @code{struct machine_function} structure which +need garbage collection. + +@end table + +@node Storage Layout +@section Storage Layout +@cindex storage layout + +Note that the definitions of the macros in this table which are sizes or +alignments measured in bits do not need to be constant. They can be C +expressions that refer to static variables, such as the @code{target_flags}. +@xref{Run-time Target}. + +@table @code +@findex BITS_BIG_ENDIAN +@item BITS_BIG_ENDIAN +Define this macro to have the value 1 if the most significant bit in a +byte has the lowest number; otherwise define it to have the value zero. +This means that bit-field instructions count from the most significant +bit. If the machine has no bit-field instructions, then this must still +be defined, but it doesn't matter which value it is defined to. This +macro need not be a constant. + +This macro does not affect the way structure fields are packed into +bytes or words; that is controlled by @code{BYTES_BIG_ENDIAN}. + +@findex BYTES_BIG_ENDIAN +@item BYTES_BIG_ENDIAN +Define this macro to have the value 1 if the most significant byte in a +word has the lowest number. This macro need not be a constant. + +@findex WORDS_BIG_ENDIAN +@item WORDS_BIG_ENDIAN +Define this macro to have the value 1 if, in a multiword object, the +most significant word has the lowest number. This applies to both +memory locations and registers; GCC fundamentally assumes that the +order of words in memory is the same as the order in registers. This +macro need not be a constant. + +@findex LIBGCC2_WORDS_BIG_ENDIAN +@item LIBGCC2_WORDS_BIG_ENDIAN +Define this macro if @code{WORDS_BIG_ENDIAN} is not constant. This must be a +constant value with the same meaning as @code{WORDS_BIG_ENDIAN}, which will be +used only when compiling @file{libgcc2.c}. Typically the value will be set +based on preprocessor defines. + +@findex FLOAT_WORDS_BIG_ENDIAN +@item FLOAT_WORDS_BIG_ENDIAN +Define this macro to have the value 1 if @code{DFmode}, @code{XFmode} or +@code{TFmode} floating point numbers are stored in memory with the word +containing the sign bit at the lowest address; otherwise define it to +have the value 0. This macro need not be a constant. + +You need not define this macro if the ordering is the same as for +multi-word integers. + +@findex BITS_PER_UNIT +@item BITS_PER_UNIT +Define this macro to be the number of bits in an addressable storage +unit (byte); normally 8. + +@findex BITS_PER_WORD +@item BITS_PER_WORD +Number of bits in a word; normally 32. + +@findex MAX_BITS_PER_WORD +@item MAX_BITS_PER_WORD +Maximum number of bits in a word. If this is undefined, the default is +@code{BITS_PER_WORD}. Otherwise, it is the constant value that is the +largest value that @code{BITS_PER_WORD} can have at run-time. + +@findex UNITS_PER_WORD +@item UNITS_PER_WORD +Number of storage units in a word; normally 4. + +@findex MIN_UNITS_PER_WORD +@item MIN_UNITS_PER_WORD +Minimum number of units in a word. If this is undefined, the default is +@code{UNITS_PER_WORD}. Otherwise, it is the constant value that is the +smallest value that @code{UNITS_PER_WORD} can have at run-time. + +@findex POINTER_SIZE +@item POINTER_SIZE +Width of a pointer, in bits. You must specify a value no wider than the +width of @code{Pmode}. If it is not equal to the width of @code{Pmode}, +you must define @code{POINTERS_EXTEND_UNSIGNED}. + +@findex POINTERS_EXTEND_UNSIGNED +@item POINTERS_EXTEND_UNSIGNED +A C expression whose value is greater than zero if pointers that need to be +extended from being @code{POINTER_SIZE} bits wide to @code{Pmode} are to +be zero-extended and zero if they are to be sign-extended. If the value +is less then zero then there must be an "ptr_extend" instruction that +extends a pointer from @code{POINTER_SIZE} to @code{Pmode}. + +You need not define this macro if the @code{POINTER_SIZE} is equal +to the width of @code{Pmode}. + +@findex PROMOTE_MODE +@item PROMOTE_MODE (@var{m}, @var{unsignedp}, @var{type}) +A macro to update @var{m} and @var{unsignedp} when an object whose type +is @var{type} and which has the specified mode and signedness is to be +stored in a register. This macro is only called when @var{type} is a +scalar type. + +On most RISC machines, which only have operations that operate on a full +register, define this macro to set @var{m} to @code{word_mode} if +@var{m} is an integer mode narrower than @code{BITS_PER_WORD}. In most +cases, only integer modes should be widened because wider-precision +floating-point operations are usually more expensive than their narrower +counterparts. + +For most machines, the macro definition does not change @var{unsignedp}. +However, some machines, have instructions that preferentially handle +either signed or unsigned quantities of certain modes. For example, on +the DEC Alpha, 32-bit loads from memory and 32-bit add instructions +sign-extend the result to 64 bits. On such machines, set +@var{unsignedp} according to which kind of extension is more efficient. + +Do not define this macro if it would never modify @var{m}. + +@findex PROMOTE_FUNCTION_ARGS +@item PROMOTE_FUNCTION_ARGS +Define this macro if the promotion described by @code{PROMOTE_MODE} +should also be done for outgoing function arguments. + +@findex PROMOTE_FUNCTION_RETURN +@item PROMOTE_FUNCTION_RETURN +Define this macro if the promotion described by @code{PROMOTE_MODE} +should also be done for the return value of functions. + +If this macro is defined, @code{FUNCTION_VALUE} must perform the same +promotions done by @code{PROMOTE_MODE}. + +@findex PROMOTE_FOR_CALL_ONLY +@item PROMOTE_FOR_CALL_ONLY +Define this macro if the promotion described by @code{PROMOTE_MODE} +should @emph{only} be performed for outgoing function arguments or +function return values, as specified by @code{PROMOTE_FUNCTION_ARGS} +and @code{PROMOTE_FUNCTION_RETURN}, respectively. + +@findex PARM_BOUNDARY +@item PARM_BOUNDARY +Normal alignment required for function parameters on the stack, in +bits. All stack parameters receive at least this much alignment +regardless of data type. On most machines, this is the same as the +size of an integer. + +@findex STACK_BOUNDARY +@item STACK_BOUNDARY +Define this macro to the minimum alignment enforced by hardware for the +stack pointer on this machine. The definition is a C expression for the +desired alignment (measured in bits). This value is used as a default +if @code{PREFERRED_STACK_BOUNDARY} is not defined. On most machines, +this should be the same as @code{PARM_BOUNDARY}. + +@findex PREFERRED_STACK_BOUNDARY +@item PREFERRED_STACK_BOUNDARY +Define this macro if you wish to preserve a certain alignment for the +stack pointer, greater than what the hardware enforces. The definition +is a C expression for the desired alignment (measured in bits). This +macro must evaluate to a value equal to or larger than +@code{STACK_BOUNDARY}. + +@findex FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN +@item FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN +A C expression that evaluates true if @code{PREFERRED_STACK_BOUNDARY} is +not guaranteed by the runtime and we should emit code to align the stack +at the beginning of @code{main}. + +@cindex @code{PUSH_ROUNDING}, interaction with @code{PREFERRED_STACK_BOUNDARY} +If @code{PUSH_ROUNDING} is not defined, the stack will always be aligned +to the specified boundary. If @code{PUSH_ROUNDING} is defined and specifies +a less strict alignment than @code{PREFERRED_STACK_BOUNDARY}, the stack may +be momentarily unaligned while pushing arguments. + +@findex FUNCTION_BOUNDARY +@item FUNCTION_BOUNDARY +Alignment required for a function entry point, in bits. + +@findex BIGGEST_ALIGNMENT +@item BIGGEST_ALIGNMENT +Biggest alignment that any data type can require on this machine, in bits. + +@findex MINIMUM_ATOMIC_ALIGNMENT +@item MINIMUM_ATOMIC_ALIGNMENT +If defined, the smallest alignment, in bits, that can be given to an +object that can be referenced in one operation, without disturbing any +nearby object. Normally, this is @code{BITS_PER_UNIT}, but may be larger +on machines that don't have byte or half-word store operations. + +@findex BIGGEST_FIELD_ALIGNMENT +@item BIGGEST_FIELD_ALIGNMENT +Biggest alignment that any structure or union field can require on this +machine, in bits. If defined, this overrides @code{BIGGEST_ALIGNMENT} for +structure and union fields only, unless the field alignment has been set +by the @code{__attribute__ ((aligned (@var{n})))} construct. + +@findex ADJUST_FIELD_ALIGN +@item ADJUST_FIELD_ALIGN (@var{field}, @var{computed}) +An expression for the alignment of a structure field @var{field} if the +alignment computed in the usual way is @var{computed}. GCC uses +this value instead of the value in @code{BIGGEST_ALIGNMENT} or +@code{BIGGEST_FIELD_ALIGNMENT}, if defined. + +@findex MAX_OFILE_ALIGNMENT +@item MAX_OFILE_ALIGNMENT +Biggest alignment supported by the object file format of this machine. +Use this macro to limit the alignment which can be specified using the +@code{__attribute__ ((aligned (@var{n})))} construct. If not defined, +the default value is @code{BIGGEST_ALIGNMENT}. + +@findex DATA_ALIGNMENT +@item DATA_ALIGNMENT (@var{type}, @var{basic-align}) +If defined, a C expression to compute the alignment for a variable in +the static store. @var{type} is the data type, and @var{basic-align} is +the alignment that the object would ordinarily have. The value of this +macro is used instead of that alignment to align the object. + +If this macro is not defined, then @var{basic-align} is used. + +@findex strcpy +One use of this macro is to increase alignment of medium-size data to +make it all fit in fewer cache lines. Another is to cause character +arrays to be word-aligned so that @code{strcpy} calls that copy +constants to character arrays can be done inline. + +@findex CONSTANT_ALIGNMENT +@item CONSTANT_ALIGNMENT (@var{constant}, @var{basic-align}) +If defined, a C expression to compute the alignment given to a constant +that is being placed in memory. @var{constant} is the constant and +@var{basic-align} is the alignment that the object would ordinarily +have. The value of this macro is used instead of that alignment to +align the object. + +If this macro is not defined, then @var{basic-align} is used. + +The typical use of this macro is to increase alignment for string +constants to be word aligned so that @code{strcpy} calls that copy +constants can be done inline. + +@findex LOCAL_ALIGNMENT +@item LOCAL_ALIGNMENT (@var{type}, @var{basic-align}) +If defined, a C expression to compute the alignment for a variable in +the local store. @var{type} is the data type, and @var{basic-align} is +the alignment that the object would ordinarily have. The value of this +macro is used instead of that alignment to align the object. + +If this macro is not defined, then @var{basic-align} is used. + +One use of this macro is to increase alignment of medium-size data to +make it all fit in fewer cache lines. + +@findex EMPTY_FIELD_BOUNDARY +@item EMPTY_FIELD_BOUNDARY +Alignment in bits to be given to a structure bit-field that follows an +empty field such as @code{int : 0;}. + +Note that @code{PCC_BITFIELD_TYPE_MATTERS} also affects the alignment +that results from an empty field. + +@findex STRUCTURE_SIZE_BOUNDARY +@item STRUCTURE_SIZE_BOUNDARY +Number of bits which any structure or union's size must be a multiple of. +Each structure or union's size is rounded up to a multiple of this. + +If you do not define this macro, the default is the same as +@code{BITS_PER_UNIT}. + +@findex STRICT_ALIGNMENT +@item STRICT_ALIGNMENT +Define this macro to be the value 1 if instructions will fail to work +if given data not on the nominal alignment. If instructions will merely +go slower in that case, define this macro as 0. + +@findex PCC_BITFIELD_TYPE_MATTERS +@item PCC_BITFIELD_TYPE_MATTERS +Define this if you wish to imitate the way many other C compilers handle +alignment of bit-fields and the structures that contain them. + +The behavior is that the type written for a bit-field (@code{int}, +@code{short}, or other integer type) imposes an alignment for the +entire structure, as if the structure really did contain an ordinary +field of that type. In addition, the bit-field is placed within the +structure so that it would fit within such a field, not crossing a +boundary for it. + +Thus, on most machines, a bit-field whose type is written as @code{int} +would not cross a four-byte boundary, and would force four-byte +alignment for the whole structure. (The alignment used may not be four +bytes; it is controlled by the other alignment parameters.) + +If the macro is defined, its definition should be a C expression; +a nonzero value for the expression enables this behavior. + +Note that if this macro is not defined, or its value is zero, some +bit-fields may cross more than one alignment boundary. The compiler can +support such references if there are @samp{insv}, @samp{extv}, and +@samp{extzv} insns that can directly reference memory. + +The other known way of making bit-fields work is to define +@code{STRUCTURE_SIZE_BOUNDARY} as large as @code{BIGGEST_ALIGNMENT}. +Then every structure can be accessed with fullwords. + +Unless the machine has bit-field instructions or you define +@code{STRUCTURE_SIZE_BOUNDARY} that way, you must define +@code{PCC_BITFIELD_TYPE_MATTERS} to have a nonzero value. + +If your aim is to make GCC use the same conventions for laying out +bit-fields as are used by another compiler, here is how to investigate +what the other compiler does. Compile and run this program: + +@example +struct foo1 +@{ + char x; + char :0; + char y; +@}; + +struct foo2 +@{ + char x; + int :0; + char y; +@}; + +main () +@{ + printf ("Size of foo1 is %d\n", + sizeof (struct foo1)); + printf ("Size of foo2 is %d\n", + sizeof (struct foo2)); + exit (0); +@} +@end example + +If this prints 2 and 5, then the compiler's behavior is what you would +get from @code{PCC_BITFIELD_TYPE_MATTERS}. + +@findex BITFIELD_NBYTES_LIMITED +@item BITFIELD_NBYTES_LIMITED +Like PCC_BITFIELD_TYPE_MATTERS except that its effect is limited to +aligning a bit-field within the structure. + +@findex MEMBER_TYPE_FORCES_BLK +@item MEMBER_TYPE_FORCES_BLK (@var{field}) +Return 1 if a structure or array containing @var{field} should be accessed using +@code{BLKMODE}. + +Normally, this is not needed. See the file @file{c4x.h} for an example +of how to use this macro to prevent a structure having a floating point +field from being accessed in an integer mode. + +@findex ROUND_TYPE_SIZE +@item ROUND_TYPE_SIZE (@var{type}, @var{computed}, @var{specified}) +Define this macro as an expression for the overall size of a type +(given by @var{type} as a tree node) when the size computed in the +usual way is @var{computed} and the alignment is @var{specified}. + +The default is to round @var{computed} up to a multiple of @var{specified}. + +@findex ROUND_TYPE_SIZE_UNIT +@item ROUND_TYPE_SIZE_UNIT (@var{type}, @var{computed}, @var{specified}) +Similar to @code{ROUND_TYPE_SIZE}, but sizes and alignments are +specified in units (bytes). If you define @code{ROUND_TYPE_SIZE}, +you must also define this macro and they must be defined consistently +with each other. + +@findex ROUND_TYPE_ALIGN +@item ROUND_TYPE_ALIGN (@var{type}, @var{computed}, @var{specified}) +Define this macro as an expression for the alignment of a type (given +by @var{type} as a tree node) if the alignment computed in the usual +way is @var{computed} and the alignment explicitly specified was +@var{specified}. + +The default is to use @var{specified} if it is larger; otherwise, use +the smaller of @var{computed} and @code{BIGGEST_ALIGNMENT} + +@findex MAX_FIXED_MODE_SIZE +@item MAX_FIXED_MODE_SIZE +An integer expression for the size in bits of the largest integer +machine mode that should actually be used. All integer machine modes of +this size or smaller can be used for structures and unions with the +appropriate sizes. If this macro is undefined, @code{GET_MODE_BITSIZE +(DImode)} is assumed. + +@findex VECTOR_MODE_SUPPORTED_P +@item VECTOR_MODE_SUPPORTED_P(@var{mode}) +Define this macro to be nonzero if the port is prepared to handle insns +involving vector mode @var{mode}. At the very least, it must have move +patterns for this mode. + +@findex STACK_SAVEAREA_MODE +@item STACK_SAVEAREA_MODE (@var{save_level}) +If defined, an expression of type @code{enum machine_mode} that +specifies the mode of the save area operand of a +@code{save_stack_@var{level}} named pattern (@pxref{Standard Names}). +@var{save_level} is one of @code{SAVE_BLOCK}, @code{SAVE_FUNCTION}, or +@code{SAVE_NONLOCAL} and selects which of the three named patterns is +having its mode specified. + +You need not define this macro if it always returns @code{Pmode}. You +would most commonly define this macro if the +@code{save_stack_@var{level}} patterns need to support both a 32- and a +64-bit mode. + +@findex STACK_SIZE_MODE +@item STACK_SIZE_MODE +If defined, an expression of type @code{enum machine_mode} that +specifies the mode of the size increment operand of an +@code{allocate_stack} named pattern (@pxref{Standard Names}). + +You need not define this macro if it always returns @code{word_mode}. +You would most commonly define this macro if the @code{allocate_stack} +pattern needs to support both a 32- and a 64-bit mode. + +@findex CHECK_FLOAT_VALUE +@item CHECK_FLOAT_VALUE (@var{mode}, @var{value}, @var{overflow}) +A C statement to validate the value @var{value} (of type +@code{double}) for mode @var{mode}. This means that you check whether +@var{value} fits within the possible range of values for mode +@var{mode} on this target machine. The mode @var{mode} is always +a mode of class @code{MODE_FLOAT}. @var{overflow} is nonzero if +the value is already known to be out of range. + +If @var{value} is not valid or if @var{overflow} is nonzero, you should +set @var{overflow} to 1 and then assign some valid value to @var{value}. +Allowing an invalid value to go through the compiler can produce +incorrect assembler code which may even cause Unix assemblers to crash. + +This macro need not be defined if there is no work for it to do. + +@findex TARGET_FLOAT_FORMAT +@item TARGET_FLOAT_FORMAT +A code distinguishing the floating point format of the target machine. +There are five defined values: + +@table @code +@findex IEEE_FLOAT_FORMAT +@item IEEE_FLOAT_FORMAT +This code indicates IEEE floating point. It is the default; there is no +need to define this macro when the format is IEEE@. + +@findex VAX_FLOAT_FORMAT +@item VAX_FLOAT_FORMAT +This code indicates the ``D float'' format used on the VAX@. + +@findex IBM_FLOAT_FORMAT +@item IBM_FLOAT_FORMAT +This code indicates the format used on the IBM System/370. + +@findex C4X_FLOAT_FORMAT +@item C4X_FLOAT_FORMAT +This code indicates the format used on the TMS320C3x/C4x. + +@findex UNKNOWN_FLOAT_FORMAT +@item UNKNOWN_FLOAT_FORMAT +This code indicates any other format. +@end table + +The value of this macro is compared with @code{HOST_FLOAT_FORMAT}, which +is defined by the @command{configure} script, to determine whether the +target machine has the same format as the host machine. If any other +formats are actually in use on supported machines, new codes should be +defined for them. + +The ordering of the component words of floating point values stored in +memory is controlled by @code{FLOAT_WORDS_BIG_ENDIAN}. + +@end table + +@node Type Layout +@section Layout of Source Language Data Types + +These macros define the sizes and other characteristics of the standard +basic data types used in programs being compiled. Unlike the macros in +the previous section, these apply to specific features of C and related +languages, rather than to fundamental aspects of storage layout. + +@table @code +@findex INT_TYPE_SIZE +@item INT_TYPE_SIZE +A C expression for the size in bits of the type @code{int} on the +target machine. If you don't define this, the default is one word. + +@findex SHORT_TYPE_SIZE +@item SHORT_TYPE_SIZE +A C expression for the size in bits of the type @code{short} on the +target machine. If you don't define this, the default is half a word. +(If this would be less than one storage unit, it is rounded up to one +unit.) + +@findex LONG_TYPE_SIZE +@item LONG_TYPE_SIZE +A C expression for the size in bits of the type @code{long} on the +target machine. If you don't define this, the default is one word. + +@findex ADA_LONG_TYPE_SIZE +@item ADA_LONG_TYPE_SIZE +On some machines, the size used for the Ada equivalent of the type +@code{long} by a native Ada compiler differs from that used by C. In +that situation, define this macro to be a C expression to be used for +the size of that type. If you don't define this, the default is the +value of @code{LONG_TYPE_SIZE}. + +@findex MAX_LONG_TYPE_SIZE +@item MAX_LONG_TYPE_SIZE +Maximum number for the size in bits of the type @code{long} on the +target machine. If this is undefined, the default is +@code{LONG_TYPE_SIZE}. Otherwise, it is the constant value that is the +largest value that @code{LONG_TYPE_SIZE} can have at run-time. This is +used in @code{cpp}. + +@findex LONG_LONG_TYPE_SIZE +@item LONG_LONG_TYPE_SIZE +A C expression for the size in bits of the type @code{long long} on the +target machine. If you don't define this, the default is two +words. If you want to support GNU Ada on your machine, the value of this +macro must be at least 64. + +@findex CHAR_TYPE_SIZE +@item CHAR_TYPE_SIZE +A C expression for the size in bits of the type @code{char} on the +target machine. If you don't define this, the default is +@code{BITS_PER_UNIT}. + +@findex MAX_CHAR_TYPE_SIZE +@item MAX_CHAR_TYPE_SIZE +Maximum number for the size in bits of the type @code{char} on the +target machine. If this is undefined, the default is +@code{CHAR_TYPE_SIZE}. Otherwise, it is the constant value that is the +largest value that @code{CHAR_TYPE_SIZE} can have at run-time. This is +used in @code{cpp}. + +@findex BOOL_TYPE_SIZE +@item BOOL_TYPE_SIZE +A C expression for the size in bits of the C++ type @code{bool} on the +target machine. If you don't define this, the default is +@code{CHAR_TYPE_SIZE}. + +@findex FLOAT_TYPE_SIZE +@item FLOAT_TYPE_SIZE +A C expression for the size in bits of the type @code{float} on the +target machine. If you don't define this, the default is one word. + +@findex DOUBLE_TYPE_SIZE +@item DOUBLE_TYPE_SIZE +A C expression for the size in bits of the type @code{double} on the +target machine. If you don't define this, the default is two +words. + +@findex LONG_DOUBLE_TYPE_SIZE +@item LONG_DOUBLE_TYPE_SIZE +A C expression for the size in bits of the type @code{long double} on +the target machine. If you don't define this, the default is two +words. + +@findex MAX_LONG_DOUBLE_TYPE_SIZE +Maximum number for the size in bits of the type @code{long double} on the +target machine. If this is undefined, the default is +@code{LONG_DOUBLE_TYPE_SIZE}. Otherwise, it is the constant value that is +the largest value that @code{LONG_DOUBLE_TYPE_SIZE} can have at run-time. +This is used in @code{cpp}. + +@findex INTEL_EXTENDED_IEEE_FORMAT +Define this macro to be 1 if the target machine uses 80-bit floating-point +values with 128-bit size and alignment. This is used in @file{real.c}. + +@findex WIDEST_HARDWARE_FP_SIZE +@item WIDEST_HARDWARE_FP_SIZE +A C expression for the size in bits of the widest floating-point format +supported by the hardware. If you define this macro, you must specify a +value less than or equal to the value of @code{LONG_DOUBLE_TYPE_SIZE}. +If you do not define this macro, the value of @code{LONG_DOUBLE_TYPE_SIZE} +is the default. + +@findex DEFAULT_SIGNED_CHAR +@item DEFAULT_SIGNED_CHAR +An expression whose value is 1 or 0, according to whether the type +@code{char} should be signed or unsigned by default. The user can +always override this default with the options @option{-fsigned-char} +and @option{-funsigned-char}. + +@findex DEFAULT_SHORT_ENUMS +@item DEFAULT_SHORT_ENUMS +A C expression to determine whether to give an @code{enum} type +only as many bytes as it takes to represent the range of possible values +of that type. A nonzero value means to do that; a zero value means all +@code{enum} types should be allocated like @code{int}. + +If you don't define the macro, the default is 0. + +@findex SIZE_TYPE +@item SIZE_TYPE +A C expression for a string describing the name of the data type to use +for size values. The typedef name @code{size_t} is defined using the +contents of the string. + +The string can contain more than one keyword. If so, separate them with +spaces, and write first any length keyword, then @code{unsigned} if +appropriate, and finally @code{int}. The string must exactly match one +of the data type names defined in the function +@code{init_decl_processing} in the file @file{c-decl.c}. You may not +omit @code{int} or change the order---that would cause the compiler to +crash on startup. + +If you don't define this macro, the default is @code{"long unsigned +int"}. + +@findex PTRDIFF_TYPE +@item PTRDIFF_TYPE +A C expression for a string describing the name of the data type to use +for the result of subtracting two pointers. The typedef name +@code{ptrdiff_t} is defined using the contents of the string. See +@code{SIZE_TYPE} above for more information. + +If you don't define this macro, the default is @code{"long int"}. + +@findex WCHAR_TYPE +@item WCHAR_TYPE +A C expression for a string describing the name of the data type to use +for wide characters. The typedef name @code{wchar_t} is defined using +the contents of the string. See @code{SIZE_TYPE} above for more +information. + +If you don't define this macro, the default is @code{"int"}. + +@findex WCHAR_TYPE_SIZE +@item WCHAR_TYPE_SIZE +A C expression for the size in bits of the data type for wide +characters. This is used in @code{cpp}, which cannot make use of +@code{WCHAR_TYPE}. + +@findex MAX_WCHAR_TYPE_SIZE +@item MAX_WCHAR_TYPE_SIZE +Maximum number for the size in bits of the data type for wide +characters. If this is undefined, the default is +@code{WCHAR_TYPE_SIZE}. Otherwise, it is the constant value that is the +largest value that @code{WCHAR_TYPE_SIZE} can have at run-time. This is +used in @code{cpp}. + +@findex GCOV_TYPE_SIZE +@item GCOV_TYPE_SIZE +A C expression for the size in bits of the type used for gcov counters on the +target machine. If you don't define this, the default is one +@code{LONG_TYPE_SIZE} in case it is greater or equal to 64-bit and +@code{LONG_LONG_TYPE_SIZE} otherwise. You may want to re-define the type to +ensure atomicity for counters in multithreaded programs. + +@findex WINT_TYPE +@item WINT_TYPE +A C expression for a string describing the name of the data type to +use for wide characters passed to @code{printf} and returned from +@code{getwc}. The typedef name @code{wint_t} is defined using the +contents of the string. See @code{SIZE_TYPE} above for more +information. + +If you don't define this macro, the default is @code{"unsigned int"}. + +@findex INTMAX_TYPE +@item INTMAX_TYPE +A C expression for a string describing the name of the data type that +can represent any value of any standard or extended signed integer type. +The typedef name @code{intmax_t} is defined using the contents of the +string. See @code{SIZE_TYPE} above for more information. + +If you don't define this macro, the default is the first of +@code{"int"}, @code{"long int"}, or @code{"long long int"} that has as +much precision as @code{long long int}. + +@findex UINTMAX_TYPE +@item UINTMAX_TYPE +A C expression for a string describing the name of the data type that +can represent any value of any standard or extended unsigned integer +type. The typedef name @code{uintmax_t} is defined using the contents +of the string. See @code{SIZE_TYPE} above for more information. + +If you don't define this macro, the default is the first of +@code{"unsigned int"}, @code{"long unsigned int"}, or @code{"long long +unsigned int"} that has as much precision as @code{long long unsigned +int}. + +@findex TARGET_PTRMEMFUNC_VBIT_LOCATION +@item TARGET_PTRMEMFUNC_VBIT_LOCATION +The C++ compiler represents a pointer-to-member-function with a struct +that looks like: + +@example + struct @{ + union @{ + void (*fn)(); + ptrdiff_t vtable_index; + @}; + ptrdiff_t delta; + @}; +@end example + +@noindent +The C++ compiler must use one bit to indicate whether the function that +will be called through a pointer-to-member-function is virtual. +Normally, we assume that the low-order bit of a function pointer must +always be zero. Then, by ensuring that the vtable_index is odd, we can +distinguish which variant of the union is in use. But, on some +platforms function pointers can be odd, and so this doesn't work. In +that case, we use the low-order bit of the @code{delta} field, and shift +the remainder of the @code{delta} field to the left. + +GCC will automatically make the right selection about where to store +this bit using the @code{FUNCTION_BOUNDARY} setting for your platform. +However, some platforms such as ARM/Thumb have @code{FUNCTION_BOUNDARY} +set such that functions always start at even addresses, but the lowest +bit of pointers to functions indicate whether the function at that +address is in ARM or Thumb mode. If this is the case of your +architecture, you should define this macro to +@code{ptrmemfunc_vbit_in_delta}. + +In general, you should not have to define this macro. On architectures +in which function addresses are always even, according to +@code{FUNCTION_BOUNDARY}, GCC will automatically define this macro to +@code{ptrmemfunc_vbit_in_pfn}. + +@findex TARGET_VTABLE_USES_DESCRIPTORS +@item TARGET_VTABLE_USES_DESCRIPTORS +Normally, the C++ compiler uses function pointers in vtables. This +macro allows the target to change to use ``function descriptors'' +instead. Function descriptors are found on targets for whom a +function pointer is actually a small data structure. Normally the +data structure consists of the actual code address plus a data +pointer to which the function's data is relative. + +If vtables are used, the value of this macro should be the number +of words that the function descriptor occupies. +@end table + +@node Escape Sequences +@section Target Character Escape Sequences +@cindex escape sequences + +By default, GCC assumes that the C character escape sequences take on +their ASCII values for the target. If this is not correct, you must +explicitly define all of the macros below. + +@table @code +@findex TARGET_BELL +@item TARGET_BELL +A C constant expression for the integer value for escape sequence +@samp{\a}. + +@findex TARGET_ESC +@item TARGET_ESC +A C constant expression for the integer value of the target escape +character. As an extension, GCC evaluates the escape sequences +@samp{\e} and @samp{\E} to this. + +@findex TARGET_TAB +@findex TARGET_BS +@findex TARGET_NEWLINE +@item TARGET_BS +@itemx TARGET_TAB +@itemx TARGET_NEWLINE +C constant expressions for the integer values for escape sequences +@samp{\b}, @samp{\t} and @samp{\n}. + +@findex TARGET_VT +@findex TARGET_FF +@findex TARGET_CR +@item TARGET_VT +@itemx TARGET_FF +@itemx TARGET_CR +C constant expressions for the integer values for escape sequences +@samp{\v}, @samp{\f} and @samp{\r}. +@end table + +@node Registers +@section Register Usage +@cindex register usage + +This section explains how to describe what registers the target machine +has, and how (in general) they can be used. + +The description of which registers a specific instruction can use is +done with register classes; see @ref{Register Classes}. For information +on using registers to access a stack frame, see @ref{Frame Registers}. +For passing values in registers, see @ref{Register Arguments}. +For returning values in registers, see @ref{Scalar Return}. + +@menu +* Register Basics:: Number and kinds of registers. +* Allocation Order:: Order in which registers are allocated. +* Values in Registers:: What kinds of values each reg can hold. +* Leaf Functions:: Renumbering registers for leaf functions. +* Stack Registers:: Handling a register stack such as 80387. +@end menu + +@node Register Basics +@subsection Basic Characteristics of Registers + +@c prevent bad page break with this line +Registers have various characteristics. + +@table @code +@findex FIRST_PSEUDO_REGISTER +@item FIRST_PSEUDO_REGISTER +Number of hardware registers known to the compiler. They receive +numbers 0 through @code{FIRST_PSEUDO_REGISTER-1}; thus, the first +pseudo register's number really is assigned the number +@code{FIRST_PSEUDO_REGISTER}. + +@item FIXED_REGISTERS +@findex FIXED_REGISTERS +@cindex fixed register +An initializer that says which registers are used for fixed purposes +all throughout the compiled code and are therefore not available for +general allocation. These would include the stack pointer, the frame +pointer (except on machines where that can be used as a general +register when no frame pointer is needed), the program counter on +machines where that is considered one of the addressable registers, +and any other numbered register with a standard use. + +This information is expressed as a sequence of numbers, separated by +commas and surrounded by braces. The @var{n}th number is 1 if +register @var{n} is fixed, 0 otherwise. + +The table initialized from this macro, and the table initialized by +the following one, may be overridden at run time either automatically, +by the actions of the macro @code{CONDITIONAL_REGISTER_USAGE}, or by +the user with the command options @option{-ffixed-@var{reg}}, +@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}}. + +@findex CALL_USED_REGISTERS +@item CALL_USED_REGISTERS +@cindex call-used register +@cindex call-clobbered register +@cindex call-saved register +Like @code{FIXED_REGISTERS} but has 1 for each register that is +clobbered (in general) by function calls as well as for fixed +registers. This macro therefore identifies the registers that are not +available for general allocation of values that must live across +function calls. + +If a register has 0 in @code{CALL_USED_REGISTERS}, the compiler +automatically saves it on function entry and restores it on function +exit, if the register is used within the function. + +@findex CALL_REALLY_USED_REGISTERS +@item CALL_REALLY_USED_REGISTERS +@cindex call-used register +@cindex call-clobbered register +@cindex call-saved register +Like @code{CALL_USED_REGISTERS} except this macro doesn't require +that the entire set of @code{FIXED_REGISTERS} be included. +(@code{CALL_USED_REGISTERS} must be a superset of @code{FIXED_REGISTERS}). +This macro is optional. If not specified, it defaults to the value +of @code{CALL_USED_REGISTERS}. + +@findex HARD_REGNO_CALL_PART_CLOBBERED +@item HARD_REGNO_CALL_PART_CLOBBERED (@var{regno}, @var{mode}) +@cindex call-used register +@cindex call-clobbered register +@cindex call-saved register +A C expression that is nonzero if it is not permissible to store a +value of mode @var{mode} in hard register number @var{regno} across a +call without some part of it being clobbered. For most machines this +macro need not be defined. It is only required for machines that do not +preserve the entire contents of a register across a call. + +@findex CONDITIONAL_REGISTER_USAGE +@findex fixed_regs +@findex call_used_regs +@item CONDITIONAL_REGISTER_USAGE +Zero or more C statements that may conditionally modify five variables +@code{fixed_regs}, @code{call_used_regs}, @code{global_regs}, +@code{reg_names}, and @code{reg_class_contents}, to take into account +any dependence of these register sets on target flags. The first three +of these are of type @code{char []} (interpreted as Boolean vectors). +@code{global_regs} is a @code{const char *[]}, and +@code{reg_class_contents} is a @code{HARD_REG_SET}. Before the macro is +called, @code{fixed_regs}, @code{call_used_regs}, +@code{reg_class_contents}, and @code{reg_names} have been initialized +from @code{FIXED_REGISTERS}, @code{CALL_USED_REGISTERS}, +@code{REG_CLASS_CONTENTS}, and @code{REGISTER_NAMES}, respectively. +@code{global_regs} has been cleared, and any @option{-ffixed-@var{reg}}, +@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}} +command options have been applied. + +You need not define this macro if it has no work to do. + +@cindex disabling certain registers +@cindex controlling register usage +If the usage of an entire class of registers depends on the target +flags, you may indicate this to GCC by using this macro to modify +@code{fixed_regs} and @code{call_used_regs} to 1 for each of the +registers in the classes which should not be used by GCC@. Also define +the macro @code{REG_CLASS_FROM_LETTER} to return @code{NO_REGS} if it +is called with a letter for a class that shouldn't be used. + +(However, if this class is not included in @code{GENERAL_REGS} and all +of the insn patterns whose constraints permit this class are +controlled by target switches, then GCC will automatically avoid using +these registers when the target switches are opposed to them.) + +@findex NON_SAVING_SETJMP +@item NON_SAVING_SETJMP +If this macro is defined and has a nonzero value, it means that +@code{setjmp} and related functions fail to save the registers, or that +@code{longjmp} fails to restore them. To compensate, the compiler +avoids putting variables in registers in functions that use +@code{setjmp}. + +@findex INCOMING_REGNO +@item INCOMING_REGNO (@var{out}) +Define this macro if the target machine has register windows. This C +expression returns the register number as seen by the called function +corresponding to the register number @var{out} as seen by the calling +function. Return @var{out} if register number @var{out} is not an +outbound register. + +@findex OUTGOING_REGNO +@item OUTGOING_REGNO (@var{in}) +Define this macro if the target machine has register windows. This C +expression returns the register number as seen by the calling function +corresponding to the register number @var{in} as seen by the called +function. Return @var{in} if register number @var{in} is not an inbound +register. + +@findex LOCAL_REGNO +@item LOCAL_REGNO (@var{regno}) +Define this macro if the target machine has register windows. This C +expression returns true if the register is call-saved but is in the +register window. Unlike most call-saved registers, such registers +need not be explicitly restored on function exit or during non-local +gotos. + +@ignore +@findex PC_REGNUM +@item PC_REGNUM +If the program counter has a register number, define this as that +register number. Otherwise, do not define it. +@end ignore +@end table + +@node Allocation Order +@subsection Order of Allocation of Registers +@cindex order of register allocation +@cindex register allocation order + +@c prevent bad page break with this line +Registers are allocated in order. + +@table @code +@findex REG_ALLOC_ORDER +@item REG_ALLOC_ORDER +If defined, an initializer for a vector of integers, containing the +numbers of hard registers in the order in which GCC should prefer +to use them (from most preferred to least). + +If this macro is not defined, registers are used lowest numbered first +(all else being equal). + +One use of this macro is on machines where the highest numbered +registers must always be saved and the save-multiple-registers +instruction supports only sequences of consecutive registers. On such +machines, define @code{REG_ALLOC_ORDER} to be an initializer that lists +the highest numbered allocable register first. + +@findex ORDER_REGS_FOR_LOCAL_ALLOC +@item ORDER_REGS_FOR_LOCAL_ALLOC +A C statement (sans semicolon) to choose the order in which to allocate +hard registers for pseudo-registers local to a basic block. + +Store the desired register order in the array @code{reg_alloc_order}. +Element 0 should be the register to allocate first; element 1, the next +register; and so on. + +The macro body should not assume anything about the contents of +@code{reg_alloc_order} before execution of the macro. + +On most machines, it is not necessary to define this macro. +@end table + +@node Values in Registers +@subsection How Values Fit in Registers + +This section discusses the macros that describe which kinds of values +(specifically, which machine modes) each register can hold, and how many +consecutive registers are needed for a given mode. + +@table @code +@findex HARD_REGNO_NREGS +@item HARD_REGNO_NREGS (@var{regno}, @var{mode}) +A C expression for the number of consecutive hard registers, starting +at register number @var{regno}, required to hold a value of mode +@var{mode}. + +On a machine where all registers are exactly one word, a suitable +definition of this macro is + +@smallexample +#define HARD_REGNO_NREGS(REGNO, MODE) \ + ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \ + / UNITS_PER_WORD) +@end smallexample + +@findex HARD_REGNO_MODE_OK +@item HARD_REGNO_MODE_OK (@var{regno}, @var{mode}) +A C expression that is nonzero if it is permissible to store a value +of mode @var{mode} in hard register number @var{regno} (or in several +registers starting with that one). For a machine where all registers +are equivalent, a suitable definition is + +@smallexample +#define HARD_REGNO_MODE_OK(REGNO, MODE) 1 +@end smallexample + +You need not include code to check for the numbers of fixed registers, +because the allocation mechanism considers them to be always occupied. + +@cindex register pairs +On some machines, double-precision values must be kept in even/odd +register pairs. You can implement that by defining this macro to reject +odd register numbers for such modes. + +The minimum requirement for a mode to be OK in a register is that the +@samp{mov@var{mode}} instruction pattern support moves between the +register and other hard register in the same class and that moving a +value into the register and back out not alter it. + +Since the same instruction used to move @code{word_mode} will work for +all narrower integer modes, it is not necessary on any machine for +@code{HARD_REGNO_MODE_OK} to distinguish between these modes, provided +you define patterns @samp{movhi}, etc., to take advantage of this. This +is useful because of the interaction between @code{HARD_REGNO_MODE_OK} +and @code{MODES_TIEABLE_P}; it is very desirable for all integer modes +to be tieable. + +Many machines have special registers for floating point arithmetic. +Often people assume that floating point machine modes are allowed only +in floating point registers. This is not true. Any registers that +can hold integers can safely @emph{hold} a floating point machine +mode, whether or not floating arithmetic can be done on it in those +registers. Integer move instructions can be used to move the values. + +On some machines, though, the converse is true: fixed-point machine +modes may not go in floating registers. This is true if the floating +registers normalize any value stored in them, because storing a +non-floating value there would garble it. In this case, +@code{HARD_REGNO_MODE_OK} should reject fixed-point machine modes in +floating registers. But if the floating registers do not automatically +normalize, if you can store any bit pattern in one and retrieve it +unchanged without a trap, then any machine mode may go in a floating +register, so you can define this macro to say so. + +The primary significance of special floating registers is rather that +they are the registers acceptable in floating point arithmetic +instructions. However, this is of no concern to +@code{HARD_REGNO_MODE_OK}. You handle it by writing the proper +constraints for those instructions. + +On some machines, the floating registers are especially slow to access, +so that it is better to store a value in a stack frame than in such a +register if floating point arithmetic is not being done. As long as the +floating registers are not in class @code{GENERAL_REGS}, they will not +be used unless some pattern's constraint asks for one. + +@findex MODES_TIEABLE_P +@item MODES_TIEABLE_P (@var{mode1}, @var{mode2}) +A C expression that is nonzero if a value of mode +@var{mode1} is accessible in mode @var{mode2} without copying. + +If @code{HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and +@code{HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are always the same for +any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1}, @var{mode2})} +should be nonzero. If they differ for any @var{r}, you should define +this macro to return zero unless some other mechanism ensures the +accessibility of the value in a narrower mode. + +You should define this macro to return nonzero in as many cases as +possible since doing so will allow GCC to perform better register +allocation. + +@findex AVOID_CCMODE_COPIES +@item AVOID_CCMODE_COPIES +Define this macro if the compiler should avoid copies to/from @code{CCmode} +registers. You should only define this macro if support for copying to/from +@code{CCmode} is incomplete. +@end table + +@node Leaf Functions +@subsection Handling Leaf Functions + +@cindex leaf functions +@cindex functions, leaf +On some machines, a leaf function (i.e., one which makes no calls) can run +more efficiently if it does not make its own register window. Often this +means it is required to receive its arguments in the registers where they +are passed by the caller, instead of the registers where they would +normally arrive. + +The special treatment for leaf functions generally applies only when +other conditions are met; for example, often they may use only those +registers for its own variables and temporaries. We use the term ``leaf +function'' to mean a function that is suitable for this special +handling, so that functions with no calls are not necessarily ``leaf +functions''. + +GCC assigns register numbers before it knows whether the function is +suitable for leaf function treatment. So it needs to renumber the +registers in order to output a leaf function. The following macros +accomplish this. + +@table @code +@findex LEAF_REGISTERS +@item LEAF_REGISTERS +Name of a char vector, indexed by hard register number, which +contains 1 for a register that is allowable in a candidate for leaf +function treatment. + +If leaf function treatment involves renumbering the registers, then the +registers marked here should be the ones before renumbering---those that +GCC would ordinarily allocate. The registers which will actually be +used in the assembler code, after renumbering, should not be marked with 1 +in this vector. + +Define this macro only if the target machine offers a way to optimize +the treatment of leaf functions. + +@findex LEAF_REG_REMAP +@item LEAF_REG_REMAP (@var{regno}) +A C expression whose value is the register number to which @var{regno} +should be renumbered, when a function is treated as a leaf function. + +If @var{regno} is a register number which should not appear in a leaf +function before renumbering, then the expression should yield @minus{}1, which +will cause the compiler to abort. + +Define this macro only if the target machine offers a way to optimize the +treatment of leaf functions, and registers need to be renumbered to do +this. +@end table + +@findex current_function_is_leaf +@findex current_function_uses_only_leaf_regs +@code{TARGET_ASM_FUNCTION_PROLOGUE} and +@code{TARGET_ASM_FUNCTION_EPILOGUE} must usually treat leaf functions +specially. They can test the C variable @code{current_function_is_leaf} +which is nonzero for leaf functions. @code{current_function_is_leaf} is +set prior to local register allocation and is valid for the remaining +compiler passes. They can also test the C variable +@code{current_function_uses_only_leaf_regs} which is nonzero for leaf +functions which only use leaf registers. +@code{current_function_uses_only_leaf_regs} is valid after reload and is +only useful if @code{LEAF_REGISTERS} is defined. +@c changed this to fix overfull. ALSO: why the "it" at the beginning +@c of the next paragraph?! --mew 2feb93 + +@node Stack Registers +@subsection Registers That Form a Stack + +There are special features to handle computers where some of the +``registers'' form a stack, as in the 80387 coprocessor for the 80386. +Stack registers are normally written by pushing onto the stack, and are +numbered relative to the top of the stack. + +Currently, GCC can only handle one group of stack-like registers, and +they must be consecutively numbered. + +@table @code +@findex STACK_REGS +@item STACK_REGS +Define this if the machine has any stack-like registers. + +@findex FIRST_STACK_REG +@item FIRST_STACK_REG +The number of the first stack-like register. This one is the top +of the stack. + +@findex LAST_STACK_REG +@item LAST_STACK_REG +The number of the last stack-like register. This one is the bottom of +the stack. +@end table + +@node Register Classes +@section Register Classes +@cindex register class definitions +@cindex class definitions, register + +On many machines, the numbered registers are not all equivalent. +For example, certain registers may not be allowed for indexed addressing; +certain registers may not be allowed in some instructions. These machine +restrictions are described to the compiler using @dfn{register classes}. + +You define a number of register classes, giving each one a name and saying +which of the registers belong to it. Then you can specify register classes +that are allowed as operands to particular instruction patterns. + +@findex ALL_REGS +@findex NO_REGS +In general, each register will belong to several classes. In fact, one +class must be named @code{ALL_REGS} and contain all the registers. Another +class must be named @code{NO_REGS} and contain no registers. Often the +union of two classes will be another class; however, this is not required. + +@findex GENERAL_REGS +One of the classes must be named @code{GENERAL_REGS}. There is nothing +terribly special about the name, but the operand constraint letters +@samp{r} and @samp{g} specify this class. If @code{GENERAL_REGS} is +the same as @code{ALL_REGS}, just define it as a macro which expands +to @code{ALL_REGS}. + +Order the classes so that if class @var{x} is contained in class @var{y} +then @var{x} has a lower class number than @var{y}. + +The way classes other than @code{GENERAL_REGS} are specified in operand +constraints is through machine-dependent operand constraint letters. +You can define such letters to correspond to various classes, then use +them in operand constraints. + +You should define a class for the union of two classes whenever some +instruction allows both classes. For example, if an instruction allows +either a floating point (coprocessor) register or a general register for a +certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS} +which includes both of them. Otherwise you will get suboptimal code. + +You must also specify certain redundant information about the register +classes: for each class, which classes contain it and which ones are +contained in it; for each pair of classes, the largest class contained +in their union. + +When a value occupying several consecutive registers is expected in a +certain class, all the registers used must belong to that class. +Therefore, register classes cannot be used to enforce a requirement for +a register pair to start with an even-numbered register. The way to +specify this requirement is with @code{HARD_REGNO_MODE_OK}. + +Register classes used for input-operands of bitwise-and or shift +instructions have a special requirement: each such class must have, for +each fixed-point machine mode, a subclass whose registers can transfer that +mode to or from memory. For example, on some machines, the operations for +single-byte values (@code{QImode}) are limited to certain registers. When +this is so, each register class that is used in a bitwise-and or shift +instruction must have a subclass consisting of registers from which +single-byte values can be loaded or stored. This is so that +@code{PREFERRED_RELOAD_CLASS} can always have a possible value to return. + +@table @code +@findex enum reg_class +@item enum reg_class +An enumeral type that must be defined with all the register class names +as enumeral values. @code{NO_REGS} must be first. @code{ALL_REGS} +must be the last register class, followed by one more enumeral value, +@code{LIM_REG_CLASSES}, which is not a register class but rather +tells how many classes there are. + +Each register class has a number, which is the value of casting +the class name to type @code{int}. The number serves as an index +in many of the tables described below. + +@findex N_REG_CLASSES +@item N_REG_CLASSES +The number of distinct register classes, defined as follows: + +@example +#define N_REG_CLASSES (int) LIM_REG_CLASSES +@end example + +@findex REG_CLASS_NAMES +@item REG_CLASS_NAMES +An initializer containing the names of the register classes as C string +constants. These names are used in writing some of the debugging dumps. + +@findex REG_CLASS_CONTENTS +@item REG_CLASS_CONTENTS +An initializer containing the contents of the register classes, as integers +which are bit masks. The @var{n}th integer specifies the contents of class +@var{n}. The way the integer @var{mask} is interpreted is that +register @var{r} is in the class if @code{@var{mask} & (1 << @var{r})} is 1. + +When the machine has more than 32 registers, an integer does not suffice. +Then the integers are replaced by sub-initializers, braced groupings containing +several integers. Each sub-initializer must be suitable as an initializer +for the type @code{HARD_REG_SET} which is defined in @file{hard-reg-set.h}. +In this situation, the first integer in each sub-initializer corresponds to +registers 0 through 31, the second integer to registers 32 through 63, and +so on. + +@findex REGNO_REG_CLASS +@item REGNO_REG_CLASS (@var{regno}) +A C expression whose value is a register class containing hard register +@var{regno}. In general there is more than one such class; choose a class +which is @dfn{minimal}, meaning that no smaller class also contains the +register. + +@findex BASE_REG_CLASS +@item BASE_REG_CLASS +A macro whose definition is the name of the class to which a valid +base register must belong. A base register is one used in an address +which is the register value plus a displacement. + +@findex MODE_BASE_REG_CLASS +@item MODE_BASE_REG_CLASS (@var{mode}) +This is a variation of the @code{BASE_REG_CLASS} macro which allows +the selection of a base register in a mode depenedent manner. If +@var{mode} is VOIDmode then it should return the same value as +@code{BASE_REG_CLASS}. + +@findex INDEX_REG_CLASS +@item INDEX_REG_CLASS +A macro whose definition is the name of the class to which a valid +index register must belong. An index register is one used in an +address where its value is either multiplied by a scale factor or +added to another register (as well as added to a displacement). + +@findex REG_CLASS_FROM_LETTER +@item REG_CLASS_FROM_LETTER (@var{char}) +A C expression which defines the machine-dependent operand constraint +letters for register classes. If @var{char} is such a letter, the +value should be the register class corresponding to it. Otherwise, +the value should be @code{NO_REGS}. The register letter @samp{r}, +corresponding to class @code{GENERAL_REGS}, will not be passed +to this macro; you do not need to handle it. + +@findex REGNO_OK_FOR_BASE_P +@item REGNO_OK_FOR_BASE_P (@var{num}) +A C expression which is nonzero if register number @var{num} is +suitable for use as a base register in operand addresses. It may be +either a suitable hard register or a pseudo register that has been +allocated such a hard register. + +@findex REGNO_MODE_OK_FOR_BASE_P +@item REGNO_MODE_OK_FOR_BASE_P (@var{num}, @var{mode}) +A C expression that is just like @code{REGNO_OK_FOR_BASE_P}, except that +that expression may examine the mode of the memory reference in +@var{mode}. You should define this macro if the mode of the memory +reference affects whether a register may be used as a base register. If +you define this macro, the compiler will use it instead of +@code{REGNO_OK_FOR_BASE_P}. + +@findex REGNO_OK_FOR_INDEX_P +@item REGNO_OK_FOR_INDEX_P (@var{num}) +A C expression which is nonzero if register number @var{num} is +suitable for use as an index register in operand addresses. It may be +either a suitable hard register or a pseudo register that has been +allocated such a hard register. + +The difference between an index register and a base register is that +the index register may be scaled. If an address involves the sum of +two registers, neither one of them scaled, then either one may be +labeled the ``base'' and the other the ``index''; but whichever +labeling is used must fit the machine's constraints of which registers +may serve in each capacity. The compiler will try both labelings, +looking for one that is valid, and will reload one or both registers +only if neither labeling works. + +@findex PREFERRED_RELOAD_CLASS +@item PREFERRED_RELOAD_CLASS (@var{x}, @var{class}) +A C expression that places additional restrictions on the register class +to use when it is necessary to copy value @var{x} into a register in class +@var{class}. The value is a register class; perhaps @var{class}, or perhaps +another, smaller class. On many machines, the following definition is +safe: + +@example +#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS +@end example + +Sometimes returning a more restrictive class makes better code. For +example, on the 68000, when @var{x} is an integer constant that is in range +for a @samp{moveq} instruction, the value of this macro is always +@code{DATA_REGS} as long as @var{class} includes the data registers. +Requiring a data register guarantees that a @samp{moveq} will be used. + +If @var{x} is a @code{const_double}, by returning @code{NO_REGS} +you can force @var{x} into a memory constant. This is useful on +certain machines where immediate floating values cannot be loaded into +certain kinds of registers. + +@findex PREFERRED_OUTPUT_RELOAD_CLASS +@item PREFERRED_OUTPUT_RELOAD_CLASS (@var{x}, @var{class}) +Like @code{PREFERRED_RELOAD_CLASS}, but for output reloads instead of +input reloads. If you don't define this macro, the default is to use +@var{class}, unchanged. + +@findex LIMIT_RELOAD_CLASS +@item LIMIT_RELOAD_CLASS (@var{mode}, @var{class}) +A C expression that places additional restrictions on the register class +to use when it is necessary to be able to hold a value of mode +@var{mode} in a reload register for which class @var{class} would +ordinarily be used. + +Unlike @code{PREFERRED_RELOAD_CLASS}, this macro should be used when +there are certain modes that simply can't go in certain reload classes. + +The value is a register class; perhaps @var{class}, or perhaps another, +smaller class. + +Don't define this macro unless the target machine has limitations which +require the macro to do something nontrivial. + +@findex SECONDARY_RELOAD_CLASS +@findex SECONDARY_INPUT_RELOAD_CLASS +@findex SECONDARY_OUTPUT_RELOAD_CLASS +@item SECONDARY_RELOAD_CLASS (@var{class}, @var{mode}, @var{x}) +@itemx SECONDARY_INPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x}) +@itemx SECONDARY_OUTPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x}) +Many machines have some registers that cannot be copied directly to or +from memory or even from other types of registers. An example is the +@samp{MQ} register, which on most machines, can only be copied to or +from general registers, but not memory. Some machines allow copying all +registers to and from memory, but require a scratch register for stores +to some memory locations (e.g., those with symbolic address on the RT, +and those with certain symbolic address on the Sparc when compiling +PIC)@. In some cases, both an intermediate and a scratch register are +required. + +You should define these macros to indicate to the reload phase that it may +need to allocate at least one register for a reload in addition to the +register to contain the data. Specifically, if copying @var{x} to a +register @var{class} in @var{mode} requires an intermediate register, +you should define @code{SECONDARY_INPUT_RELOAD_CLASS} to return the +largest register class all of whose registers can be used as +intermediate registers or scratch registers. + +If copying a register @var{class} in @var{mode} to @var{x} requires an +intermediate or scratch register, @code{SECONDARY_OUTPUT_RELOAD_CLASS} +should be defined to return the largest register class required. If the +requirements for input and output reloads are the same, the macro +@code{SECONDARY_RELOAD_CLASS} should be used instead of defining both +macros identically. + +The values returned by these macros are often @code{GENERAL_REGS}. +Return @code{NO_REGS} if no spare register is needed; i.e., if @var{x} +can be directly copied to or from a register of @var{class} in +@var{mode} without requiring a scratch register. Do not define this +macro if it would always return @code{NO_REGS}. + +If a scratch register is required (either with or without an +intermediate register), you should define patterns for +@samp{reload_in@var{m}} or @samp{reload_out@var{m}}, as required +(@pxref{Standard Names}. These patterns, which will normally be +implemented with a @code{define_expand}, should be similar to the +@samp{mov@var{m}} patterns, except that operand 2 is the scratch +register. + +Define constraints for the reload register and scratch register that +contain a single register class. If the original reload register (whose +class is @var{class}) can meet the constraint given in the pattern, the +value returned by these macros is used for the class of the scratch +register. Otherwise, two additional reload registers are required. +Their classes are obtained from the constraints in the insn pattern. + +@var{x} might be a pseudo-register or a @code{subreg} of a +pseudo-register, which could either be in a hard register or in memory. +Use @code{true_regnum} to find out; it will return @minus{}1 if the pseudo is +in memory and the hard register number if it is in a register. + +These macros should not be used in the case where a particular class of +registers can only be copied to memory and not to another class of +registers. In that case, secondary reload registers are not needed and +would not be helpful. Instead, a stack location must be used to perform +the copy and the @code{mov@var{m}} pattern should use memory as an +intermediate storage. This case often occurs between floating-point and +general registers. + +@findex SECONDARY_MEMORY_NEEDED +@item SECONDARY_MEMORY_NEEDED (@var{class1}, @var{class2}, @var{m}) +Certain machines have the property that some registers cannot be copied +to some other registers without using memory. Define this macro on +those machines to be a C expression that is nonzero if objects of mode +@var{m} in registers of @var{class1} can only be copied to registers of +class @var{class2} by storing a register of @var{class1} into memory +and loading that memory location into a register of @var{class2}. + +Do not define this macro if its value would always be zero. + +@findex SECONDARY_MEMORY_NEEDED_RTX +@item SECONDARY_MEMORY_NEEDED_RTX (@var{mode}) +Normally when @code{SECONDARY_MEMORY_NEEDED} is defined, the compiler +allocates a stack slot for a memory location needed for register copies. +If this macro is defined, the compiler instead uses the memory location +defined by this macro. + +Do not define this macro if you do not define +@code{SECONDARY_MEMORY_NEEDED}. + +@findex SECONDARY_MEMORY_NEEDED_MODE +@item SECONDARY_MEMORY_NEEDED_MODE (@var{mode}) +When the compiler needs a secondary memory location to copy between two +registers of mode @var{mode}, it normally allocates sufficient memory to +hold a quantity of @code{BITS_PER_WORD} bits and performs the store and +load operations in a mode that many bits wide and whose class is the +same as that of @var{mode}. + +This is right thing to do on most machines because it ensures that all +bits of the register are copied and prevents accesses to the registers +in a narrower mode, which some machines prohibit for floating-point +registers. + +However, this default behavior is not correct on some machines, such as +the DEC Alpha, that store short integers in floating-point registers +differently than in integer registers. On those machines, the default +widening will not work correctly and you must define this macro to +suppress that widening in some cases. See the file @file{alpha.h} for +details. + +Do not define this macro if you do not define +@code{SECONDARY_MEMORY_NEEDED} or if widening @var{mode} to a mode that +is @code{BITS_PER_WORD} bits wide is correct for your machine. + +@findex SMALL_REGISTER_CLASSES +@item SMALL_REGISTER_CLASSES +On some machines, it is risky to let hard registers live across arbitrary +insns. Typically, these machines have instructions that require values +to be in specific registers (like an accumulator), and reload will fail +if the required hard register is used for another purpose across such an +insn. + +Define @code{SMALL_REGISTER_CLASSES} to be an expression with a nonzero +value on these machines. When this macro has a nonzero value, the +compiler will try to minimize the lifetime of hard registers. + +It is always safe to define this macro with a nonzero value, but if you +unnecessarily define it, you will reduce the amount of optimizations +that can be performed in some cases. If you do not define this macro +with a nonzero value when it is required, the compiler will run out of +spill registers and print a fatal error message. For most machines, you +should not define this macro at all. + +@findex CLASS_LIKELY_SPILLED_P +@item CLASS_LIKELY_SPILLED_P (@var{class}) +A C expression whose value is nonzero if pseudos that have been assigned +to registers of class @var{class} would likely be spilled because +registers of @var{class} are needed for spill registers. + +The default value of this macro returns 1 if @var{class} has exactly one +register and zero otherwise. On most machines, this default should be +used. Only define this macro to some other expression if pseudos +allocated by @file{local-alloc.c} end up in memory because their hard +registers were needed for spill registers. If this macro returns nonzero +for those classes, those pseudos will only be allocated by +@file{global.c}, which knows how to reallocate the pseudo to another +register. If there would not be another register available for +reallocation, you should not change the definition of this macro since +the only effect of such a definition would be to slow down register +allocation. + +@findex CLASS_MAX_NREGS +@item CLASS_MAX_NREGS (@var{class}, @var{mode}) +A C expression for the maximum number of consecutive registers +of class @var{class} needed to hold a value of mode @var{mode}. + +This is closely related to the macro @code{HARD_REGNO_NREGS}. In fact, +the value of the macro @code{CLASS_MAX_NREGS (@var{class}, @var{mode})} +should be the maximum value of @code{HARD_REGNO_NREGS (@var{regno}, +@var{mode})} for all @var{regno} values in the class @var{class}. + +This macro helps control the handling of multiple-word values +in the reload pass. + +@item CLASS_CANNOT_CHANGE_MODE +If defined, a C expression for a class that contains registers for +which the compiler may not change modes arbitrarily. + +@item CLASS_CANNOT_CHANGE_MODE_P(@var{from}, @var{to}) +A C expression that is true if, for a register in +@code{CLASS_CANNOT_CHANGE_MODE}, the requested mode punning is invalid. + +For the example, loading 32-bit integer or floating-point objects into +floating-point registers on the Alpha extends them to 64-bits. +Therefore loading a 64-bit object and then storing it as a 32-bit object +does not store the low-order 32-bits, as would be the case for a normal +register. Therefore, @file{alpha.h} defines @code{CLASS_CANNOT_CHANGE_MODE} +as @code{FLOAT_REGS} and @code{CLASS_CANNOT_CHANGE_MODE_P} restricts +mode changes to same-size modes. + +Compare this to IA-64, which extends floating-point values to 82-bits, +and stores 64-bit integers in a different format than 64-bit doubles. +Therefore @code{CLASS_CANNOT_CHANGE_MODE_P} is always true. +@end table + +Three other special macros describe which operands fit which constraint +letters. + +@table @code +@findex CONST_OK_FOR_LETTER_P +@item CONST_OK_FOR_LETTER_P (@var{value}, @var{c}) +A C expression that defines the machine-dependent operand constraint +letters (@samp{I}, @samp{J}, @samp{K}, @dots{} @samp{P}) that specify +particular ranges of integer values. If @var{c} is one of those +letters, the expression should check that @var{value}, an integer, is in +the appropriate range and return 1 if so, 0 otherwise. If @var{c} is +not one of those letters, the value should be 0 regardless of +@var{value}. + +@findex CONST_DOUBLE_OK_FOR_LETTER_P +@item CONST_DOUBLE_OK_FOR_LETTER_P (@var{value}, @var{c}) +A C expression that defines the machine-dependent operand constraint +letters that specify particular ranges of @code{const_double} values +(@samp{G} or @samp{H}). + +If @var{c} is one of those letters, the expression should check that +@var{value}, an RTX of code @code{const_double}, is in the appropriate +range and return 1 if so, 0 otherwise. If @var{c} is not one of those +letters, the value should be 0 regardless of @var{value}. + +@code{const_double} is used for all floating-point constants and for +@code{DImode} fixed-point constants. A given letter can accept either +or both kinds of values. It can use @code{GET_MODE} to distinguish +between these kinds. + +@findex EXTRA_CONSTRAINT +@item EXTRA_CONSTRAINT (@var{value}, @var{c}) +A C expression that defines the optional machine-dependent constraint +letters that can be used to segregate specific types of operands, usually +memory references, for the target machine. Any letter that is not +elsewhere defined and not matched by @code{REG_CLASS_FROM_LETTER} +may be used. Normally this macro will not be defined. + +If it is required for a particular target machine, it should return 1 +if @var{value} corresponds to the operand type represented by the +constraint letter @var{c}. If @var{c} is not defined as an extra +constraint, the value returned should be 0 regardless of @var{value}. + +For example, on the ROMP, load instructions cannot have their output +in r0 if the memory reference contains a symbolic address. Constraint +letter @samp{Q} is defined as representing a memory address that does +@emph{not} contain a symbolic address. An alternative is specified with +a @samp{Q} constraint on the input and @samp{r} on the output. The next +alternative specifies @samp{m} on the input and a register class that +does not include r0 on the output. +@end table + +@node Stack and Calling +@section Stack Layout and Calling Conventions +@cindex calling conventions + +@c prevent bad page break with this line +This describes the stack layout and calling conventions. + +@menu +* Frame Layout:: +* Exception Handling:: +* Stack Checking:: +* Frame Registers:: +* Elimination:: +* Stack Arguments:: +* Register Arguments:: +* Scalar Return:: +* Aggregate Return:: +* Caller Saves:: +* Function Entry:: +* Profiling:: +* Tail Calls:: +@end menu + +@node Frame Layout +@subsection Basic Stack Layout +@cindex stack frame layout +@cindex frame layout + +@c prevent bad page break with this line +Here is the basic stack layout. + +@table @code +@findex STACK_GROWS_DOWNWARD +@item STACK_GROWS_DOWNWARD +Define this macro if pushing a word onto the stack moves the stack +pointer to a smaller address. + +When we say, ``define this macro if @dots{},'' it means that the +compiler checks this macro only with @code{#ifdef} so the precise +definition used does not matter. + +@findex STACK_PUSH_CODE +@item STACK_PUSH_CODE + +This macro defines the operation used when something is pushed +on the stack. In RTL, a push operation will be +@code{(set (mem (STACK_PUSH_CODE (reg sp))) ...)} + +The choices are @code{PRE_DEC}, @code{POST_DEC}, @code{PRE_INC}, +and @code{POST_INC}. Which of these is correct depends on +the stack direction and on whether the stack pointer points +to the last item on the stack or whether it points to the +space for the next item on the stack. + +The default is @code{PRE_DEC} when @code{STACK_GROWS_DOWNWARD} is +defined, which is almost always right, and @code{PRE_INC} otherwise, +which is often wrong. + +@findex FRAME_GROWS_DOWNWARD +@item FRAME_GROWS_DOWNWARD +Define this macro if the addresses of local variable slots are at negative +offsets from the frame pointer. + +@findex ARGS_GROW_DOWNWARD +@item ARGS_GROW_DOWNWARD +Define this macro if successive arguments to a function occupy decreasing +addresses on the stack. + +@findex STARTING_FRAME_OFFSET +@item STARTING_FRAME_OFFSET +Offset from the frame pointer to the first local variable slot to be allocated. + +If @code{FRAME_GROWS_DOWNWARD}, find the next slot's offset by +subtracting the first slot's length from @code{STARTING_FRAME_OFFSET}. +Otherwise, it is found by adding the length of the first slot to the +value @code{STARTING_FRAME_OFFSET}. +@c i'm not sure if the above is still correct.. had to change it to get +@c rid of an overfull. --mew 2feb93 + +@findex STACK_POINTER_OFFSET +@item STACK_POINTER_OFFSET +Offset from the stack pointer register to the first location at which +outgoing arguments are placed. If not specified, the default value of +zero is used. This is the proper value for most machines. + +If @code{ARGS_GROW_DOWNWARD}, this is the offset to the location above +the first location at which outgoing arguments are placed. + +@findex FIRST_PARM_OFFSET +@item FIRST_PARM_OFFSET (@var{fundecl}) +Offset from the argument pointer register to the first argument's +address. On some machines it may depend on the data type of the +function. + +If @code{ARGS_GROW_DOWNWARD}, this is the offset to the location above +the first argument's address. + +@findex STACK_DYNAMIC_OFFSET +@item STACK_DYNAMIC_OFFSET (@var{fundecl}) +Offset from the stack pointer register to an item dynamically allocated +on the stack, e.g., by @code{alloca}. + +The default value for this macro is @code{STACK_POINTER_OFFSET} plus the +length of the outgoing arguments. The default is correct for most +machines. See @file{function.c} for details. + +@findex DYNAMIC_CHAIN_ADDRESS +@item DYNAMIC_CHAIN_ADDRESS (@var{frameaddr}) +A C expression whose value is RTL representing the address in a stack +frame where the pointer to the caller's frame is stored. Assume that +@var{frameaddr} is an RTL expression for the address of the stack frame +itself. + +If you don't define this macro, the default is to return the value +of @var{frameaddr}---that is, the stack frame address is also the +address of the stack word that points to the previous frame. + +@findex SETUP_FRAME_ADDRESSES +@item SETUP_FRAME_ADDRESSES +If defined, a C expression that produces the machine-specific code to +setup the stack so that arbitrary frames can be accessed. For example, +on the Sparc, we must flush all of the register windows to the stack +before we can access arbitrary stack frames. You will seldom need to +define this macro. + +@findex BUILTIN_SETJMP_FRAME_VALUE +@item BUILTIN_SETJMP_FRAME_VALUE +If defined, a C expression that contains an rtx that is used to store +the address of the current frame into the built in @code{setjmp} buffer. +The default value, @code{virtual_stack_vars_rtx}, is correct for most +machines. One reason you may need to define this macro is if +@code{hard_frame_pointer_rtx} is the appropriate value on your machine. + +@findex RETURN_ADDR_RTX +@item RETURN_ADDR_RTX (@var{count}, @var{frameaddr}) +A C expression whose value is RTL representing the value of the return +address for the frame @var{count} steps up from the current frame, after +the prologue. @var{frameaddr} is the frame pointer of the @var{count} +frame, or the frame pointer of the @var{count} @minus{} 1 frame if +@code{RETURN_ADDR_IN_PREVIOUS_FRAME} is defined. + +The value of the expression must always be the correct address when +@var{count} is zero, but may be @code{NULL_RTX} if there is not way to +determine the return address of other frames. + +@findex RETURN_ADDR_IN_PREVIOUS_FRAME +@item RETURN_ADDR_IN_PREVIOUS_FRAME +Define this if the return address of a particular stack frame is accessed +from the frame pointer of the previous stack frame. + +@findex INCOMING_RETURN_ADDR_RTX +@item INCOMING_RETURN_ADDR_RTX +A C expression whose value is RTL representing the location of the +incoming return address at the beginning of any function, before the +prologue. This RTL is either a @code{REG}, indicating that the return +value is saved in @samp{REG}, or a @code{MEM} representing a location in +the stack. + +You only need to define this macro if you want to support call frame +debugging information like that provided by DWARF 2. + +If this RTL is a @code{REG}, you should also define +@code{DWARF_FRAME_RETURN_COLUMN} to @code{DWARF_FRAME_REGNUM (REGNO)}. + +@findex INCOMING_FRAME_SP_OFFSET +@item INCOMING_FRAME_SP_OFFSET +A C expression whose value is an integer giving the offset, in bytes, +from the value of the stack pointer register to the top of the stack +frame at the beginning of any function, before the prologue. The top of +the frame is defined to be the value of the stack pointer in the +previous frame, just before the call instruction. + +You only need to define this macro if you want to support call frame +debugging information like that provided by DWARF 2. + +@findex ARG_POINTER_CFA_OFFSET +@item ARG_POINTER_CFA_OFFSET (@var{fundecl}) +A C expression whose value is an integer giving the offset, in bytes, +from the argument pointer to the canonical frame address (cfa). The +final value should coincide with that calculated by +@code{INCOMING_FRAME_SP_OFFSET}. Which is unfortunately not usable +during virtual register instantiation. + +The default value for this macro is @code{FIRST_PARM_OFFSET (fundecl)}, +which is correct for most machines; in general, the arguments are found +immediately before the stack frame. Note that this is not the case on +some targets that save registers into the caller's frame, such as SPARC +and rs6000, and so such targets need to define this macro. + +You only need to define this macro if the default is incorrect, and you +want to support call frame debugging information like that provided by +DWARF 2. + +@findex SMALL_STACK +@item SMALL_STACK +Define this macro if the stack size for the target is very small. This +has the effect of disabling gcc's built-in @samp{alloca}, though +@samp{__builtin_alloca} is not affected. +@end table + +@node Exception Handling +@subsection Exception Handling Support +@cindex exception handling + +@table @code +@findex EH_RETURN_DATA_REGNO +@item EH_RETURN_DATA_REGNO (@var{N}) +A C expression whose value is the @var{N}th register number used for +data by exception handlers, or @code{INVALID_REGNUM} if fewer than +@var{N} registers are usable. + +The exception handling library routines communicate with the exception +handlers via a set of agreed upon registers. Ideally these registers +should be call-clobbered; it is possible to use call-saved registers, +but may negatively impact code size. The target must support at least +2 data registers, but should define 4 if there are enough free registers. + +You must define this macro if you want to support call frame exception +handling like that provided by DWARF 2. + +@findex EH_RETURN_STACKADJ_RTX +@item EH_RETURN_STACKADJ_RTX +A C expression whose value is RTL representing a location in which +to store a stack adjustment to be applied before function return. +This is used to unwind the stack to an exception handler's call frame. +It will be assigned zero on code paths that return normally. + +Typically this is a call-clobbered hard register that is otherwise +untouched by the epilogue, but could also be a stack slot. + +You must define this macro if you want to support call frame exception +handling like that provided by DWARF 2. + +@findex EH_RETURN_HANDLER_RTX +@item EH_RETURN_HANDLER_RTX +A C expression whose value is RTL representing a location in which +to store the address of an exception handler to which we should +return. It will not be assigned on code paths that return normally. + +Typically this is the location in the call frame at which the normal +return address is stored. For targets that return by popping an +address off the stack, this might be a memory address just below +the @emph{target} call frame rather than inside the current call +frame. @code{EH_RETURN_STACKADJ_RTX} will have already been assigned, +so it may be used to calculate the location of the target call frame. + +Some targets have more complex requirements than storing to an +address calculable during initial code generation. In that case +the @code{eh_return} instruction pattern should be used instead. + +If you want to support call frame exception handling, you must +define either this macro or the @code{eh_return} instruction pattern. + +@findex ASM_PREFERRED_EH_DATA_FORMAT +@item ASM_PREFERRED_EH_DATA_FORMAT(@var{code}, @var{global}) +This macro chooses the encoding of pointers embedded in the exception +handling sections. If at all possible, this should be defined such +that the exception handling section will not require dynamic relocations, +and so may be read-only. + +@var{code} is 0 for data, 1 for code labels, 2 for function pointers. +@var{global} is true if the symbol may be affected by dynamic relocations. +The macro should return a combination of the @code{DW_EH_PE_*} defines +as found in @file{dwarf2.h}. + +If this macro is not defined, pointers will not be encoded but +represented directly. + +@findex ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX +@item ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(@var{file}, @var{encoding}, @var{size}, @var{addr}, @var{done}) +This macro allows the target to emit whatever special magic is required +to represent the encoding chosen by @code{ASM_PREFERRED_EH_DATA_FORMAT}. +Generic code takes care of pc-relative and indirect encodings; this must +be defined if the target uses text-relative or data-relative encodings. + +This is a C statement that branches to @var{done} if the format was +handled. @var{encoding} is the format chosen, @var{size} is the number +of bytes that the format occupies, @var{addr} is the @code{SYMBOL_REF} +to be emitted. + +@findex MD_FALLBACK_FRAME_STATE_FOR +@item MD_FALLBACK_FRAME_STATE_FOR(@var{context}, @var{fs}, @var{success}) +This macro allows the target to add cpu and operating system specific +code to the call-frame unwinder for use when there is no unwind data +available. The most common reason to implement this macro is to unwind +through signal frames. + +This macro is called from @code{uw_frame_state_for} in @file{unwind-dw2.c} +and @file{unwind-ia64.c}. @var{context} is an @code{_Unwind_Context}; +@var{fs} is an @code{_Unwind_FrameState}. Examine @code{context->ra} +for the address of the code being executed and @code{context->cfa} for +the stack pointer value. If the frame can be decoded, the register save +addresses should be updated in @var{fs} and the macro should branch to +@var{success}. If the frame cannot be decoded, the macro should do +nothing. +@end table + +@node Stack Checking +@subsection Specifying How Stack Checking is Done + +GCC will check that stack references are within the boundaries of +the stack, if the @option{-fstack-check} is specified, in one of three ways: + +@enumerate +@item +If the value of the @code{STACK_CHECK_BUILTIN} macro is nonzero, GCC +will assume that you have arranged for stack checking to be done at +appropriate places in the configuration files, e.g., in +@code{TARGET_ASM_FUNCTION_PROLOGUE}. GCC will do not other special +processing. + +@item +If @code{STACK_CHECK_BUILTIN} is zero and you defined a named pattern +called @code{check_stack} in your @file{md} file, GCC will call that +pattern with one argument which is the address to compare the stack +value against. You must arrange for this pattern to report an error if +the stack pointer is out of range. + +@item +If neither of the above are true, GCC will generate code to periodically +``probe'' the stack pointer using the values of the macros defined below. +@end enumerate + +Normally, you will use the default values of these macros, so GCC +will use the third approach. + +@table @code +@findex STACK_CHECK_BUILTIN +@item STACK_CHECK_BUILTIN +A nonzero value if stack checking is done by the configuration files in a +machine-dependent manner. You should define this macro if stack checking +is require by the ABI of your machine or if you would like to have to stack +checking in some more efficient way than GCC's portable approach. +The default value of this macro is zero. + +@findex STACK_CHECK_PROBE_INTERVAL +@item STACK_CHECK_PROBE_INTERVAL +An integer representing the interval at which GCC must generate stack +probe instructions. You will normally define this macro to be no larger +than the size of the ``guard pages'' at the end of a stack area. The +default value of 4096 is suitable for most systems. + +@findex STACK_CHECK_PROBE_LOAD +@item STACK_CHECK_PROBE_LOAD +A integer which is nonzero if GCC should perform the stack probe +as a load instruction and zero if GCC should use a store instruction. +The default is zero, which is the most efficient choice on most systems. + +@findex STACK_CHECK_PROTECT +@item STACK_CHECK_PROTECT +The number of bytes of stack needed to recover from a stack overflow, +for languages where such a recovery is supported. The default value of +75 words should be adequate for most machines. + +@findex STACK_CHECK_MAX_FRAME_SIZE +@item STACK_CHECK_MAX_FRAME_SIZE +The maximum size of a stack frame, in bytes. GCC will generate probe +instructions in non-leaf functions to ensure at least this many bytes of +stack are available. If a stack frame is larger than this size, stack +checking will not be reliable and GCC will issue a warning. The +default is chosen so that GCC only generates one instruction on most +systems. You should normally not change the default value of this macro. + +@findex STACK_CHECK_FIXED_FRAME_SIZE +@item STACK_CHECK_FIXED_FRAME_SIZE +GCC uses this value to generate the above warning message. It +represents the amount of fixed frame used by a function, not including +space for any callee-saved registers, temporaries and user variables. +You need only specify an upper bound for this amount and will normally +use the default of four words. + +@findex STACK_CHECK_MAX_VAR_SIZE +@item STACK_CHECK_MAX_VAR_SIZE +The maximum size, in bytes, of an object that GCC will place in the +fixed area of the stack frame when the user specifies +@option{-fstack-check}. +GCC computed the default from the values of the above macros and you will +normally not need to override that default. +@end table + +@need 2000 +@node Frame Registers +@subsection Registers That Address the Stack Frame + +@c prevent bad page break with this line +This discusses registers that address the stack frame. + +@table @code +@findex STACK_POINTER_REGNUM +@item STACK_POINTER_REGNUM +The register number of the stack pointer register, which must also be a +fixed register according to @code{FIXED_REGISTERS}. On most machines, +the hardware determines which register this is. + +@findex FRAME_POINTER_REGNUM +@item FRAME_POINTER_REGNUM +The register number of the frame pointer register, which is used to +access automatic variables in the stack frame. On some machines, the +hardware determines which register this is. On other machines, you can +choose any register you wish for this purpose. + +@findex HARD_FRAME_POINTER_REGNUM +@item HARD_FRAME_POINTER_REGNUM +On some machines the offset between the frame pointer and starting +offset of the automatic variables is not known until after register +allocation has been done (for example, because the saved registers are +between these two locations). On those machines, define +@code{FRAME_POINTER_REGNUM} the number of a special, fixed register to +be used internally until the offset is known, and define +@code{HARD_FRAME_POINTER_REGNUM} to be the actual hard register number +used for the frame pointer. + +You should define this macro only in the very rare circumstances when it +is not possible to calculate the offset between the frame pointer and +the automatic variables until after register allocation has been +completed. When this macro is defined, you must also indicate in your +definition of @code{ELIMINABLE_REGS} how to eliminate +@code{FRAME_POINTER_REGNUM} into either @code{HARD_FRAME_POINTER_REGNUM} +or @code{STACK_POINTER_REGNUM}. + +Do not define this macro if it would be the same as +@code{FRAME_POINTER_REGNUM}. + +@findex ARG_POINTER_REGNUM +@item ARG_POINTER_REGNUM +The register number of the arg pointer register, which is used to access +the function's argument list. On some machines, this is the same as the +frame pointer register. On some machines, the hardware determines which +register this is. On other machines, you can choose any register you +wish for this purpose. If this is not the same register as the frame +pointer register, then you must mark it as a fixed register according to +@code{FIXED_REGISTERS}, or arrange to be able to eliminate it +(@pxref{Elimination}). + +@findex RETURN_ADDRESS_POINTER_REGNUM +@item RETURN_ADDRESS_POINTER_REGNUM +The register number of the return address pointer register, which is used to +access the current function's return address from the stack. On some +machines, the return address is not at a fixed offset from the frame +pointer or stack pointer or argument pointer. This register can be defined +to point to the return address on the stack, and then be converted by +@code{ELIMINABLE_REGS} into either the frame pointer or stack pointer. + +Do not define this macro unless there is no other way to get the return +address from the stack. + +@findex STATIC_CHAIN_REGNUM +@findex STATIC_CHAIN_INCOMING_REGNUM +@item STATIC_CHAIN_REGNUM +@itemx STATIC_CHAIN_INCOMING_REGNUM +Register numbers used for passing a function's static chain pointer. If +register windows are used, the register number as seen by the called +function is @code{STATIC_CHAIN_INCOMING_REGNUM}, while the register +number as seen by the calling function is @code{STATIC_CHAIN_REGNUM}. If +these registers are the same, @code{STATIC_CHAIN_INCOMING_REGNUM} need +not be defined. + +The static chain register need not be a fixed register. + +If the static chain is passed in memory, these macros should not be +defined; instead, the next two macros should be defined. + +@findex STATIC_CHAIN +@findex STATIC_CHAIN_INCOMING +@item STATIC_CHAIN +@itemx STATIC_CHAIN_INCOMING +If the static chain is passed in memory, these macros provide rtx giving +@code{mem} expressions that denote where they are stored. +@code{STATIC_CHAIN} and @code{STATIC_CHAIN_INCOMING} give the locations +as seen by the calling and called functions, respectively. Often the former +will be at an offset from the stack pointer and the latter at an offset from +the frame pointer. + +@findex stack_pointer_rtx +@findex frame_pointer_rtx +@findex arg_pointer_rtx +The variables @code{stack_pointer_rtx}, @code{frame_pointer_rtx}, and +@code{arg_pointer_rtx} will have been initialized prior to the use of these +macros and should be used to refer to those items. + +If the static chain is passed in a register, the two previous macros should +be defined instead. + +@findex DWARF_FRAME_REGISTERS +@item DWARF_FRAME_REGISTERS +This macro specifies the maximum number of hard registers that can be +saved in a call frame. This is used to size data structures used in +DWARF2 exception handling. + +Prior to GCC 3.0, this macro was needed in order to establish a stable +exception handling ABI in the face of adding new hard registers for ISA +extensions. In GCC 3.0 and later, the EH ABI is insulated from changes +in the number of hard registers. Nevertheless, this macro can still be +used to reduce the runtime memory requirements of the exception handling +routines, which can be substantial if the ISA contains a lot of +registers that are not call-saved. + +If this macro is not defined, it defaults to +@code{FIRST_PSEUDO_REGISTER}. + +@findex PRE_GCC3_DWARF_FRAME_REGISTERS +@item PRE_GCC3_DWARF_FRAME_REGISTERS + +This macro is similar to @code{DWARF_FRAME_REGISTERS}, but is provided +for backward compatibility in pre GCC 3.0 compiled code. + +If this macro is not defined, it defaults to +@code{DWARF_FRAME_REGISTERS}. + +@end table + +@node Elimination +@subsection Eliminating Frame Pointer and Arg Pointer + +@c prevent bad page break with this line +This is about eliminating the frame pointer and arg pointer. + +@table @code +@findex FRAME_POINTER_REQUIRED +@item FRAME_POINTER_REQUIRED +A C expression which is nonzero if a function must have and use a frame +pointer. This expression is evaluated in the reload pass. If its value is +nonzero the function will have a frame pointer. + +The expression can in principle examine the current function and decide +according to the facts, but on most machines the constant 0 or the +constant 1 suffices. Use 0 when the machine allows code to be generated +with no frame pointer, and doing so saves some time or space. Use 1 +when there is no possible advantage to avoiding a frame pointer. + +In certain cases, the compiler does not know how to produce valid code +without a frame pointer. The compiler recognizes those cases and +automatically gives the function a frame pointer regardless of what +@code{FRAME_POINTER_REQUIRED} says. You don't need to worry about +them. + +In a function that does not require a frame pointer, the frame pointer +register can be allocated for ordinary usage, unless you mark it as a +fixed register. See @code{FIXED_REGISTERS} for more information. + +@findex INITIAL_FRAME_POINTER_OFFSET +@findex get_frame_size +@item INITIAL_FRAME_POINTER_OFFSET (@var{depth-var}) +A C statement to store in the variable @var{depth-var} the difference +between the frame pointer and the stack pointer values immediately after +the function prologue. The value would be computed from information +such as the result of @code{get_frame_size ()} and the tables of +registers @code{regs_ever_live} and @code{call_used_regs}. + +If @code{ELIMINABLE_REGS} is defined, this macro will be not be used and +need not be defined. Otherwise, it must be defined even if +@code{FRAME_POINTER_REQUIRED} is defined to always be true; in that +case, you may set @var{depth-var} to anything. + +@findex ELIMINABLE_REGS +@item ELIMINABLE_REGS +If defined, this macro specifies a table of register pairs used to +eliminate unneeded registers that point into the stack frame. If it is not +defined, the only elimination attempted by the compiler is to replace +references to the frame pointer with references to the stack pointer. + +The definition of this macro is a list of structure initializations, each +of which specifies an original and replacement register. + +On some machines, the position of the argument pointer is not known until +the compilation is completed. In such a case, a separate hard register +must be used for the argument pointer. This register can be eliminated by +replacing it with either the frame pointer or the argument pointer, +depending on whether or not the frame pointer has been eliminated. + +In this case, you might specify: +@example +#define ELIMINABLE_REGS \ +@{@{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM@}, \ + @{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM@}, \ + @{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM@}@} +@end example + +Note that the elimination of the argument pointer with the stack pointer is +specified first since that is the preferred elimination. + +@findex CAN_ELIMINATE +@item CAN_ELIMINATE (@var{from-reg}, @var{to-reg}) +A C expression that returns nonzero if the compiler is allowed to try +to replace register number @var{from-reg} with register number +@var{to-reg}. This macro need only be defined if @code{ELIMINABLE_REGS} +is defined, and will usually be the constant 1, since most of the cases +preventing register elimination are things that the compiler already +knows about. + +@findex INITIAL_ELIMINATION_OFFSET +@item INITIAL_ELIMINATION_OFFSET (@var{from-reg}, @var{to-reg}, @var{offset-var}) +This macro is similar to @code{INITIAL_FRAME_POINTER_OFFSET}. It +specifies the initial difference between the specified pair of +registers. This macro must be defined if @code{ELIMINABLE_REGS} is +defined. +@end table + +@node Stack Arguments +@subsection Passing Function Arguments on the Stack +@cindex arguments on stack +@cindex stack arguments + +The macros in this section control how arguments are passed +on the stack. See the following section for other macros that +control passing certain arguments in registers. + +@table @code +@findex PROMOTE_PROTOTYPES +@item PROMOTE_PROTOTYPES +A C expression whose value is nonzero if an argument declared in +a prototype as an integral type smaller than @code{int} should +actually be passed as an @code{int}. In addition to avoiding +errors in certain cases of mismatch, it also makes for better +code on certain machines. If the macro is not defined in target +header files, it defaults to 0. + +@findex PUSH_ARGS +@item PUSH_ARGS +A C expression. If nonzero, push insns will be used to pass +outgoing arguments. +If the target machine does not have a push instruction, set it to zero. +That directs GCC to use an alternate strategy: to +allocate the entire argument block and then store the arguments into +it. When @code{PUSH_ARGS} is nonzero, @code{PUSH_ROUNDING} must be defined too. +On some machines, the definition + +@findex PUSH_ROUNDING +@item PUSH_ROUNDING (@var{npushed}) +A C expression that is the number of bytes actually pushed onto the +stack when an instruction attempts to push @var{npushed} bytes. + +On some machines, the definition + +@example +#define PUSH_ROUNDING(BYTES) (BYTES) +@end example + +@noindent +will suffice. But on other machines, instructions that appear +to push one byte actually push two bytes in an attempt to maintain +alignment. Then the definition should be + +@example +#define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1) +@end example + +@findex ACCUMULATE_OUTGOING_ARGS +@findex current_function_outgoing_args_size +@item ACCUMULATE_OUTGOING_ARGS +A C expression. If nonzero, the maximum amount of space required for outgoing arguments +will be computed and placed into the variable +@code{current_function_outgoing_args_size}. No space will be pushed +onto the stack for each call; instead, the function prologue should +increase the stack frame size by this amount. + +Setting both @code{PUSH_ARGS} and @code{ACCUMULATE_OUTGOING_ARGS} +is not proper. + +@findex REG_PARM_STACK_SPACE +@item REG_PARM_STACK_SPACE (@var{fndecl}) +Define this macro if functions should assume that stack space has been +allocated for arguments even when their values are passed in +registers. + +The value of this macro is the size, in bytes, of the area reserved for +arguments passed in registers for the function represented by @var{fndecl}, +which can be zero if GCC is calling a library function. + +This space can be allocated by the caller, or be a part of the +machine-dependent stack frame: @code{OUTGOING_REG_PARM_STACK_SPACE} says +which. +@c above is overfull. not sure what to do. --mew 5feb93 did +@c something, not sure if it looks good. --mew 10feb93 + +@findex MAYBE_REG_PARM_STACK_SPACE +@findex FINAL_REG_PARM_STACK_SPACE +@item MAYBE_REG_PARM_STACK_SPACE +@itemx FINAL_REG_PARM_STACK_SPACE (@var{const_size}, @var{var_size}) +Define these macros in addition to the one above if functions might +allocate stack space for arguments even when their values are passed +in registers. These should be used when the stack space allocated +for arguments in registers is not a simple constant independent of the +function declaration. + +The value of the first macro is the size, in bytes, of the area that +we should initially assume would be reserved for arguments passed in registers. + +The value of the second macro is the actual size, in bytes, of the area +that will be reserved for arguments passed in registers. This takes two +arguments: an integer representing the number of bytes of fixed sized +arguments on the stack, and a tree representing the number of bytes of +variable sized arguments on the stack. + +When these macros are defined, @code{REG_PARM_STACK_SPACE} will only be +called for libcall functions, the current function, or for a function +being called when it is known that such stack space must be allocated. +In each case this value can be easily computed. + +When deciding whether a called function needs such stack space, and how +much space to reserve, GCC uses these two macros instead of +@code{REG_PARM_STACK_SPACE}. + +@findex OUTGOING_REG_PARM_STACK_SPACE +@item OUTGOING_REG_PARM_STACK_SPACE +Define this if it is the responsibility of the caller to allocate the area +reserved for arguments passed in registers. + +If @code{ACCUMULATE_OUTGOING_ARGS} is defined, this macro controls +whether the space for these arguments counts in the value of +@code{current_function_outgoing_args_size}. + +@findex STACK_PARMS_IN_REG_PARM_AREA +@item STACK_PARMS_IN_REG_PARM_AREA +Define this macro if @code{REG_PARM_STACK_SPACE} is defined, but the +stack parameters don't skip the area specified by it. +@c i changed this, makes more sens and it should have taken care of the +@c overfull.. not as specific, tho. --mew 5feb93 + +Normally, when a parameter is not passed in registers, it is placed on the +stack beyond the @code{REG_PARM_STACK_SPACE} area. Defining this macro +suppresses this behavior and causes the parameter to be passed on the +stack in its natural location. + +@findex RETURN_POPS_ARGS +@item RETURN_POPS_ARGS (@var{fundecl}, @var{funtype}, @var{stack-size}) +A C expression that should indicate the number of bytes of its own +arguments that a function pops on returning, or 0 if the +function pops no arguments and the caller must therefore pop them all +after the function returns. + +@var{fundecl} is a C variable whose value is a tree node that describes +the function in question. Normally it is a node of type +@code{FUNCTION_DECL} that describes the declaration of the function. +From this you can obtain the @code{DECL_ATTRIBUTES} of the function. + +@var{funtype} is a C variable whose value is a tree node that +describes the function in question. Normally it is a node of type +@code{FUNCTION_TYPE} that describes the data type of the function. +From this it is possible to obtain the data types of the value and +arguments (if known). + +When a call to a library function is being considered, @var{fundecl} +will contain an identifier node for the library function. Thus, if +you need to distinguish among various library functions, you can do so +by their names. Note that ``library function'' in this context means +a function used to perform arithmetic, whose name is known specially +in the compiler and was not mentioned in the C code being compiled. + +@var{stack-size} is the number of bytes of arguments passed on the +stack. If a variable number of bytes is passed, it is zero, and +argument popping will always be the responsibility of the calling function. + +On the VAX, all functions always pop their arguments, so the definition +of this macro is @var{stack-size}. On the 68000, using the standard +calling convention, no functions pop their arguments, so the value of +the macro is always 0 in this case. But an alternative calling +convention is available in which functions that take a fixed number of +arguments pop them but other functions (such as @code{printf}) pop +nothing (the caller pops all). When this convention is in use, +@var{funtype} is examined to determine whether a function takes a fixed +number of arguments. +@end table + +@node Register Arguments +@subsection Passing Arguments in Registers +@cindex arguments in registers +@cindex registers arguments + +This section describes the macros which let you control how various +types of arguments are passed in registers or how they are arranged in +the stack. + +@table @code +@findex FUNCTION_ARG +@item FUNCTION_ARG (@var{cum}, @var{mode}, @var{type}, @var{named}) +A C expression that controls whether a function argument is passed +in a register, and which register. + +The arguments are @var{cum}, which summarizes all the previous +arguments; @var{mode}, the machine mode of the argument; @var{type}, +the data type of the argument as a tree node or 0 if that is not known +(which happens for C support library functions); and @var{named}, +which is 1 for an ordinary argument and 0 for nameless arguments that +correspond to @samp{@dots{}} in the called function's prototype. +@var{type} can be an incomplete type if a syntax error has previously +occurred. + +The value of the expression is usually either a @code{reg} RTX for the +hard register in which to pass the argument, or zero to pass the +argument on the stack. + +For machines like the VAX and 68000, where normally all arguments are +pushed, zero suffices as a definition. + +The value of the expression can also be a @code{parallel} RTX@. This is +used when an argument is passed in multiple locations. The mode of the +of the @code{parallel} should be the mode of the entire argument. The +@code{parallel} holds any number of @code{expr_list} pairs; each one +describes where part of the argument is passed. In each +@code{expr_list} the first operand must be a @code{reg} RTX for the hard +register in which to pass this part of the argument, and the mode of the +register RTX indicates how large this part of the argument is. The +second operand of the @code{expr_list} is a @code{const_int} which gives +the offset in bytes into the entire argument of where this part starts. +As a special exception the first @code{expr_list} in the @code{parallel} +RTX may have a first operand of zero. This indicates that the entire +argument is also stored on the stack. + +The last time this macro is called, it is called with @code{MODE == +VOIDmode}, and its result is passed to the @code{call} or @code{call_value} +pattern as operands 2 and 3 respectively. + +@cindex @file{stdarg.h} and register arguments +The usual way to make the ISO library @file{stdarg.h} work on a machine +where some arguments are usually passed in registers, is to cause +nameless arguments to be passed on the stack instead. This is done +by making @code{FUNCTION_ARG} return 0 whenever @var{named} is 0. + +@cindex @code{MUST_PASS_IN_STACK}, and @code{FUNCTION_ARG} +@cindex @code{REG_PARM_STACK_SPACE}, and @code{FUNCTION_ARG} +You may use the macro @code{MUST_PASS_IN_STACK (@var{mode}, @var{type})} +in the definition of this macro to determine if this argument is of a +type that must be passed in the stack. If @code{REG_PARM_STACK_SPACE} +is not defined and @code{FUNCTION_ARG} returns nonzero for such an +argument, the compiler will abort. If @code{REG_PARM_STACK_SPACE} is +defined, the argument will be computed in the stack and then loaded into +a register. + +@findex MUST_PASS_IN_STACK +@item MUST_PASS_IN_STACK (@var{mode}, @var{type}) +Define as a C expression that evaluates to nonzero if we do not know how +to pass TYPE solely in registers. The file @file{expr.h} defines a +definition that is usually appropriate, refer to @file{expr.h} for additional +documentation. + +@findex FUNCTION_INCOMING_ARG +@item FUNCTION_INCOMING_ARG (@var{cum}, @var{mode}, @var{type}, @var{named}) +Define this macro if the target machine has ``register windows'', so +that the register in which a function sees an arguments is not +necessarily the same as the one in which the caller passed the +argument. + +For such machines, @code{FUNCTION_ARG} computes the register in which +the caller passes the value, and @code{FUNCTION_INCOMING_ARG} should +be defined in a similar fashion to tell the function being called +where the arguments will arrive. + +If @code{FUNCTION_INCOMING_ARG} is not defined, @code{FUNCTION_ARG} +serves both purposes. + +@findex FUNCTION_ARG_PARTIAL_NREGS +@item FUNCTION_ARG_PARTIAL_NREGS (@var{cum}, @var{mode}, @var{type}, @var{named}) +A C expression for the number of words, at the beginning of an +argument, that must be put in registers. The value must be zero for +arguments that are passed entirely in registers or that are entirely +pushed on the stack. + +On some machines, certain arguments must be passed partially in +registers and partially in memory. On these machines, typically the +first @var{n} words of arguments are passed in registers, and the rest +on the stack. If a multi-word argument (a @code{double} or a +structure) crosses that boundary, its first few words must be passed +in registers and the rest must be pushed. This macro tells the +compiler when this occurs, and how many of the words should go in +registers. + +@code{FUNCTION_ARG} for these arguments should return the first +register to be used by the caller for this argument; likewise +@code{FUNCTION_INCOMING_ARG}, for the called function. + +@findex FUNCTION_ARG_PASS_BY_REFERENCE +@item FUNCTION_ARG_PASS_BY_REFERENCE (@var{cum}, @var{mode}, @var{type}, @var{named}) +A C expression that indicates when an argument must be passed by reference. +If nonzero for an argument, a copy of that argument is made in memory and a +pointer to the argument is passed instead of the argument itself. +The pointer is passed in whatever way is appropriate for passing a pointer +to that type. + +On machines where @code{REG_PARM_STACK_SPACE} is not defined, a suitable +definition of this macro might be +@smallexample +#define FUNCTION_ARG_PASS_BY_REFERENCE\ +(CUM, MODE, TYPE, NAMED) \ + MUST_PASS_IN_STACK (MODE, TYPE) +@end smallexample +@c this is *still* too long. --mew 5feb93 + +@findex FUNCTION_ARG_CALLEE_COPIES +@item FUNCTION_ARG_CALLEE_COPIES (@var{cum}, @var{mode}, @var{type}, @var{named}) +If defined, a C expression that indicates when it is the called function's +responsibility to make a copy of arguments passed by invisible reference. +Normally, the caller makes a copy and passes the address of the copy to the +routine being called. When @code{FUNCTION_ARG_CALLEE_COPIES} is defined and is +nonzero, the caller does not make a copy. Instead, it passes a pointer to the +``live'' value. The called function must not modify this value. If it can be +determined that the value won't be modified, it need not make a copy; +otherwise a copy must be made. + +@findex FUNCTION_ARG_REG_LITTLE_ENDIAN +@item FUNCTION_ARG_REG_LITTLE_ENDIAN +If defined TRUE on a big-endian system then structure arguments passed +(and returned) in registers are passed in a little-endian manner instead of +the big-endian manner. On the HP-UX IA64 and PA64 platforms structures are +aligned differently then integral values and setting this value to true will +allow for the special handling of structure arguments and return values. + +@findex CUMULATIVE_ARGS +@item CUMULATIVE_ARGS +A C type for declaring a variable that is used as the first argument of +@code{FUNCTION_ARG} and other related values. For some target machines, +the type @code{int} suffices and can hold the number of bytes of +argument so far. + +There is no need to record in @code{CUMULATIVE_ARGS} anything about the +arguments that have been passed on the stack. The compiler has other +variables to keep track of that. For target machines on which all +arguments are passed on the stack, there is no need to store anything in +@code{CUMULATIVE_ARGS}; however, the data structure must exist and +should not be empty, so use @code{int}. + +@findex INIT_CUMULATIVE_ARGS +@item INIT_CUMULATIVE_ARGS (@var{cum}, @var{fntype}, @var{libname}, @var{indirect}) +A C statement (sans semicolon) for initializing the variable @var{cum} +for the state at the beginning of the argument list. The variable has +type @code{CUMULATIVE_ARGS}. The value of @var{fntype} is the tree node +for the data type of the function which will receive the args, or 0 +if the args are to a compiler support library function. The value of +@var{indirect} is nonzero when processing an indirect call, for example +a call through a function pointer. The value of @var{indirect} is zero +for a call to an explicitly named function, a library function call, or when +@code{INIT_CUMULATIVE_ARGS} is used to find arguments for the function +being compiled. + +When processing a call to a compiler support library function, +@var{libname} identifies which one. It is a @code{symbol_ref} rtx which +contains the name of the function, as a string. @var{libname} is 0 when +an ordinary C function call is being processed. Thus, each time this +macro is called, either @var{libname} or @var{fntype} is nonzero, but +never both of them at once. + +@findex INIT_CUMULATIVE_LIBCALL_ARGS +@item INIT_CUMULATIVE_LIBCALL_ARGS (@var{cum}, @var{mode}, @var{libname}) +Like @code{INIT_CUMULATIVE_ARGS} but only used for outgoing libcalls, +it gets a @code{MODE} argument instead of @var{fntype}, that would be +@code{NULL}. @var{indirect} would always be zero, too. If this macro +is not defined, @code{INIT_CUMULATIVE_ARGS (cum, NULL_RTX, libname, +0)} is used instead. + +@findex INIT_CUMULATIVE_INCOMING_ARGS +@item INIT_CUMULATIVE_INCOMING_ARGS (@var{cum}, @var{fntype}, @var{libname}) +Like @code{INIT_CUMULATIVE_ARGS} but overrides it for the purposes of +finding the arguments for the function being compiled. If this macro is +undefined, @code{INIT_CUMULATIVE_ARGS} is used instead. + +The value passed for @var{libname} is always 0, since library routines +with special calling conventions are never compiled with GCC@. The +argument @var{libname} exists for symmetry with +@code{INIT_CUMULATIVE_ARGS}. +@c could use "this macro" in place of @code{INIT_CUMULATIVE_ARGS}, maybe. +@c --mew 5feb93 i switched the order of the sentences. --mew 10feb93 + +@findex FUNCTION_ARG_ADVANCE +@item FUNCTION_ARG_ADVANCE (@var{cum}, @var{mode}, @var{type}, @var{named}) +A C statement (sans semicolon) to update the summarizer variable +@var{cum} to advance past an argument in the argument list. The +values @var{mode}, @var{type} and @var{named} describe that argument. +Once this is done, the variable @var{cum} is suitable for analyzing +the @emph{following} argument with @code{FUNCTION_ARG}, etc. + +This macro need not do anything if the argument in question was passed +on the stack. The compiler knows how to track the amount of stack space +used for arguments without any special help. + +@findex FUNCTION_ARG_PADDING +@item FUNCTION_ARG_PADDING (@var{mode}, @var{type}) +If defined, a C expression which determines whether, and in which direction, +to pad out an argument with extra space. The value should be of type +@code{enum direction}: either @code{upward} to pad above the argument, +@code{downward} to pad below, or @code{none} to inhibit padding. + +The @emph{amount} of padding is always just enough to reach the next +multiple of @code{FUNCTION_ARG_BOUNDARY}; this macro does not control +it. + +This macro has a default definition which is right for most systems. +For little-endian machines, the default is to pad upward. For +big-endian machines, the default is to pad downward for an argument of +constant size shorter than an @code{int}, and upward otherwise. + +@findex PAD_VARARGS_DOWN +@item PAD_VARARGS_DOWN +If defined, a C expression which determines whether the default +implementation of va_arg will attempt to pad down before reading the +next argument, if that argument is smaller than its aligned space as +controlled by @code{PARM_BOUNDARY}. If this macro is not defined, all such +arguments are padded down if @code{BYTES_BIG_ENDIAN} is true. + +@findex FUNCTION_ARG_BOUNDARY +@item FUNCTION_ARG_BOUNDARY (@var{mode}, @var{type}) +If defined, a C expression that gives the alignment boundary, in bits, +of an argument with the specified mode and type. If it is not defined, +@code{PARM_BOUNDARY} is used for all arguments. + +@findex FUNCTION_ARG_REGNO_P +@item FUNCTION_ARG_REGNO_P (@var{regno}) +A C expression that is nonzero if @var{regno} is the number of a hard +register in which function arguments are sometimes passed. This does +@emph{not} include implicit arguments such as the static chain and +the structure-value address. On many machines, no registers can be +used for this purpose since all function arguments are pushed on the +stack. + +@findex LOAD_ARGS_REVERSED +@item LOAD_ARGS_REVERSED +If defined, the order in which arguments are loaded into their +respective argument registers is reversed so that the last +argument is loaded first. This macro only affects arguments +passed in registers. + +@end table + +@node Scalar Return +@subsection How Scalar Function Values Are Returned +@cindex return values in registers +@cindex values, returned by functions +@cindex scalars, returned as values + +This section discusses the macros that control returning scalars as +values---values that can fit in registers. + +@table @code +@findex TRADITIONAL_RETURN_FLOAT +@item TRADITIONAL_RETURN_FLOAT +Define this macro if @option{-traditional} should not cause functions +declared to return @code{float} to convert the value to @code{double}. + +@findex FUNCTION_VALUE +@item FUNCTION_VALUE (@var{valtype}, @var{func}) +A C expression to create an RTX representing the place where a +function returns a value of data type @var{valtype}. @var{valtype} is +a tree node representing a data type. Write @code{TYPE_MODE +(@var{valtype})} to get the machine mode used to represent that type. +On many machines, only the mode is relevant. (Actually, on most +machines, scalar values are returned in the same place regardless of +mode). + +The value of the expression is usually a @code{reg} RTX for the hard +register where the return value is stored. The value can also be a +@code{parallel} RTX, if the return value is in multiple places. See +@code{FUNCTION_ARG} for an explanation of the @code{parallel} form. + +If @code{PROMOTE_FUNCTION_RETURN} is defined, you must apply the same +promotion rules specified in @code{PROMOTE_MODE} if @var{valtype} is a +scalar type. + +If the precise function being called is known, @var{func} is a tree +node (@code{FUNCTION_DECL}) for it; otherwise, @var{func} is a null +pointer. This makes it possible to use a different value-returning +convention for specific functions when all their calls are +known. + +@code{FUNCTION_VALUE} is not used for return vales with aggregate data +types, because these are returned in another way. See +@code{STRUCT_VALUE_REGNUM} and related macros, below. + +@findex FUNCTION_OUTGOING_VALUE +@item FUNCTION_OUTGOING_VALUE (@var{valtype}, @var{func}) +Define this macro if the target machine has ``register windows'' +so that the register in which a function returns its value is not +the same as the one in which the caller sees the value. + +For such machines, @code{FUNCTION_VALUE} computes the register in which +the caller will see the value. @code{FUNCTION_OUTGOING_VALUE} should be +defined in a similar fashion to tell the function where to put the +value. + +If @code{FUNCTION_OUTGOING_VALUE} is not defined, +@code{FUNCTION_VALUE} serves both purposes. + +@code{FUNCTION_OUTGOING_VALUE} is not used for return vales with +aggregate data types, because these are returned in another way. See +@code{STRUCT_VALUE_REGNUM} and related macros, below. + +@findex LIBCALL_VALUE +@item LIBCALL_VALUE (@var{mode}) +A C expression to create an RTX representing the place where a library +function returns a value of mode @var{mode}. If the precise function +being called is known, @var{func} is a tree node +(@code{FUNCTION_DECL}) for it; otherwise, @var{func} is a null +pointer. This makes it possible to use a different value-returning +convention for specific functions when all their calls are +known. + +Note that ``library function'' in this context means a compiler +support routine, used to perform arithmetic, whose name is known +specially by the compiler and was not mentioned in the C code being +compiled. + +The definition of @code{LIBRARY_VALUE} need not be concerned aggregate +data types, because none of the library functions returns such types. + +@findex FUNCTION_VALUE_REGNO_P +@item FUNCTION_VALUE_REGNO_P (@var{regno}) +A C expression that is nonzero if @var{regno} is the number of a hard +register in which the values of called function may come back. + +A register whose use for returning values is limited to serving as the +second of a pair (for a value of type @code{double}, say) need not be +recognized by this macro. So for most machines, this definition +suffices: + +@example +#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) +@end example + +If the machine has register windows, so that the caller and the called +function use different registers for the return value, this macro +should recognize only the caller's register numbers. + +@findex APPLY_RESULT_SIZE +@item APPLY_RESULT_SIZE +Define this macro if @samp{untyped_call} and @samp{untyped_return} +need more space than is implied by @code{FUNCTION_VALUE_REGNO_P} for +saving and restoring an arbitrary return value. +@end table + +@node Aggregate Return +@subsection How Large Values Are Returned +@cindex aggregates as return values +@cindex large return values +@cindex returning aggregate values +@cindex structure value address + +When a function value's mode is @code{BLKmode} (and in some other +cases), the value is not returned according to @code{FUNCTION_VALUE} +(@pxref{Scalar Return}). Instead, the caller passes the address of a +block of memory in which the value should be stored. This address +is called the @dfn{structure value address}. + +This section describes how to control returning structure values in +memory. + +@table @code +@findex RETURN_IN_MEMORY +@item RETURN_IN_MEMORY (@var{type}) +A C expression which can inhibit the returning of certain function +values in registers, based on the type of value. A nonzero value says +to return the function value in memory, just as large structures are +always returned. Here @var{type} will be a C expression of type +@code{tree}, representing the data type of the value. + +Note that values of mode @code{BLKmode} must be explicitly handled +by this macro. Also, the option @option{-fpcc-struct-return} +takes effect regardless of this macro. On most systems, it is +possible to leave the macro undefined; this causes a default +definition to be used, whose value is the constant 1 for @code{BLKmode} +values, and 0 otherwise. + +Do not use this macro to indicate that structures and unions should always +be returned in memory. You should instead use @code{DEFAULT_PCC_STRUCT_RETURN} +to indicate this. + +@findex DEFAULT_PCC_STRUCT_RETURN +@item DEFAULT_PCC_STRUCT_RETURN +Define this macro to be 1 if all structure and union return values must be +in memory. Since this results in slower code, this should be defined +only if needed for compatibility with other compilers or with an ABI@. +If you define this macro to be 0, then the conventions used for structure +and union return values are decided by the @code{RETURN_IN_MEMORY} macro. + +If not defined, this defaults to the value 1. + +@findex STRUCT_VALUE_REGNUM +@item STRUCT_VALUE_REGNUM +If the structure value address is passed in a register, then +@code{STRUCT_VALUE_REGNUM} should be the number of that register. + +@findex STRUCT_VALUE +@item STRUCT_VALUE +If the structure value address is not passed in a register, define +@code{STRUCT_VALUE} as an expression returning an RTX for the place +where the address is passed. If it returns 0, the address is passed as +an ``invisible'' first argument. + +@findex STRUCT_VALUE_INCOMING_REGNUM +@item STRUCT_VALUE_INCOMING_REGNUM +On some architectures the place where the structure value address +is found by the called function is not the same place that the +caller put it. This can be due to register windows, or it could +be because the function prologue moves it to a different place. + +If the incoming location of the structure value address is in a +register, define this macro as the register number. + +@findex STRUCT_VALUE_INCOMING +@item STRUCT_VALUE_INCOMING +If the incoming location is not a register, then you should define +@code{STRUCT_VALUE_INCOMING} as an expression for an RTX for where the +called function should find the value. If it should find the value on +the stack, define this to create a @code{mem} which refers to the frame +pointer. A definition of 0 means that the address is passed as an +``invisible'' first argument. + +@findex PCC_STATIC_STRUCT_RETURN +@item PCC_STATIC_STRUCT_RETURN +Define this macro if the usual system convention on the target machine +for returning structures and unions is for the called function to return +the address of a static variable containing the value. + +Do not define this if the usual system convention is for the caller to +pass an address to the subroutine. + +This macro has effect in @option{-fpcc-struct-return} mode, but it does +nothing when you use @option{-freg-struct-return} mode. +@end table + +@node Caller Saves +@subsection Caller-Saves Register Allocation + +If you enable it, GCC can save registers around function calls. This +makes it possible to use call-clobbered registers to hold variables that +must live across calls. + +@table @code +@findex DEFAULT_CALLER_SAVES +@item DEFAULT_CALLER_SAVES +Define this macro if function calls on the target machine do not preserve +any registers; in other words, if @code{CALL_USED_REGISTERS} has 1 +for all registers. When defined, this macro enables @option{-fcaller-saves} +by default for all optimization levels. It has no effect for optimization +levels 2 and higher, where @option{-fcaller-saves} is the default. + +@findex CALLER_SAVE_PROFITABLE +@item CALLER_SAVE_PROFITABLE (@var{refs}, @var{calls}) +A C expression to determine whether it is worthwhile to consider placing +a pseudo-register in a call-clobbered hard register and saving and +restoring it around each function call. The expression should be 1 when +this is worth doing, and 0 otherwise. + +If you don't define this macro, a default is used which is good on most +machines: @code{4 * @var{calls} < @var{refs}}. + +@findex HARD_REGNO_CALLER_SAVE_MODE +@item HARD_REGNO_CALLER_SAVE_MODE (@var{regno}, @var{nregs}) +A C expression specifying which mode is required for saving @var{nregs} +of a pseudo-register in call-clobbered hard register @var{regno}. If +@var{regno} is unsuitable for caller save, @code{VOIDmode} should be +returned. For most machines this macro need not be defined since GCC +will select the smallest suitable mode. +@end table + +@node Function Entry +@subsection Function Entry and Exit +@cindex function entry and exit +@cindex prologue +@cindex epilogue + +This section describes the macros that output function entry +(@dfn{prologue}) and exit (@dfn{epilogue}) code. + +@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_PROLOGUE (FILE *@var{file}, HOST_WIDE_INT @var{size}) +If defined, a function that outputs the assembler code for entry to a +function. The prologue is responsible for setting up the stack frame, +initializing the frame pointer register, saving registers that must be +saved, and allocating @var{size} additional bytes of storage for the +local variables. @var{size} is an integer. @var{file} is a stdio +stream to which the assembler code should be output. + +The label for the beginning of the function need not be output by this +macro. That has already been done when the macro is run. + +@findex regs_ever_live +To determine which registers to save, the macro can refer to the array +@code{regs_ever_live}: element @var{r} is nonzero if hard register +@var{r} is used anywhere within the function. This implies the function +prologue should save register @var{r}, provided it is not one of the +call-used registers. (@code{TARGET_ASM_FUNCTION_EPILOGUE} must likewise use +@code{regs_ever_live}.) + +On machines that have ``register windows'', the function entry code does +not save on the stack the registers that are in the windows, even if +they are supposed to be preserved by function calls; instead it takes +appropriate steps to ``push'' the register stack, if any non-call-used +registers are used in the function. + +@findex frame_pointer_needed +On machines where functions may or may not have frame-pointers, the +function entry code must vary accordingly; it must set up the frame +pointer if one is wanted, and not otherwise. To determine whether a +frame pointer is in wanted, the macro can refer to the variable +@code{frame_pointer_needed}. The variable's value will be 1 at run +time in a function that needs a frame pointer. @xref{Elimination}. + +The function entry code is responsible for allocating any stack space +required for the function. This stack space consists of the regions +listed below. In most cases, these regions are allocated in the +order listed, with the last listed region closest to the top of the +stack (the lowest address if @code{STACK_GROWS_DOWNWARD} is defined, and +the highest address if it is not defined). You can use a different order +for a machine if doing so is more convenient or required for +compatibility reasons. Except in cases where required by standard +or by a debugger, there is no reason why the stack layout used by GCC +need agree with that used by other compilers for a machine. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_END_PROLOGUE (FILE *@var{file}) +If defined, a function that outputs assembler code at the end of a +prologue. This should be used when the function prologue is being +emitted as RTL, and you have some extra assembler that needs to be +emitted. @xref{prologue instruction pattern}. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_BEGIN_EPILOGUE (FILE *@var{file}) +If defined, a function that outputs assembler code at the start of an +epilogue. This should be used when the function epilogue is being +emitted as RTL, and you have some extra assembler that needs to be +emitted. @xref{epilogue instruction pattern}. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_ASM_FUNCTION_EPILOGUE (FILE *@var{file}, HOST_WIDE_INT @var{size}) +If defined, a function that outputs the assembler code for exit from a +function. The epilogue is responsible for restoring the saved +registers and stack pointer to their values when the function was +called, and returning control to the caller. This macro takes the +same arguments as the macro @code{TARGET_ASM_FUNCTION_PROLOGUE}, and the +registers to restore are determined from @code{regs_ever_live} and +@code{CALL_USED_REGISTERS} in the same way. + +On some machines, there is a single instruction that does all the work +of returning from the function. On these machines, give that +instruction the name @samp{return} and do not define the macro +@code{TARGET_ASM_FUNCTION_EPILOGUE} at all. + +Do not define a pattern named @samp{return} if you want the +@code{TARGET_ASM_FUNCTION_EPILOGUE} to be used. If you want the target +switches to control whether return instructions or epilogues are used, +define a @samp{return} pattern with a validity condition that tests the +target switches appropriately. If the @samp{return} pattern's validity +condition is false, epilogues will be used. + +On machines where functions may or may not have frame-pointers, the +function exit code must vary accordingly. Sometimes the code for these +two cases is completely different. To determine whether a frame pointer +is wanted, the macro can refer to the variable +@code{frame_pointer_needed}. The variable's value will be 1 when compiling +a function that needs a frame pointer. + +Normally, @code{TARGET_ASM_FUNCTION_PROLOGUE} and +@code{TARGET_ASM_FUNCTION_EPILOGUE} must treat leaf functions specially. +The C variable @code{current_function_is_leaf} is nonzero for such a +function. @xref{Leaf Functions}. + +On some machines, some functions pop their arguments on exit while +others leave that for the caller to do. For example, the 68020 when +given @option{-mrtd} pops arguments in functions that take a fixed +number of arguments. + +@findex current_function_pops_args +Your definition of the macro @code{RETURN_POPS_ARGS} decides which +functions pop their own arguments. @code{TARGET_ASM_FUNCTION_EPILOGUE} +needs to know what was decided. The variable that is called +@code{current_function_pops_args} is the number of bytes of its +arguments that a function should pop. @xref{Scalar Return}. +@c what is the "its arguments" in the above sentence referring to, pray +@c tell? --mew 5feb93 +@end deftypefn + +@table @code + +@itemize @bullet +@item +@findex current_function_pretend_args_size +A region of @code{current_function_pretend_args_size} bytes of +uninitialized space just underneath the first argument arriving on the +stack. (This may not be at the very start of the allocated stack region +if the calling sequence has pushed anything else since pushing the stack +arguments. But usually, on such machines, nothing else has been pushed +yet, because the function prologue itself does all the pushing.) This +region is used on machines where an argument may be passed partly in +registers and partly in memory, and, in some cases to support the +features in @code{<varargs.h>} and @code{<stdarg.h>}. + +@item +An area of memory used to save certain registers used by the function. +The size of this area, which may also include space for such things as +the return address and pointers to previous stack frames, is +machine-specific and usually depends on which registers have been used +in the function. Machines with register windows often do not require +a save area. + +@item +A region of at least @var{size} bytes, possibly rounded up to an allocation +boundary, to contain the local variables of the function. On some machines, +this region and the save area may occur in the opposite order, with the +save area closer to the top of the stack. + +@item +@cindex @code{ACCUMULATE_OUTGOING_ARGS} and stack frames +Optionally, when @code{ACCUMULATE_OUTGOING_ARGS} is defined, a region of +@code{current_function_outgoing_args_size} bytes to be used for outgoing +argument lists of the function. @xref{Stack Arguments}. +@end itemize + +Normally, it is necessary for the macros +@code{TARGET_ASM_FUNCTION_PROLOGUE} and +@code{TARGET_ASM_FUNCTION_EPILOGUE} to treat leaf functions specially. +The C variable @code{current_function_is_leaf} is nonzero for such a +function. + +@findex EXIT_IGNORE_STACK +@item EXIT_IGNORE_STACK +Define this macro as a C expression that is nonzero if the return +instruction or the function epilogue ignores the value of the stack +pointer; in other words, if it is safe to delete an instruction to +adjust the stack pointer before a return from the function. + +Note that this macro's value is relevant only for functions for which +frame pointers are maintained. It is never safe to delete a final +stack adjustment in a function that has no frame pointer, and the +compiler knows this regardless of @code{EXIT_IGNORE_STACK}. + +@findex EPILOGUE_USES +@item EPILOGUE_USES (@var{regno}) +Define this macro as a C expression that is nonzero for registers that are +used by the epilogue or the @samp{return} pattern. The stack and frame +pointer registers are already be assumed to be used as needed. + +@findex DELAY_SLOTS_FOR_EPILOGUE +@item DELAY_SLOTS_FOR_EPILOGUE +Define this macro if the function epilogue contains delay slots to which +instructions from the rest of the function can be ``moved''. The +definition should be a C expression whose value is an integer +representing the number of delay slots there. + +@findex ELIGIBLE_FOR_EPILOGUE_DELAY +@item ELIGIBLE_FOR_EPILOGUE_DELAY (@var{insn}, @var{n}) +A C expression that returns 1 if @var{insn} can be placed in delay +slot number @var{n} of the epilogue. + +The argument @var{n} is an integer which identifies the delay slot now +being considered (since different slots may have different rules of +eligibility). It is never negative and is always less than the number +of epilogue delay slots (what @code{DELAY_SLOTS_FOR_EPILOGUE} returns). +If you reject a particular insn for a given delay slot, in principle, it +may be reconsidered for a subsequent delay slot. Also, other insns may +(at least in principle) be considered for the so far unfilled delay +slot. + +@findex current_function_epilogue_delay_list +@findex final_scan_insn +The insns accepted to fill the epilogue delay slots are put in an RTL +list made with @code{insn_list} objects, stored in the variable +@code{current_function_epilogue_delay_list}. The insn for the first +delay slot comes first in the list. Your definition of the macro +@code{TARGET_ASM_FUNCTION_EPILOGUE} should fill the delay slots by +outputting the insns in this list, usually by calling +@code{final_scan_insn}. + +You need not define this macro if you did not define +@code{DELAY_SLOTS_FOR_EPILOGUE}. + +@findex ASM_OUTPUT_MI_THUNK +@item ASM_OUTPUT_MI_THUNK (@var{file}, @var{thunk_fndecl}, @var{delta}, @var{function}) +A C compound statement that outputs the assembler code for a thunk +function, used to implement C++ virtual function calls with multiple +inheritance. The thunk acts as a wrapper around a virtual function, +adjusting the implicit object parameter before handing control off to +the real function. + +First, emit code to add the integer @var{delta} to the location that +contains the incoming first argument. Assume that this argument +contains a pointer, and is the one used to pass the @code{this} pointer +in C++. This is the incoming argument @emph{before} the function prologue, +e.g.@: @samp{%o0} on a sparc. The addition must preserve the values of +all other incoming arguments. + +After the addition, emit code to jump to @var{function}, which is a +@code{FUNCTION_DECL}. This is a direct pure jump, not a call, and does +not touch the return address. Hence returning from @var{FUNCTION} will +return to whoever called the current @samp{thunk}. + +The effect must be as if @var{function} had been called directly with +the adjusted first argument. This macro is responsible for emitting all +of the code for a thunk function; @code{TARGET_ASM_FUNCTION_PROLOGUE} +and @code{TARGET_ASM_FUNCTION_EPILOGUE} are not invoked. + +The @var{thunk_fndecl} is redundant. (@var{delta} and @var{function} +have already been extracted from it.) It might possibly be useful on +some targets, but probably not. + +If you do not define this macro, the target-independent code in the C++ +front end will generate a less efficient heavyweight thunk that calls +@var{function} instead of jumping to it. The generic approach does +not support varargs. +@end table + +@node Profiling +@subsection Generating Code for Profiling +@cindex profiling, code generation + +These macros will help you generate code for profiling. + +@table @code +@findex FUNCTION_PROFILER +@item FUNCTION_PROFILER (@var{file}, @var{labelno}) +A C statement or compound statement to output to @var{file} some +assembler code to call the profiling subroutine @code{mcount}. + +@findex mcount +The details of how @code{mcount} expects to be called are determined by +your operating system environment, not by GCC@. To figure them out, +compile a small program for profiling using the system's installed C +compiler and look at the assembler code that results. + +Older implementations of @code{mcount} expect the address of a counter +variable to be loaded into some register. The name of this variable is +@samp{LP} followed by the number @var{labelno}, so you would generate +the name using @samp{LP%d} in a @code{fprintf}. + +@findex PROFILE_HOOK +@item PROFILE_HOOK +A C statement or compound statement to output to @var{file} some assembly +code to call the profiling subroutine @code{mcount} even the target does +not support profiling. + +@findex NO_PROFILE_COUNTERS +@item NO_PROFILE_COUNTERS +Define this macro if the @code{mcount} subroutine on your system does +not need a counter variable allocated for each function. This is true +for almost all modern implementations. If you define this macro, you +must not use the @var{labelno} argument to @code{FUNCTION_PROFILER}. + +@findex PROFILE_BEFORE_PROLOGUE +@item PROFILE_BEFORE_PROLOGUE +Define this macro if the code for function profiling should come before +the function prologue. Normally, the profiling code comes after. + + +@findex TARGET_ALLOWS_PROFILING_WITHOUT_FRAME_POINTER +@item TARGET_ALLOWS_PROFILING_WITHOUT_FRAME_POINTER +On some targets, it is impossible to use profiling when the frame +pointer has been omitted. For example, on x86 GNU/Linux systems, +the @code{mcount} routine provided by the GNU C Library finds the +address of the routine that called the routine that called @code{mcount} +by looking in the immediate caller's stack frame. If the immediate +caller has no frame pointer, this lookup will fail. + +By default, GCC assumes that the target does allow profiling when the +frame pointer is omitted. This macro should be defined to a C +expression that evaluates to @code{false} if the target does not allow +profiling when the frame pointer is omitted. + +@end table + +@node Tail Calls +@subsection Permitting tail calls +@cindex tail calls + +@table @code +@findex FUNCTION_OK_FOR_SIBCALL +@item FUNCTION_OK_FOR_SIBCALL (@var{decl}) +A C expression that evaluates to true if it is ok to perform a sibling +call to @var{decl} from the current function. + +It is not uncommon for limitations of calling conventions to prevent +tail calls to functions outside the current unit of translation, or +during PIC compilation. Use this macro to enforce these restrictions, +as the @code{sibcall} md pattern can not fail, or fall over to a +``normal'' call. +@end table + +@node Varargs +@section Implementing the Varargs Macros +@cindex varargs implementation + +GCC comes with an implementation of @code{<varargs.h>} and +@code{<stdarg.h>} that work without change on machines that pass arguments +on the stack. Other machines require their own implementations of +varargs, and the two machine independent header files must have +conditionals to include it. + +ISO @code{<stdarg.h>} differs from traditional @code{<varargs.h>} mainly in +the calling convention for @code{va_start}. The traditional +implementation takes just one argument, which is the variable in which +to store the argument pointer. The ISO implementation of +@code{va_start} takes an additional second argument. The user is +supposed to write the last named argument of the function here. + +However, @code{va_start} should not use this argument. The way to find +the end of the named arguments is with the built-in functions described +below. + +@table @code +@findex __builtin_saveregs +@item __builtin_saveregs () +Use this built-in function to save the argument registers in memory so +that the varargs mechanism can access them. Both ISO and traditional +versions of @code{va_start} must use @code{__builtin_saveregs}, unless +you use @code{SETUP_INCOMING_VARARGS} (see below) instead. + +On some machines, @code{__builtin_saveregs} is open-coded under the +control of the macro @code{EXPAND_BUILTIN_SAVEREGS}. On other machines, +it calls a routine written in assembler language, found in +@file{libgcc2.c}. + +Code generated for the call to @code{__builtin_saveregs} appears at the +beginning of the function, as opposed to where the call to +@code{__builtin_saveregs} is written, regardless of what the code is. +This is because the registers must be saved before the function starts +to use them for its own purposes. +@c i rewrote the first sentence above to fix an overfull hbox. --mew +@c 10feb93 + +@findex __builtin_args_info +@item __builtin_args_info (@var{category}) +Use this built-in function to find the first anonymous arguments in +registers. + +In general, a machine may have several categories of registers used for +arguments, each for a particular category of data types. (For example, +on some machines, floating-point registers are used for floating-point +arguments while other arguments are passed in the general registers.) +To make non-varargs functions use the proper calling convention, you +have defined the @code{CUMULATIVE_ARGS} data type to record how many +registers in each category have been used so far + +@code{__builtin_args_info} accesses the same data structure of type +@code{CUMULATIVE_ARGS} after the ordinary argument layout is finished +with it, with @var{category} specifying which word to access. Thus, the +value indicates the first unused register in a given category. + +Normally, you would use @code{__builtin_args_info} in the implementation +of @code{va_start}, accessing each category just once and storing the +value in the @code{va_list} object. This is because @code{va_list} will +have to update the values, and there is no way to alter the +values accessed by @code{__builtin_args_info}. + +@findex __builtin_next_arg +@item __builtin_next_arg (@var{lastarg}) +This is the equivalent of @code{__builtin_args_info}, for stack +arguments. It returns the address of the first anonymous stack +argument, as type @code{void *}. If @code{ARGS_GROW_DOWNWARD}, it +returns the address of the location above the first anonymous stack +argument. Use it in @code{va_start} to initialize the pointer for +fetching arguments from the stack. Also use it in @code{va_start} to +verify that the second parameter @var{lastarg} is the last named argument +of the current function. + +@findex __builtin_classify_type +@item __builtin_classify_type (@var{object}) +Since each machine has its own conventions for which data types are +passed in which kind of register, your implementation of @code{va_arg} +has to embody these conventions. The easiest way to categorize the +specified data type is to use @code{__builtin_classify_type} together +with @code{sizeof} and @code{__alignof__}. + +@code{__builtin_classify_type} ignores the value of @var{object}, +considering only its data type. It returns an integer describing what +kind of type that is---integer, floating, pointer, structure, and so on. + +The file @file{typeclass.h} defines an enumeration that you can use to +interpret the values of @code{__builtin_classify_type}. +@end table + +These machine description macros help implement varargs: + +@table @code +@findex EXPAND_BUILTIN_SAVEREGS +@item EXPAND_BUILTIN_SAVEREGS () +If defined, is a C expression that produces the machine-specific code +for a call to @code{__builtin_saveregs}. This code will be moved to the +very beginning of the function, before any parameter access are made. +The return value of this function should be an RTX that contains the +value to use as the return of @code{__builtin_saveregs}. + +@findex SETUP_INCOMING_VARARGS +@item SETUP_INCOMING_VARARGS (@var{args_so_far}, @var{mode}, @var{type}, @var{pretend_args_size}, @var{second_time}) +This macro offers an alternative to using @code{__builtin_saveregs} and +defining the macro @code{EXPAND_BUILTIN_SAVEREGS}. Use it to store the +anonymous register arguments into the stack so that all the arguments +appear to have been passed consecutively on the stack. Once this is +done, you can use the standard implementation of varargs that works for +machines that pass all their arguments on the stack. + +The argument @var{args_so_far} is the @code{CUMULATIVE_ARGS} data +structure, containing the values that are obtained after processing the +named arguments. The arguments @var{mode} and @var{type} describe the +last named argument---its machine mode and its data type as a tree node. + +The macro implementation should do two things: first, push onto the +stack all the argument registers @emph{not} used for the named +arguments, and second, store the size of the data thus pushed into the +@code{int}-valued variable whose name is supplied as the argument +@var{pretend_args_size}. The value that you store here will serve as +additional offset for setting up the stack frame. + +Because you must generate code to push the anonymous arguments at +compile time without knowing their data types, +@code{SETUP_INCOMING_VARARGS} is only useful on machines that have just +a single category of argument register and use it uniformly for all data +types. + +If the argument @var{second_time} is nonzero, it means that the +arguments of the function are being analyzed for the second time. This +happens for an inline function, which is not actually compiled until the +end of the source file. The macro @code{SETUP_INCOMING_VARARGS} should +not generate any instructions in this case. + +@findex STRICT_ARGUMENT_NAMING +@item STRICT_ARGUMENT_NAMING +Define this macro to be a nonzero value if the location where a function +argument is passed depends on whether or not it is a named argument. + +This macro controls how the @var{named} argument to @code{FUNCTION_ARG} +is set for varargs and stdarg functions. If this macro returns a +nonzero value, the @var{named} argument is always true for named +arguments, and false for unnamed arguments. If it returns a value of +zero, but @code{SETUP_INCOMING_VARARGS} is defined, then all arguments +are treated as named. Otherwise, all named arguments except the last +are treated as named. + +You need not define this macro if it always returns zero. + +@findex PRETEND_OUTGOING_VARARGS_NAMED +@item PRETEND_OUTGOING_VARARGS_NAMED +If you need to conditionally change ABIs so that one works with +@code{SETUP_INCOMING_VARARGS}, but the other works like neither +@code{SETUP_INCOMING_VARARGS} nor @code{STRICT_ARGUMENT_NAMING} was +defined, then define this macro to return nonzero if +@code{SETUP_INCOMING_VARARGS} is used, zero otherwise. +Otherwise, you should not define this macro. +@end table + +@node Trampolines +@section Trampolines for Nested Functions +@cindex trampolines for nested functions +@cindex nested functions, trampolines for + +A @dfn{trampoline} is a small piece of code that is created at run time +when the address of a nested function is taken. It normally resides on +the stack, in the stack frame of the containing function. These macros +tell GCC how to generate code to allocate and initialize a +trampoline. + +The instructions in the trampoline must do two things: load a constant +address into the static chain register, and jump to the real address of +the nested function. On CISC machines such as the m68k, this requires +two instructions, a move immediate and a jump. Then the two addresses +exist in the trampoline as word-long immediate operands. On RISC +machines, it is often necessary to load each address into a register in +two parts. Then pieces of each address form separate immediate +operands. + +The code generated to initialize the trampoline must store the variable +parts---the static chain value and the function address---into the +immediate operands of the instructions. On a CISC machine, this is +simply a matter of copying each address to a memory reference at the +proper offset from the start of the trampoline. On a RISC machine, it +may be necessary to take out pieces of the address and store them +separately. + +@table @code +@findex TRAMPOLINE_TEMPLATE +@item TRAMPOLINE_TEMPLATE (@var{file}) +A C statement to output, on the stream @var{file}, assembler code for a +block of data that contains the constant parts of a trampoline. This +code should not include a label---the label is taken care of +automatically. + +If you do not define this macro, it means no template is needed +for the target. Do not define this macro on systems where the block move +code to copy the trampoline into place would be larger than the code +to generate it on the spot. + +@findex TRAMPOLINE_SECTION +@item TRAMPOLINE_SECTION +The name of a subroutine to switch to the section in which the +trampoline template is to be placed (@pxref{Sections}). The default is +a value of @samp{readonly_data_section}, which places the trampoline in +the section containing read-only data. + +@findex TRAMPOLINE_SIZE +@item TRAMPOLINE_SIZE +A C expression for the size in bytes of the trampoline, as an integer. + +@findex TRAMPOLINE_ALIGNMENT +@item TRAMPOLINE_ALIGNMENT +Alignment required for trampolines, in bits. + +If you don't define this macro, the value of @code{BIGGEST_ALIGNMENT} +is used for aligning trampolines. + +@findex INITIALIZE_TRAMPOLINE +@item INITIALIZE_TRAMPOLINE (@var{addr}, @var{fnaddr}, @var{static_chain}) +A C statement to initialize the variable parts of a trampoline. +@var{addr} is an RTX for the address of the trampoline; @var{fnaddr} is +an RTX for the address of the nested function; @var{static_chain} is an +RTX for the static chain value that should be passed to the function +when it is called. + +@findex TRAMPOLINE_ADJUST_ADDRESS +@item TRAMPOLINE_ADJUST_ADDRESS (@var{addr}) +A C statement that should perform any machine-specific adjustment in +the address of the trampoline. Its argument contains the address that +was passed to @code{INITIALIZE_TRAMPOLINE}. In case the address to be +used for a function call should be different from the address in which +the template was stored, the different address should be assigned to +@var{addr}. If this macro is not defined, @var{addr} will be used for +function calls. + +@findex ALLOCATE_TRAMPOLINE +@item ALLOCATE_TRAMPOLINE (@var{fp}) +A C expression to allocate run-time space for a trampoline. The +expression value should be an RTX representing a memory reference to the +space for the trampoline. + +@cindex @code{TARGET_ASM_FUNCTION_EPILOGUE} and trampolines +@cindex @code{TARGET_ASM_FUNCTION_PROLOGUE} and trampolines +If this macro is not defined, by default the trampoline is allocated as +a stack slot. This default is right for most machines. The exceptions +are machines where it is impossible to execute instructions in the stack +area. On such machines, you may have to implement a separate stack, +using this macro in conjunction with @code{TARGET_ASM_FUNCTION_PROLOGUE} +and @code{TARGET_ASM_FUNCTION_EPILOGUE}. + +@var{fp} points to a data structure, a @code{struct function}, which +describes the compilation status of the immediate containing function of +the function which the trampoline is for. Normally (when +@code{ALLOCATE_TRAMPOLINE} is not defined), the stack slot for the +trampoline is in the stack frame of this containing function. Other +allocation strategies probably must do something analogous with this +information. +@end table + +Implementing trampolines is difficult on many machines because they have +separate instruction and data caches. Writing into a stack location +fails to clear the memory in the instruction cache, so when the program +jumps to that location, it executes the old contents. + +Here are two possible solutions. One is to clear the relevant parts of +the instruction cache whenever a trampoline is set up. The other is to +make all trampolines identical, by having them jump to a standard +subroutine. The former technique makes trampoline execution faster; the +latter makes initialization faster. + +To clear the instruction cache when a trampoline is initialized, define +the following macros which describe the shape of the cache. + +@table @code +@findex INSN_CACHE_SIZE +@item INSN_CACHE_SIZE +The total size in bytes of the cache. + +@findex INSN_CACHE_LINE_WIDTH +@item INSN_CACHE_LINE_WIDTH +The length in bytes of each cache line. The cache is divided into cache +lines which are disjoint slots, each holding a contiguous chunk of data +fetched from memory. Each time data is brought into the cache, an +entire line is read at once. The data loaded into a cache line is +always aligned on a boundary equal to the line size. + +@findex INSN_CACHE_DEPTH +@item INSN_CACHE_DEPTH +The number of alternative cache lines that can hold any particular memory +location. +@end table + +Alternatively, if the machine has system calls or instructions to clear +the instruction cache directly, you can define the following macro. + +@table @code +@findex CLEAR_INSN_CACHE +@item CLEAR_INSN_CACHE (@var{beg}, @var{end}) +If defined, expands to a C expression clearing the @emph{instruction +cache} in the specified interval. If it is not defined, and the macro +@code{INSN_CACHE_SIZE} is defined, some generic code is generated to clear the +cache. The definition of this macro would typically be a series of +@code{asm} statements. Both @var{beg} and @var{end} are both pointer +expressions. +@end table + +To use a standard subroutine, define the following macro. In addition, +you must make sure that the instructions in a trampoline fill an entire +cache line with identical instructions, or else ensure that the +beginning of the trampoline code is always aligned at the same point in +its cache line. Look in @file{m68k.h} as a guide. + +@table @code +@findex TRANSFER_FROM_TRAMPOLINE +@item TRANSFER_FROM_TRAMPOLINE +Define this macro if trampolines need a special subroutine to do their +work. The macro should expand to a series of @code{asm} statements +which will be compiled with GCC@. They go in a library function named +@code{__transfer_from_trampoline}. + +If you need to avoid executing the ordinary prologue code of a compiled +C function when you jump to the subroutine, you can do so by placing a +special label of your own in the assembler code. Use one @code{asm} +statement to generate an assembler label, and another to make the label +global. Then trampolines can use that label to jump directly to your +special assembler code. +@end table + +@node Library Calls +@section Implicit Calls to Library Routines +@cindex library subroutine names +@cindex @file{libgcc.a} + +@c prevent bad page break with this line +Here is an explanation of implicit calls to library routines. + +@table @code +@findex MULSI3_LIBCALL +@item MULSI3_LIBCALL +A C string constant giving the name of the function to call for +multiplication of one signed full-word by another. If you do not +define this macro, the default name is used, which is @code{__mulsi3}, +a function defined in @file{libgcc.a}. + +@findex DIVSI3_LIBCALL +@item DIVSI3_LIBCALL +A C string constant giving the name of the function to call for +division of one signed full-word by another. If you do not define +this macro, the default name is used, which is @code{__divsi3}, a +function defined in @file{libgcc.a}. + +@findex UDIVSI3_LIBCALL +@item UDIVSI3_LIBCALL +A C string constant giving the name of the function to call for +division of one unsigned full-word by another. If you do not define +this macro, the default name is used, which is @code{__udivsi3}, a +function defined in @file{libgcc.a}. + +@findex MODSI3_LIBCALL +@item MODSI3_LIBCALL +A C string constant giving the name of the function to call for the +remainder in division of one signed full-word by another. If you do +not define this macro, the default name is used, which is +@code{__modsi3}, a function defined in @file{libgcc.a}. + +@findex UMODSI3_LIBCALL +@item UMODSI3_LIBCALL +A C string constant giving the name of the function to call for the +remainder in division of one unsigned full-word by another. If you do +not define this macro, the default name is used, which is +@code{__umodsi3}, a function defined in @file{libgcc.a}. + +@findex MULDI3_LIBCALL +@item MULDI3_LIBCALL +A C string constant giving the name of the function to call for +multiplication of one signed double-word by another. If you do not +define this macro, the default name is used, which is @code{__muldi3}, +a function defined in @file{libgcc.a}. + +@findex DIVDI3_LIBCALL +@item DIVDI3_LIBCALL +A C string constant giving the name of the function to call for +division of one signed double-word by another. If you do not define +this macro, the default name is used, which is @code{__divdi3}, a +function defined in @file{libgcc.a}. + +@findex UDIVDI3_LIBCALL +@item UDIVDI3_LIBCALL +A C string constant giving the name of the function to call for +division of one unsigned full-word by another. If you do not define +this macro, the default name is used, which is @code{__udivdi3}, a +function defined in @file{libgcc.a}. + +@findex MODDI3_LIBCALL +@item MODDI3_LIBCALL +A C string constant giving the name of the function to call for the +remainder in division of one signed double-word by another. If you do +not define this macro, the default name is used, which is +@code{__moddi3}, a function defined in @file{libgcc.a}. + +@findex UMODDI3_LIBCALL +@item UMODDI3_LIBCALL +A C string constant giving the name of the function to call for the +remainder in division of one unsigned full-word by another. If you do +not define this macro, the default name is used, which is +@code{__umoddi3}, a function defined in @file{libgcc.a}. + +@findex INIT_TARGET_OPTABS +@item INIT_TARGET_OPTABS +Define this macro as a C statement that declares additional library +routines renames existing ones. @code{init_optabs} calls this macro after +initializing all the normal library routines. + +@findex FLOAT_LIB_COMPARE_RETURNS_BOOL (@var{mode}, @var{comparison}) +@item FLOAT_LIB_COMPARE_RETURNS_BOOL +Define this macro as a C statement that returns nonzero if a call to +the floating point comparison library function will return a boolean +value that indicates the result of the comparison. It should return +zero if one of gcc's own libgcc functions is called. + +Most ports don't need to define this macro. + +@findex TARGET_EDOM +@cindex @code{EDOM}, implicit usage +@item TARGET_EDOM +The value of @code{EDOM} on the target machine, as a C integer constant +expression. If you don't define this macro, GCC does not attempt to +deposit the value of @code{EDOM} into @code{errno} directly. Look in +@file{/usr/include/errno.h} to find the value of @code{EDOM} on your +system. + +If you do not define @code{TARGET_EDOM}, then compiled code reports +domain errors by calling the library function and letting it report the +error. If mathematical functions on your system use @code{matherr} when +there is an error, then you should leave @code{TARGET_EDOM} undefined so +that @code{matherr} is used normally. + +@findex GEN_ERRNO_RTX +@cindex @code{errno}, implicit usage +@item GEN_ERRNO_RTX +Define this macro as a C expression to create an rtl expression that +refers to the global ``variable'' @code{errno}. (On certain systems, +@code{errno} may not actually be a variable.) If you don't define this +macro, a reasonable default is used. + +@findex TARGET_MEM_FUNCTIONS +@cindex @code{bcopy}, implicit usage +@cindex @code{memcpy}, implicit usage +@cindex @code{memmove}, implicit usage +@cindex @code{bzero}, implicit usage +@cindex @code{memset}, implicit usage +@item TARGET_MEM_FUNCTIONS +Define this macro if GCC should generate calls to the ISO C +(and System V) library functions @code{memcpy}, @code{memmove} and +@code{memset} rather than the BSD functions @code{bcopy} and @code{bzero}. + +@findex LIBGCC_NEEDS_DOUBLE +@item LIBGCC_NEEDS_DOUBLE +Define this macro if @code{float} arguments cannot be passed to library +routines (so they must be converted to @code{double}). This macro +affects both how library calls are generated and how the library +routines in @file{libgcc.a} accept their arguments. It is useful on +machines where floating and fixed point arguments are passed +differently, such as the i860. + +@findex NEXT_OBJC_RUNTIME +@item NEXT_OBJC_RUNTIME +Define this macro to generate code for Objective-C message sending using +the calling convention of the NeXT system. This calling convention +involves passing the object, the selector and the method arguments all +at once to the method-lookup library function. + +The default calling convention passes just the object and the selector +to the lookup function, which returns a pointer to the method. +@end table + +@node Addressing Modes +@section Addressing Modes +@cindex addressing modes + +@c prevent bad page break with this line +This is about addressing modes. + +@table @code +@findex HAVE_PRE_INCREMENT +@findex HAVE_PRE_DECREMENT +@findex HAVE_POST_INCREMENT +@findex HAVE_POST_DECREMENT +@item HAVE_PRE_INCREMENT +@itemx HAVE_PRE_DECREMENT +@itemx HAVE_POST_INCREMENT +@itemx HAVE_POST_DECREMENT +A C expression that is nonzero if the machine supports pre-increment, +pre-decrement, post-increment, or post-decrement addressing respectively. + +@findex HAVE_POST_MODIFY_DISP +@findex HAVE_PRE_MODIFY_DISP +@item HAVE_PRE_MODIFY_DISP +@itemx HAVE_POST_MODIFY_DISP +A C expression that is nonzero if the machine supports pre- or +post-address side-effect generation involving constants other than +the size of the memory operand. + +@findex HAVE_POST_MODIFY_REG +@findex HAVE_PRE_MODIFY_REG +@item HAVE_PRE_MODIFY_REG +@itemx HAVE_POST_MODIFY_REG +A C expression that is nonzero if the machine supports pre- or +post-address side-effect generation involving a register displacement. + +@findex CONSTANT_ADDRESS_P +@item CONSTANT_ADDRESS_P (@var{x}) +A C expression that is 1 if the RTX @var{x} is a constant which +is a valid address. On most machines, this can be defined as +@code{CONSTANT_P (@var{x})}, but a few machines are more restrictive +in which constant addresses are supported. + +@findex CONSTANT_P +@code{CONSTANT_P} accepts integer-values expressions whose values are +not explicitly known, such as @code{symbol_ref}, @code{label_ref}, and +@code{high} expressions and @code{const} arithmetic expressions, in +addition to @code{const_int} and @code{const_double} expressions. + +@findex MAX_REGS_PER_ADDRESS +@item MAX_REGS_PER_ADDRESS +A number, the maximum number of registers that can appear in a valid +memory address. Note that it is up to you to specify a value equal to +the maximum number that @code{GO_IF_LEGITIMATE_ADDRESS} would ever +accept. + +@findex GO_IF_LEGITIMATE_ADDRESS +@item GO_IF_LEGITIMATE_ADDRESS (@var{mode}, @var{x}, @var{label}) +A C compound statement with a conditional @code{goto @var{label};} +executed if @var{x} (an RTX) is a legitimate memory address on the +target machine for a memory operand of mode @var{mode}. + +It usually pays to define several simpler macros to serve as +subroutines for this one. Otherwise it may be too complicated to +understand. + +This macro must exist in two variants: a strict variant and a +non-strict one. The strict variant is used in the reload pass. It +must be defined so that any pseudo-register that has not been +allocated a hard register is considered a memory reference. In +contexts where some kind of register is required, a pseudo-register +with no hard register must be rejected. + +The non-strict variant is used in other passes. It must be defined to +accept all pseudo-registers in every context where some kind of +register is required. + +@findex REG_OK_STRICT +Compiler source files that want to use the strict variant of this +macro define the macro @code{REG_OK_STRICT}. You should use an +@code{#ifdef REG_OK_STRICT} conditional to define the strict variant +in that case and the non-strict variant otherwise. + +Subroutines to check for acceptable registers for various purposes (one +for base registers, one for index registers, and so on) are typically +among the subroutines used to define @code{GO_IF_LEGITIMATE_ADDRESS}. +Then only these subroutine macros need have two variants; the higher +levels of macros may be the same whether strict or not. + +Normally, constant addresses which are the sum of a @code{symbol_ref} +and an integer are stored inside a @code{const} RTX to mark them as +constant. Therefore, there is no need to recognize such sums +specifically as legitimate addresses. Normally you would simply +recognize any @code{const} as legitimate. + +Usually @code{PRINT_OPERAND_ADDRESS} is not prepared to handle constant +sums that are not marked with @code{const}. It assumes that a naked +@code{plus} indicates indexing. If so, then you @emph{must} reject such +naked constant sums as illegitimate addresses, so that none of them will +be given to @code{PRINT_OPERAND_ADDRESS}. + +@cindex @code{ENCODE_SECTION_INFO} and address validation +On some machines, whether a symbolic address is legitimate depends on +the section that the address refers to. On these machines, define the +macro @code{ENCODE_SECTION_INFO} to store the information into the +@code{symbol_ref}, and then check for it here. When you see a +@code{const}, you will have to look inside it to find the +@code{symbol_ref} in order to determine the section. @xref{Assembler +Format}. + +@findex saveable_obstack +The best way to modify the name string is by adding text to the +beginning, with suitable punctuation to prevent any ambiguity. Allocate +the new name in @code{saveable_obstack}. You will have to modify +@code{ASM_OUTPUT_LABELREF} to remove and decode the added text and +output the name accordingly, and define @code{STRIP_NAME_ENCODING} to +access the original name string. + +You can check the information stored here into the @code{symbol_ref} in +the definitions of the macros @code{GO_IF_LEGITIMATE_ADDRESS} and +@code{PRINT_OPERAND_ADDRESS}. + +@findex REG_OK_FOR_BASE_P +@item REG_OK_FOR_BASE_P (@var{x}) +A C expression that is nonzero if @var{x} (assumed to be a @code{reg} +RTX) is valid for use as a base register. For hard registers, it +should always accept those which the hardware permits and reject the +others. Whether the macro accepts or rejects pseudo registers must be +controlled by @code{REG_OK_STRICT} as described above. This usually +requires two variant definitions, of which @code{REG_OK_STRICT} +controls the one actually used. + +@findex REG_MODE_OK_FOR_BASE_P +@item REG_MODE_OK_FOR_BASE_P (@var{x}, @var{mode}) +A C expression that is just like @code{REG_OK_FOR_BASE_P}, except that +that expression may examine the mode of the memory reference in +@var{mode}. You should define this macro if the mode of the memory +reference affects whether a register may be used as a base register. If +you define this macro, the compiler will use it instead of +@code{REG_OK_FOR_BASE_P}. + +@findex REG_OK_FOR_INDEX_P +@item REG_OK_FOR_INDEX_P (@var{x}) +A C expression that is nonzero if @var{x} (assumed to be a @code{reg} +RTX) is valid for use as an index register. + +The difference between an index register and a base register is that +the index register may be scaled. If an address involves the sum of +two registers, neither one of them scaled, then either one may be +labeled the ``base'' and the other the ``index''; but whichever +labeling is used must fit the machine's constraints of which registers +may serve in each capacity. The compiler will try both labelings, +looking for one that is valid, and will reload one or both registers +only if neither labeling works. + +@findex FIND_BASE_TERM +@item FIND_BASE_TERM (@var{x}) +A C expression to determine the base term of address @var{x}. +This macro is used in only one place: `find_base_term' in alias.c. + +It is always safe for this macro to not be defined. It exists so +that alias analysis can understand machine-dependent addresses. + +The typical use of this macro is to handle addresses containing +a label_ref or symbol_ref within an UNSPEC@. + +@findex LEGITIMIZE_ADDRESS +@item LEGITIMIZE_ADDRESS (@var{x}, @var{oldx}, @var{mode}, @var{win}) +A C compound statement that attempts to replace @var{x} with a valid +memory address for an operand of mode @var{mode}. @var{win} will be a +C statement label elsewhere in the code; the macro definition may use + +@example +GO_IF_LEGITIMATE_ADDRESS (@var{mode}, @var{x}, @var{win}); +@end example + +@noindent +to avoid further processing if the address has become legitimate. + +@findex break_out_memory_refs +@var{x} will always be the result of a call to @code{break_out_memory_refs}, +and @var{oldx} will be the operand that was given to that function to produce +@var{x}. + +The code generated by this macro should not alter the substructure of +@var{x}. If it transforms @var{x} into a more legitimate form, it +should assign @var{x} (which will always be a C variable) a new value. + +It is not necessary for this macro to come up with a legitimate +address. The compiler has standard ways of doing so in all cases. In +fact, it is safe for this macro to do nothing. But often a +machine-dependent strategy can generate better code. + +@findex LEGITIMIZE_RELOAD_ADDRESS +@item LEGITIMIZE_RELOAD_ADDRESS (@var{x}, @var{mode}, @var{opnum}, @var{type}, @var{ind_levels}, @var{win}) +A C compound statement that attempts to replace @var{x}, which is an address +that needs reloading, with a valid memory address for an operand of mode +@var{mode}. @var{win} will be a C statement label elsewhere in the code. +It is not necessary to define this macro, but it might be useful for +performance reasons. + +For example, on the i386, it is sometimes possible to use a single +reload register instead of two by reloading a sum of two pseudo +registers into a register. On the other hand, for number of RISC +processors offsets are limited so that often an intermediate address +needs to be generated in order to address a stack slot. By defining +@code{LEGITIMIZE_RELOAD_ADDRESS} appropriately, the intermediate addresses +generated for adjacent some stack slots can be made identical, and thus +be shared. + +@emph{Note}: This macro should be used with caution. It is necessary +to know something of how reload works in order to effectively use this, +and it is quite easy to produce macros that build in too much knowledge +of reload internals. + +@emph{Note}: This macro must be able to reload an address created by a +previous invocation of this macro. If it fails to handle such addresses +then the compiler may generate incorrect code or abort. + +@findex push_reload +The macro definition should use @code{push_reload} to indicate parts that +need reloading; @var{opnum}, @var{type} and @var{ind_levels} are usually +suitable to be passed unaltered to @code{push_reload}. + +The code generated by this macro must not alter the substructure of +@var{x}. If it transforms @var{x} into a more legitimate form, it +should assign @var{x} (which will always be a C variable) a new value. +This also applies to parts that you change indirectly by calling +@code{push_reload}. + +@findex strict_memory_address_p +The macro definition may use @code{strict_memory_address_p} to test if +the address has become legitimate. + +@findex copy_rtx +If you want to change only a part of @var{x}, one standard way of doing +this is to use @code{copy_rtx}. Note, however, that is unshares only a +single level of rtl. Thus, if the part to be changed is not at the +top level, you'll need to replace first the top level. +It is not necessary for this macro to come up with a legitimate +address; but often a machine-dependent strategy can generate better code. + +@findex GO_IF_MODE_DEPENDENT_ADDRESS +@item GO_IF_MODE_DEPENDENT_ADDRESS (@var{addr}, @var{label}) +A C statement or compound statement with a conditional @code{goto +@var{label};} executed if memory address @var{x} (an RTX) can have +different meanings depending on the machine mode of the memory +reference it is used for or if the address is valid for some modes +but not others. + +Autoincrement and autodecrement addresses typically have mode-dependent +effects because the amount of the increment or decrement is the size +of the operand being addressed. Some machines have other mode-dependent +addresses. Many RISC machines have no mode-dependent addresses. + +You may assume that @var{addr} is a valid address for the machine. + +@findex LEGITIMATE_CONSTANT_P +@item LEGITIMATE_CONSTANT_P (@var{x}) +A C expression that is nonzero if @var{x} is a legitimate constant for +an immediate operand on the target machine. You can assume that +@var{x} satisfies @code{CONSTANT_P}, so you need not check this. In fact, +@samp{1} is a suitable definition for this macro on machines where +anything @code{CONSTANT_P} is valid. +@end table + +@node Condition Code +@section Condition Code Status +@cindex condition code status + +@c prevent bad page break with this line +This describes the condition code status. + +@findex cc_status +The file @file{conditions.h} defines a variable @code{cc_status} to +describe how the condition code was computed (in case the interpretation of +the condition code depends on the instruction that it was set by). This +variable contains the RTL expressions on which the condition code is +currently based, and several standard flags. + +Sometimes additional machine-specific flags must be defined in the machine +description header file. It can also add additional machine-specific +information by defining @code{CC_STATUS_MDEP}. + +@table @code +@findex CC_STATUS_MDEP +@item CC_STATUS_MDEP +C code for a data type which is used for declaring the @code{mdep} +component of @code{cc_status}. It defaults to @code{int}. + +This macro is not used on machines that do not use @code{cc0}. + +@findex CC_STATUS_MDEP_INIT +@item CC_STATUS_MDEP_INIT +A C expression to initialize the @code{mdep} field to ``empty''. +The default definition does nothing, since most machines don't use +the field anyway. If you want to use the field, you should probably +define this macro to initialize it. + +This macro is not used on machines that do not use @code{cc0}. + +@findex NOTICE_UPDATE_CC +@item NOTICE_UPDATE_CC (@var{exp}, @var{insn}) +A C compound statement to set the components of @code{cc_status} +appropriately for an insn @var{insn} whose body is @var{exp}. It is +this macro's responsibility to recognize insns that set the condition +code as a byproduct of other activity as well as those that explicitly +set @code{(cc0)}. + +This macro is not used on machines that do not use @code{cc0}. + +If there are insns that do not set the condition code but do alter +other machine registers, this macro must check to see whether they +invalidate the expressions that the condition code is recorded as +reflecting. For example, on the 68000, insns that store in address +registers do not set the condition code, which means that usually +@code{NOTICE_UPDATE_CC} can leave @code{cc_status} unaltered for such +insns. But suppose that the previous insn set the condition code +based on location @samp{a4@@(102)} and the current insn stores a new +value in @samp{a4}. Although the condition code is not changed by +this, it will no longer be true that it reflects the contents of +@samp{a4@@(102)}. Therefore, @code{NOTICE_UPDATE_CC} must alter +@code{cc_status} in this case to say that nothing is known about the +condition code value. + +The definition of @code{NOTICE_UPDATE_CC} must be prepared to deal +with the results of peephole optimization: insns whose patterns are +@code{parallel} RTXs containing various @code{reg}, @code{mem} or +constants which are just the operands. The RTL structure of these +insns is not sufficient to indicate what the insns actually do. What +@code{NOTICE_UPDATE_CC} should do when it sees one is just to run +@code{CC_STATUS_INIT}. + +A possible definition of @code{NOTICE_UPDATE_CC} is to call a function +that looks at an attribute (@pxref{Insn Attributes}) named, for example, +@samp{cc}. This avoids having detailed information about patterns in +two places, the @file{md} file and in @code{NOTICE_UPDATE_CC}. + +@findex EXTRA_CC_MODES +@item EXTRA_CC_MODES +A list of additional modes for condition code values in registers +(@pxref{Jump Patterns}). This macro should expand to a sequence of +calls of the macro @code{CC} separated by white space. @code{CC} takes +two arguments. The first is the enumeration name of the mode, which +should begin with @samp{CC} and end with @samp{mode}. The second is a C +string giving the printable name of the mode; it should be the same as +the first argument, but with the trailing @samp{mode} removed. + +You should only define this macro if additional modes are required. + +A sample definition of @code{EXTRA_CC_MODES} is: +@smallexample +#define EXTRA_CC_MODES \ + CC(CC_NOOVmode, "CC_NOOV") \ + CC(CCFPmode, "CCFP") \ + CC(CCFPEmode, "CCFPE") +@end smallexample + +@findex SELECT_CC_MODE +@item SELECT_CC_MODE (@var{op}, @var{x}, @var{y}) +Returns a mode from class @code{MODE_CC} to be used when comparison +operation code @var{op} is applied to rtx @var{x} and @var{y}. For +example, on the Sparc, @code{SELECT_CC_MODE} is defined as (see +@pxref{Jump Patterns} for a description of the reason for this +definition) + +@smallexample +#define SELECT_CC_MODE(OP,X,Y) \ + (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ + ? ((OP == EQ || OP == NE) ? CCFPmode : CCFPEmode) \ + : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \ + || GET_CODE (X) == NEG) \ + ? CC_NOOVmode : CCmode)) +@end smallexample + +You need not define this macro if @code{EXTRA_CC_MODES} is not defined. + +@findex CANONICALIZE_COMPARISON +@item CANONICALIZE_COMPARISON (@var{code}, @var{op0}, @var{op1}) +On some machines not all possible comparisons are defined, but you can +convert an invalid comparison into a valid one. For example, the Alpha +does not have a @code{GT} comparison, but you can use an @code{LT} +comparison instead and swap the order of the operands. + +On such machines, define this macro to be a C statement to do any +required conversions. @var{code} is the initial comparison code +and @var{op0} and @var{op1} are the left and right operands of the +comparison, respectively. You should modify @var{code}, @var{op0}, and +@var{op1} as required. + +GCC will not assume that the comparison resulting from this macro is +valid but will see if the resulting insn matches a pattern in the +@file{md} file. + +You need not define this macro if it would never change the comparison +code or operands. + +@findex REVERSIBLE_CC_MODE +@item REVERSIBLE_CC_MODE (@var{mode}) +A C expression whose value is one if it is always safe to reverse a +comparison whose mode is @var{mode}. If @code{SELECT_CC_MODE} +can ever return @var{mode} for a floating-point inequality comparison, +then @code{REVERSIBLE_CC_MODE (@var{mode})} must be zero. + +You need not define this macro if it would always returns zero or if the +floating-point format is anything other than @code{IEEE_FLOAT_FORMAT}. +For example, here is the definition used on the Sparc, where floating-point +inequality comparisons are always given @code{CCFPEmode}: + +@smallexample +#define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) +@end smallexample + +@findex REVERSE_CONDITION (@var{code}, @var{mode}) +A C expression whose value is reversed condition code of the @var{code} for +comparison done in CC_MODE @var{mode}. The macro is used only in case +@code{REVERSIBLE_CC_MODE (@var{mode})} is nonzero. Define this macro in case +machine has some non-standard way how to reverse certain conditionals. For +instance in case all floating point conditions are non-trapping, compiler may +freely convert unordered compares to ordered one. Then definition may look +like: + +@smallexample +#define REVERSE_CONDITION(CODE, MODE) \ + ((MODE) != CCFPmode ? reverse_condition (CODE) \ + : reverse_condition_maybe_unordered (CODE)) +@end smallexample + +@findex REVERSE_CONDEXEC_PREDICATES_P +@item REVERSE_CONDEXEC_PREDICATES_P (@var{code1}, @var{code2}) +A C expression that returns true if the conditional execution predicate +@var{code1} is the inverse of @var{code2} and vice versa. Define this to +return 0 if the target has conditional execution predicates that cannot be +reversed safely. If no expansion is specified, this macro is defined as +follows: + +@smallexample +#define REVERSE_CONDEXEC_PREDICATES_P (x, y) \ + ((x) == reverse_condition (y)) +@end smallexample + +@end table + +@node Costs +@section Describing Relative Costs of Operations +@cindex costs of instructions +@cindex relative costs +@cindex speed of instructions + +These macros let you describe the relative speed of various operations +on the target machine. + +@table @code +@findex CONST_COSTS +@item CONST_COSTS (@var{x}, @var{code}, @var{outer_code}) +A part of a C @code{switch} statement that describes the relative costs +of constant RTL expressions. It must contain @code{case} labels for +expression codes @code{const_int}, @code{const}, @code{symbol_ref}, +@code{label_ref} and @code{const_double}. Each case must ultimately +reach a @code{return} statement to return the relative cost of the use +of that kind of constant value in an expression. The cost may depend on +the precise value of the constant, which is available for examination in +@var{x}, and the rtx code of the expression in which it is contained, +found in @var{outer_code}. + +@var{code} is the expression code---redundant, since it can be +obtained with @code{GET_CODE (@var{x})}. + +@findex RTX_COSTS +@findex COSTS_N_INSNS +@item RTX_COSTS (@var{x}, @var{code}, @var{outer_code}) +Like @code{CONST_COSTS} but applies to nonconstant RTL expressions. +This can be used, for example, to indicate how costly a multiply +instruction is. In writing this macro, you can use the construct +@code{COSTS_N_INSNS (@var{n})} to specify a cost equal to @var{n} fast +instructions. @var{outer_code} is the code of the expression in which +@var{x} is contained. + +This macro is optional; do not define it if the default cost assumptions +are adequate for the target machine. + +@findex DEFAULT_RTX_COSTS +@item DEFAULT_RTX_COSTS (@var{x}, @var{code}, @var{outer_code}) +This macro, if defined, is called for any case not handled by the +@code{RTX_COSTS} or @code{CONST_COSTS} macros. This eliminates the need +to put case labels into the macro, but the code, or any functions it +calls, must assume that the RTL in @var{x} could be of any type that has +not already been handled. The arguments are the same as for +@code{RTX_COSTS}, and the macro should execute a return statement giving +the cost of any RTL expressions that it can handle. The default cost +calculation is used for any RTL for which this macro does not return a +value. + +This macro is optional; do not define it if the default cost assumptions +are adequate for the target machine. + +@findex ADDRESS_COST +@item ADDRESS_COST (@var{address}) +An expression giving the cost of an addressing mode that contains +@var{address}. If not defined, the cost is computed from +the @var{address} expression and the @code{CONST_COSTS} values. + +For most CISC machines, the default cost is a good approximation of the +true cost of the addressing mode. However, on RISC machines, all +instructions normally have the same length and execution time. Hence +all addresses will have equal costs. + +In cases where more than one form of an address is known, the form with +the lowest cost will be used. If multiple forms have the same, lowest, +cost, the one that is the most complex will be used. + +For example, suppose an address that is equal to the sum of a register +and a constant is used twice in the same basic block. When this macro +is not defined, the address will be computed in a register and memory +references will be indirect through that register. On machines where +the cost of the addressing mode containing the sum is no higher than +that of a simple indirect reference, this will produce an additional +instruction and possibly require an additional register. Proper +specification of this macro eliminates this overhead for such machines. + +Similar use of this macro is made in strength reduction of loops. + +@var{address} need not be valid as an address. In such a case, the cost +is not relevant and can be any value; invalid addresses need not be +assigned a different cost. + +On machines where an address involving more than one register is as +cheap as an address computation involving only one register, defining +@code{ADDRESS_COST} to reflect this can cause two registers to be live +over a region of code where only one would have been if +@code{ADDRESS_COST} were not defined in that manner. This effect should +be considered in the definition of this macro. Equivalent costs should +probably only be given to addresses with different numbers of registers +on machines with lots of registers. + +This macro will normally either not be defined or be defined as a +constant. + +@findex REGISTER_MOVE_COST +@item REGISTER_MOVE_COST (@var{mode}, @var{from}, @var{to}) +A C expression for the cost of moving data of mode @var{mode} from a +register in class @var{from} to one in class @var{to}. The classes are +expressed using the enumeration values such as @code{GENERAL_REGS}. A +value of 2 is the default; other values are interpreted relative to +that. + +It is not required that the cost always equal 2 when @var{from} is the +same as @var{to}; on some machines it is expensive to move between +registers if they are not general registers. + +If reload sees an insn consisting of a single @code{set} between two +hard registers, and if @code{REGISTER_MOVE_COST} applied to their +classes returns a value of 2, reload does not check to ensure that the +constraints of the insn are met. Setting a cost of other than 2 will +allow reload to verify that the constraints are met. You should do this +if the @samp{mov@var{m}} pattern's constraints do not allow such copying. + +@findex MEMORY_MOVE_COST +@item MEMORY_MOVE_COST (@var{mode}, @var{class}, @var{in}) +A C expression for the cost of moving data of mode @var{mode} between a +register of class @var{class} and memory; @var{in} is zero if the value +is to be written to memory, nonzero if it is to be read in. This cost +is relative to those in @code{REGISTER_MOVE_COST}. If moving between +registers and memory is more expensive than between two registers, you +should define this macro to express the relative cost. + +If you do not define this macro, GCC uses a default cost of 4 plus +the cost of copying via a secondary reload register, if one is +needed. If your machine requires a secondary reload register to copy +between memory and a register of @var{class} but the reload mechanism is +more complex than copying via an intermediate, define this macro to +reflect the actual cost of the move. + +GCC defines the function @code{memory_move_secondary_cost} if +secondary reloads are needed. It computes the costs due to copying via +a secondary register. If your machine copies from memory using a +secondary register in the conventional way but the default base value of +4 is not correct for your machine, define this macro to add some other +value to the result of that function. The arguments to that function +are the same as to this macro. + +@findex BRANCH_COST +@item BRANCH_COST +A C expression for the cost of a branch instruction. A value of 1 is +the default; other values are interpreted relative to that. +@end table + +Here are additional macros which do not specify precise relative costs, +but only that certain actions are more expensive than GCC would +ordinarily expect. + +@table @code +@findex SLOW_BYTE_ACCESS +@item SLOW_BYTE_ACCESS +Define this macro as a C expression which is nonzero if accessing less +than a word of memory (i.e.@: a @code{char} or a @code{short}) is no +faster than accessing a word of memory, i.e., if such access +require more than one instruction or if there is no difference in cost +between byte and (aligned) word loads. + +When this macro is not defined, the compiler will access a field by +finding the smallest containing object; when it is defined, a fullword +load will be used if alignment permits. Unless bytes accesses are +faster than word accesses, using word accesses is preferable since it +may eliminate subsequent memory access if subsequent accesses occur to +other fields in the same word of the structure, but to different bytes. + +@findex SLOW_UNALIGNED_ACCESS +@item SLOW_UNALIGNED_ACCESS (@var{mode}, @var{alignment}) +Define this macro to be the value 1 if memory accesses described by the +@var{mode} and @var{alignment} parameters have a cost many times greater +than aligned accesses, for example if they are emulated in a trap +handler. + +When this macro is nonzero, the compiler will act as if +@code{STRICT_ALIGNMENT} were nonzero when generating code for block +moves. This can cause significantly more instructions to be produced. +Therefore, do not set this macro nonzero if unaligned accesses only add a +cycle or two to the time for a memory access. + +If the value of this macro is always zero, it need not be defined. If +this macro is defined, it should produce a nonzero value when +@code{STRICT_ALIGNMENT} is nonzero. + +@findex DONT_REDUCE_ADDR +@item DONT_REDUCE_ADDR +Define this macro to inhibit strength reduction of memory addresses. +(On some machines, such strength reduction seems to do harm rather +than good.) + +@findex MOVE_RATIO +@item MOVE_RATIO +The threshold of number of scalar memory-to-memory move insns, @emph{below} +which a sequence of insns should be generated instead of a +string move insn or a library call. Increasing the value will always +make code faster, but eventually incurs high cost in increased code size. + +Note that on machines where the corresponding move insn is a +@code{define_expand} that emits a sequence of insns, this macro counts +the number of such sequences. + +If you don't define this, a reasonable default is used. + +@findex MOVE_BY_PIECES_P +@item MOVE_BY_PIECES_P (@var{size}, @var{alignment}) +A C expression used to determine whether @code{move_by_pieces} will be used to +copy a chunk of memory, or whether some other block move mechanism +will be used. Defaults to 1 if @code{move_by_pieces_ninsns} returns less +than @code{MOVE_RATIO}. + +@findex MOVE_MAX_PIECES +@item MOVE_MAX_PIECES +A C expression used by @code{move_by_pieces} to determine the largest unit +a load or store used to copy memory is. Defaults to @code{MOVE_MAX}. + +@findex USE_LOAD_POST_INCREMENT +@item USE_LOAD_POST_INCREMENT (@var{mode}) +A C expression used to determine whether a load postincrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_POST_INCREMENT}. + +@findex USE_LOAD_POST_DECREMENT +@item USE_LOAD_POST_DECREMENT (@var{mode}) +A C expression used to determine whether a load postdecrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_POST_DECREMENT}. + +@findex USE_LOAD_PRE_INCREMENT +@item USE_LOAD_PRE_INCREMENT (@var{mode}) +A C expression used to determine whether a load preincrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_PRE_INCREMENT}. + +@findex USE_LOAD_PRE_DECREMENT +@item USE_LOAD_PRE_DECREMENT (@var{mode}) +A C expression used to determine whether a load predecrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_PRE_DECREMENT}. + +@findex USE_STORE_POST_INCREMENT +@item USE_STORE_POST_INCREMENT (@var{mode}) +A C expression used to determine whether a store postincrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_POST_INCREMENT}. + +@findex USE_STORE_POST_DECREMENT +@item USE_STORE_POST_DECREMENT (@var{mode}) +A C expression used to determine whether a store postdecrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_POST_DECREMENT}. + +@findex USE_STORE_PRE_INCREMENT +@item USE_STORE_PRE_INCREMENT (@var{mode}) +This macro is used to determine whether a store preincrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_PRE_INCREMENT}. + +@findex USE_STORE_PRE_DECREMENT +@item USE_STORE_PRE_DECREMENT (@var{mode}) +This macro is used to determine whether a store predecrement is a good +thing to use for a given mode. Defaults to the value of +@code{HAVE_PRE_DECREMENT}. + +@findex NO_FUNCTION_CSE +@item NO_FUNCTION_CSE +Define this macro if it is as good or better to call a constant +function address than to call an address kept in a register. + +@findex NO_RECURSIVE_FUNCTION_CSE +@item NO_RECURSIVE_FUNCTION_CSE +Define this macro if it is as good or better for a function to call +itself with an explicit address than to call an address kept in a +register. +@end table + +@node Scheduling +@section Adjusting the Instruction Scheduler + +The instruction scheduler may need a fair amount of machine-specific +adjustment in order to produce good code. GCC provides several target +hooks for this purpose. It is usually enough to define just a few of +them: try the first ones in this list first. + +@deftypefn {Target Hook} int TARGET_SCHED_ISSUE_RATE (void) +This hook returns the maximum number of instructions that can ever issue +at the same time on the target machine. The default is one. This value +must be constant over the entire compilation. If you need it to vary +depending on what the instructions are, you must use +@samp{TARGET_SCHED_VARIABLE_ISSUE}. +@end deftypefn + +@deftypefn {Target Hook} int TARGET_SCHED_VARIABLE_ISSUE (FILE *@var{file}, int @var{verbose}, rtx @var{insn}, int @var{more}) +This hook is executed by the scheduler after it has scheduled an insn +from the ready list. It should return the number of insns which can +still be issued in the current cycle. Normally this is +@samp{@w{@var{more} - 1}}. You should define this hook if some insns +take more machine resources than others, so that fewer insns can follow +them in the same cycle. @var{file} is either a null pointer, or a stdio +stream to write any debug output to. @var{verbose} is the verbose level +provided by @option{-fsched-verbose-@var{n}}. @var{insn} is the +instruction that was scheduled. +@end deftypefn + +@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx @var{insn}, rtx @var{link}, rtx @var{dep_insn}, int @var{cost}) +This function corrects the value of @var{cost} based on the relationship +between @var{insn} and @var{dep_insn} through the dependence @var{link}. +It should return the new value. The default is to make no adjustment to +@var{cost}. This can be used for example to specify to the scheduler +that an output- or anti-dependence does not incur the same cost as a +data-dependence. +@end deftypefn + +@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_PRIORITY (rtx @var{insn}, int @var{priority}) +This hook adjusts the integer scheduling priority @var{priority} of +@var{insn}. It should return the new priority. Reduce the priority to +execute @var{insn} earlier, increase the priority to execute @var{insn} +later. Do not define this hook if you do not need to adjust the +scheduling priorities of insns. +@end deftypefn + +@deftypefn {Target Hook} int TARGET_SCHED_REORDER (FILE *@var{file}, int @var{verbose}, rtx *@var{ready}, int *@var{n_readyp}, int @var{clock}) +This hook is executed by the scheduler after it has scheduled the ready +list, to allow the machine description to reorder it (for example to +combine two small instructions together on @samp{VLIW} machines). +@var{file} is either a null pointer, or a stdio stream to write any +debug output to. @var{verbose} is the verbose level provided by +@option{-fsched-verbose-@var{n}}. @var{ready} is a pointer to the ready +list of instructions that are ready to be scheduled. @var{n_readyp} is +a pointer to the number of elements in the ready list. The scheduler +reads the ready list in reverse order, starting with +@var{ready}[@var{*n_readyp}-1] and going to @var{ready}[0]. @var{clock} +is the timer tick of the scheduler. You may modify the ready list and +the number of ready insns. The return value is the number of insns that +can issue this cycle; normally this is just @code{issue_rate}. See also +@samp{TARGET_SCHED_REORDER2}. +@end deftypefn + +@deftypefn {Target Hook} int TARGET_SCHED_REORDER2 (FILE *@var{file}, int @var{verbose}, rtx *@var{ready}, int *@var{n_ready}, @var{clock}) +Like @samp{TARGET_SCHED_REORDER}, but called at a different time. That +function is called whenever the scheduler starts a new cycle. This one +is called once per iteration over a cycle, immediately after +@samp{TARGET_SCHED_VARIABLE_ISSUE}; it can reorder the ready list and +return the number of insns to be scheduled in the same cycle. Defining +this hook can be useful if there are frequent situations where +scheduling one insn causes other insns to become ready in the same +cycle. These other insns can then be taken into account properly. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_SCHED_INIT (FILE *@var{file}, int @var{verbose}, int @var{max_ready}) +This hook is executed by the scheduler at the beginning of each block of +instructions that are to be scheduled. @var{file} is either a null +pointer, or a stdio stream to write any debug output to. @var{verbose} +is the verbose level provided by @option{-fsched-verbose-@var{n}}. +@var{max_ready} is the maximum number of insns in the current scheduling +region that can be live at the same time. This can be used to allocate +scratch space if it is needed, e.g. by @samp{TARGET_SCHED_REORDER}. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_SCHED_FINISH (FILE *@var{file}, int @var{verbose}) +This hook is executed by the scheduler at the end of each block of +instructions that are to be scheduled. It can be used to perform +cleanup of any actions done by the other scheduling hooks. @var{file} +is either a null pointer, or a stdio stream to write any debug output +to. @var{verbose} is the verbose level provided by +@option{-fsched-verbose-@var{n}}. +@end deftypefn + +@deftypefn {Target Hook} rtx TARGET_SCHED_CYCLE_DISPLAY (int @var{clock}, rtx @var{last}) +This hook is called in verbose mode only, at the beginning of each pass +over a basic block. It should insert an insn into the chain after +@var{last}, which has no effect, but records the value @var{clock} in +RTL dumps and assembly output. Define this hook only if you need this +level of detail about what the scheduler is doing. +@end deftypefn + +@node Sections +@section Dividing the Output into Sections (Texts, Data, @dots{}) +@c the above section title is WAY too long. maybe cut the part between +@c the (...)? --mew 10feb93 + +An object file is divided into sections containing different types of +data. In the most common case, there are three sections: the @dfn{text +section}, which holds instructions and read-only data; the @dfn{data +section}, which holds initialized writable data; and the @dfn{bss +section}, which holds uninitialized data. Some systems have other kinds +of sections. + +The compiler must tell the assembler when to switch sections. These +macros control what commands to output to tell the assembler this. You +can also define additional sections. + +@table @code +@findex TEXT_SECTION_ASM_OP +@item TEXT_SECTION_ASM_OP +A C expression whose value is a string, including spacing, containing the +assembler operation that should precede instructions and read-only data. +Normally @code{"\t.text"} is right. + +@findex TEXT_SECTION +@item TEXT_SECTION +A C statement that switches to the default section containing instructions. +Normally this is not needed, as simply defining @code{TEXT_SECTION_ASM_OP} +is enough. The MIPS port uses this to sort all functions after all data +declarations. + +@findex DATA_SECTION_ASM_OP +@item DATA_SECTION_ASM_OP +A C expression whose value is a string, including spacing, containing the +assembler operation to identify the following data as writable initialized +data. Normally @code{"\t.data"} is right. + +@findex SHARED_SECTION_ASM_OP +@item SHARED_SECTION_ASM_OP +If defined, a C expression whose value is a string, including spacing, +containing the assembler operation to identify the following data as +shared data. If not defined, @code{DATA_SECTION_ASM_OP} will be used. + +@findex BSS_SECTION_ASM_OP +@item BSS_SECTION_ASM_OP +If defined, a C expression whose value is a string, including spacing, +containing the assembler operation to identify the following data as +uninitialized global data. If not defined, and neither +@code{ASM_OUTPUT_BSS} nor @code{ASM_OUTPUT_ALIGNED_BSS} are defined, +uninitialized global data will be output in the data section if +@option{-fno-common} is passed, otherwise @code{ASM_OUTPUT_COMMON} will be +used. + +@findex SHARED_BSS_SECTION_ASM_OP +@item SHARED_BSS_SECTION_ASM_OP +If defined, a C expression whose value is a string, including spacing, +containing the assembler operation to identify the following data as +uninitialized global shared data. If not defined, and +@code{BSS_SECTION_ASM_OP} is, the latter will be used. + +@findex INIT_SECTION_ASM_OP +@item INIT_SECTION_ASM_OP +If defined, a C expression whose value is a string, including spacing, +containing the assembler operation to identify the following data as +initialization code. If not defined, GCC will assume such a section does +not exist. + +@findex FINI_SECTION_ASM_OP +@item FINI_SECTION_ASM_OP +If defined, a C expression whose value is a string, including spacing, +containing the assembler operation to identify the following data as +finalization code. If not defined, GCC will assume such a section does +not exist. + +@findex CRT_CALL_STATIC_FUNCTION +@item CRT_CALL_STATIC_FUNCTION (@var{section_op}, @var{function}) +If defined, an ASM statement that switches to a different section +via @var{section_op}, calls @var{function}, and switches back to +the text section. This is used in @file{crtstuff.c} if +@code{INIT_SECTION_ASM_OP} or @code{FINI_SECTION_ASM_OP} to calls +to initialization and finalization functions from the init and fini +sections. By default, this macro uses a simple function call. Some +ports need hand-crafted assembly code to avoid dependencies on +registers initialized in the function prologue or to ensure that +constant pools don't end up too far way in the text section. + +@findex FORCE_CODE_SECTION_ALIGN +@item FORCE_CODE_SECTION_ALIGN +If defined, an ASM statement that aligns a code section to some +arbitrary boundary. This is used to force all fragments of the +@code{.init} and @code{.fini} sections to have to same alignment +and thus prevent the linker from having to add any padding. + +@findex EXTRA_SECTIONS +@findex in_text +@findex in_data +@item EXTRA_SECTIONS +A list of names for sections other than the standard two, which are +@code{in_text} and @code{in_data}. You need not define this macro +on a system with no other sections (that GCC needs to use). + +@findex EXTRA_SECTION_FUNCTIONS +@findex text_section +@findex data_section +@item EXTRA_SECTION_FUNCTIONS +One or more functions to be defined in @file{varasm.c}. These +functions should do jobs analogous to those of @code{text_section} and +@code{data_section}, for your additional sections. Do not define this +macro if you do not define @code{EXTRA_SECTIONS}. + +@findex READONLY_DATA_SECTION +@item READONLY_DATA_SECTION +On most machines, read-only variables, constants, and jump tables are +placed in the text section. If this is not the case on your machine, +this macro should be defined to be the name of a function (either +@code{data_section} or a function defined in @code{EXTRA_SECTIONS}) that +switches to the section to be used for read-only items. + +If these items should be placed in the text section, this macro should +not be defined. + +@findex SELECT_SECTION +@item SELECT_SECTION (@var{exp}, @var{reloc}, @var{align}) +A C statement or statements to switch to the appropriate section for +output of @var{exp}. You can assume that @var{exp} is either a +@code{VAR_DECL} node or a constant of some sort. @var{reloc} +indicates whether the initial value of @var{exp} requires link-time +relocations. Bit 1 is set when variable contains local relocations +only, while bit 2 is set for global relocations. +Select the section by calling @code{text_section} or one +of the alternatives for other sections. @var{align} is the constant +alignment in bits. + +Do not define this macro if you put all read-only variables and +constants in the read-only data section (usually the text section). + +@findex SELECT_RTX_SECTION +@item SELECT_RTX_SECTION (@var{mode}, @var{rtx}, @var{align}) +A C statement or statements to switch to the appropriate section for +output of @var{rtx} in mode @var{mode}. You can assume that @var{rtx} +is some kind of constant in RTL@. The argument @var{mode} is redundant +except in the case of a @code{const_int} rtx. Select the section by +calling @code{text_section} or one of the alternatives for other +sections. @var{align} is the constant alignment in bits. + +Do not define this macro if you put all constants in the read-only +data section. + +@findex JUMP_TABLES_IN_TEXT_SECTION +@item JUMP_TABLES_IN_TEXT_SECTION +Define this macro to be an expression with a nonzero value if jump +tables (for @code{tablejump} insns) should be output in the text +section, along with the assembler instructions. Otherwise, the +readonly data section is used. + +This macro is irrelevant if there is no separate readonly data section. + +@findex ENCODE_SECTION_INFO +@item ENCODE_SECTION_INFO (@var{decl}) +Define this macro if references to a symbol or a constant must be +treated differently depending on something about the variable or +function named by the symbol (such as what section it is in). + +The macro definition, if any, is executed under two circumstances. One +is immediately after the rtl for @var{decl} that represents a variable +or a function has been created and stored in @code{DECL_RTL +(@var{decl})}. The value of the rtl will be a @code{mem} whose address +is a @code{symbol_ref}. The other is immediately after the rtl for +@var{decl} that represents a constant has been created and stored in +@code{TREE_CST_RTL (@var{decl})}. The macro is called once for each +distinct constant in a source file. + +@cindex @code{SYMBOL_REF_FLAG}, in @code{ENCODE_SECTION_INFO} +The usual thing for this macro to do is to record a flag in the +@code{symbol_ref} (such as @code{SYMBOL_REF_FLAG}) or to store a +modified name string in the @code{symbol_ref} (if one bit is not enough +information). + +@findex STRIP_NAME_ENCODING +@item STRIP_NAME_ENCODING (@var{var}, @var{sym_name}) +Decode @var{sym_name} and store the real name part in @var{var}, sans +the characters that encode section info. Define this macro if +@code{ENCODE_SECTION_INFO} alters the symbol's name string. + +@findex UNIQUE_SECTION +@item UNIQUE_SECTION (@var{decl}, @var{reloc}) +A C statement to build up a unique section name, expressed as a +@code{STRING_CST} node, and assign it to @samp{DECL_SECTION_NAME (@var{decl})}. +@var{reloc} indicates whether the initial value of @var{exp} requires +link-time relocations. If you do not define this macro, GCC will use +the symbol name prefixed by @samp{.} as the section name. Note - this +macro can now be called for uninitialized data items as well as +initialized data and functions. +@end table + +@node PIC +@section Position Independent Code +@cindex position independent code +@cindex PIC + +This section describes macros that help implement generation of position +independent code. Simply defining these macros is not enough to +generate valid PIC; you must also add support to the macros +@code{GO_IF_LEGITIMATE_ADDRESS} and @code{PRINT_OPERAND_ADDRESS}, as +well as @code{LEGITIMIZE_ADDRESS}. You must modify the definition of +@samp{movsi} to do something appropriate when the source operand +contains a symbolic address. You may also need to alter the handling of +switch statements so that they use relative addresses. +@c i rearranged the order of the macros above to try to force one of +@c them to the next line, to eliminate an overfull hbox. --mew 10feb93 + +@table @code +@findex PIC_OFFSET_TABLE_REGNUM +@item PIC_OFFSET_TABLE_REGNUM +The register number of the register used to address a table of static +data addresses in memory. In some cases this register is defined by a +processor's ``application binary interface'' (ABI)@. When this macro +is defined, RTL is generated for this register once, as with the stack +pointer and frame pointer registers. If this macro is not defined, it +is up to the machine-dependent files to allocate such a register (if +necessary). Note that this register must be fixed when in use (e.g.@: +when @code{flag_pic} is true). + +@findex PIC_OFFSET_TABLE_REG_CALL_CLOBBERED +@item PIC_OFFSET_TABLE_REG_CALL_CLOBBERED +Define this macro if the register defined by +@code{PIC_OFFSET_TABLE_REGNUM} is clobbered by calls. Do not define +this macro if @code{PIC_OFFSET_TABLE_REGNUM} is not defined. + +@findex FINALIZE_PIC +@item FINALIZE_PIC +By generating position-independent code, when two different programs (A +and B) share a common library (libC.a), the text of the library can be +shared whether or not the library is linked at the same address for both +programs. In some of these environments, position-independent code +requires not only the use of different addressing modes, but also +special code to enable the use of these addressing modes. + +The @code{FINALIZE_PIC} macro serves as a hook to emit these special +codes once the function is being compiled into assembly code, but not +before. (It is not done before, because in the case of compiling an +inline function, it would lead to multiple PIC prologues being +included in functions which used inline functions and were compiled to +assembly language.) + +@findex LEGITIMATE_PIC_OPERAND_P +@item LEGITIMATE_PIC_OPERAND_P (@var{x}) +A C expression that is nonzero if @var{x} is a legitimate immediate +operand on the target machine when generating position independent code. +You can assume that @var{x} satisfies @code{CONSTANT_P}, so you need not +check this. You can also assume @var{flag_pic} is true, so you need not +check it either. You need not define this macro if all constants +(including @code{SYMBOL_REF}) can be immediate operands when generating +position independent code. +@end table + +@node Assembler Format +@section Defining the Output Assembler Language + +This section describes macros whose principal purpose is to describe how +to write instructions in assembler language---rather than what the +instructions do. + +@menu +* File Framework:: Structural information for the assembler file. +* Data Output:: Output of constants (numbers, strings, addresses). +* Uninitialized Data:: Output of uninitialized variables. +* Label Output:: Output and generation of labels. +* Initialization:: General principles of initialization + and termination routines. +* Macros for Initialization:: + Specific macros that control the handling of + initialization and termination routines. +* Instruction Output:: Output of actual instructions. +* Dispatch Tables:: Output of jump tables. +* Exception Region Output:: Output of exception region code. +* Alignment Output:: Pseudo ops for alignment and skipping data. +@end menu + +@node File Framework +@subsection The Overall Framework of an Assembler File +@cindex assembler format +@cindex output of assembler code + +@c prevent bad page break with this line +This describes the overall framework of an assembler file. + +@table @code +@findex ASM_FILE_START +@item ASM_FILE_START (@var{stream}) +A C expression which outputs to the stdio stream @var{stream} +some appropriate text to go at the start of an assembler file. + +Normally this macro is defined to output a line containing +@samp{#NO_APP}, which is a comment that has no effect on most +assemblers but tells the GNU assembler that it can save time by not +checking for certain assembler constructs. + +On systems that use SDB, it is necessary to output certain commands; +see @file{attasm.h}. + +@findex ASM_FILE_END +@item ASM_FILE_END (@var{stream}) +A C expression which outputs to the stdio stream @var{stream} +some appropriate text to go at the end of an assembler file. + +If this macro is not defined, the default is to output nothing +special at the end of the file. Most systems don't require any +definition. + +On systems that use SDB, it is necessary to output certain commands; +see @file{attasm.h}. + +@findex ASM_COMMENT_START +@item ASM_COMMENT_START +A C string constant describing how to begin a comment in the target +assembler language. The compiler assumes that the comment will end at +the end of the line. + +@findex ASM_APP_ON +@item ASM_APP_ON +A C string constant for text to be output before each @code{asm} +statement or group of consecutive ones. Normally this is +@code{"#APP"}, which is a comment that has no effect on most +assemblers but tells the GNU assembler that it must check the lines +that follow for all valid assembler constructs. + +@findex ASM_APP_OFF +@item ASM_APP_OFF +A C string constant for text to be output after each @code{asm} +statement or group of consecutive ones. Normally this is +@code{"#NO_APP"}, which tells the GNU assembler to resume making the +time-saving assumptions that are valid for ordinary compiler output. + +@findex ASM_OUTPUT_SOURCE_FILENAME +@item ASM_OUTPUT_SOURCE_FILENAME (@var{stream}, @var{name}) +A C statement to output COFF information or DWARF debugging information +which indicates that filename @var{name} is the current source file to +the stdio stream @var{stream}. + +This macro need not be defined if the standard form of output +for the file format in use is appropriate. + +@findex OUTPUT_QUOTED_STRING +@item OUTPUT_QUOTED_STRING (@var{stream}, @var{string}) +A C statement to output the string @var{string} to the stdio stream +@var{stream}. If you do not call the function @code{output_quoted_string} +in your config files, GCC will only call it to output filenames to +the assembler source. So you can use it to canonicalize the format +of the filename using this macro. + +@findex ASM_OUTPUT_SOURCE_LINE +@item ASM_OUTPUT_SOURCE_LINE (@var{stream}, @var{line}) +A C statement to output DBX or SDB debugging information before code +for line number @var{line} of the current source file to the +stdio stream @var{stream}. + +This macro need not be defined if the standard form of debugging +information for the debugger in use is appropriate. + +@findex ASM_OUTPUT_IDENT +@item ASM_OUTPUT_IDENT (@var{stream}, @var{string}) +A C statement to output something to the assembler file to handle a +@samp{#ident} directive containing the text @var{string}. If this +macro is not defined, nothing is output for a @samp{#ident} directive. + +@findex OBJC_PROLOGUE +@item OBJC_PROLOGUE +A C statement to output any assembler statements which are required to +precede any Objective-C object definitions or message sending. The +statement is executed only when compiling an Objective-C program. +@end table + +@deftypefn {Target Hook} void TARGET_ASM_NAMED_SECTION (const char *@var{name}, unsigned int @var{flags}, unsigned int @var{align}) +Output assembly directives to switch to section @var{name}. The section +should have attributes as specified by @var{flags}, which is a bit mask +of the @code{SECTION_*} flags defined in @file{output.h}. If @var{align} +is nonzero, it contains an alignment in bytes to be used for the section, +otherwise some target default should be used. Only targets that must +specify an alignment within the section directive need pay attention to +@var{align} -- we will still use @code{ASM_OUTPUT_ALIGN}. +@end deftypefn + +@deftypefn {Target Hook} bool TARGET_HAVE_NAMED_SECTIONS +This flag is true if the target supports @code{TARGET_ASM_NAMED_SECTION}. +@end deftypefn + +@deftypefn {Target Hook} {unsigned int} TARGET_SECTION_TYPE_FLAGS (tree @var{decl}, const char *@var{name}, int @var{reloc}) +Choose a set of section attributes for use by @code{TARGET_ASM_NAMED_SECTION} +based on a variable or function decl, a section name, and whether or not the +declaration's initializer may contain runtime relocations. @var{decl} may be + null, in which case read-write data should be assumed. + +The default version if this function handles choosing code vs data, +read-only vs read-write data, and @code{flag_pic}. You should only +need to override this if your target has special flags that might be +set via @code{__attribute__}. +@end deftypefn + +@need 2000 +@node Data Output +@subsection Output of Data + + +@deftypevr {Target Hook} {const char *} TARGET_ASM_BYTE_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_HI_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_SI_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_DI_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_ALIGNED_TI_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_HI_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_SI_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_DI_OP +@deftypevrx {Target Hook} {const char *} TARGET_ASM_UNALIGNED_TI_OP +These hooks specify assembly directives for creating certain kinds +of integer object. The @code{TARGET_ASM_BYTE_OP} directive creates a +byte-sized object, the @code{TARGET_ASM_ALIGNED_HI_OP} one creates an +aligned two-byte object, and so on. Any of the hooks may be +@code{NULL}, indicating that no suitable directive is available. + +The compiler will print these strings at the start of a new line, +followed immediately by the object's initial value. In most cases, +the string should contain a tab, a pseudo-op, and then another tab. +@end deftypevr + +@deftypefn {Target Hook} bool TARGET_ASM_INTEGER (rtx @var{x}, unsigned int @var{size}, int @var{aligned_p}) +The @code{assemble_integer} function uses this hook to output an +integer object. @var{x} is the object's value, @var{size} is its size +in bytes and @var{aligned_p} indicates whether it is aligned. The +function should return @code{true} if it was able to output the +object. If it returns false, @code{assemble_integer} will try to +split the object into smaller parts. + +The default implementation of this hook will use the +@code{TARGET_ASM_BYTE_OP} family of strings, returning @code{false} +when the relevant string is @code{NULL}. +@end deftypefn + +@table @code +@findex OUTPUT_ADDR_CONST_EXTRA +@item OUTPUT_ADDR_CONST_EXTRA (@var{stream}, @var{x}, @var{fail}) +A C statement to recognize @var{rtx} patterns that +@code{output_addr_const} can't deal with, and output assembly code to +@var{stream} corresponding to the pattern @var{x}. This may be used to +allow machine-dependent @code{UNSPEC}s to appear within constants. + +If @code{OUTPUT_ADDR_CONST_EXTRA} fails to recognize a pattern, it must +@code{goto fail}, so that a standard error message is printed. If it +prints an error message itself, by calling, for example, +@code{output_operand_lossage}, it may just complete normally. + +@findex ASM_OUTPUT_ASCII +@item ASM_OUTPUT_ASCII (@var{stream}, @var{ptr}, @var{len}) +A C statement to output to the stdio stream @var{stream} an assembler +instruction to assemble a string constant containing the @var{len} +bytes at @var{ptr}. @var{ptr} will be a C expression of type +@code{char *} and @var{len} a C expression of type @code{int}. + +If the assembler has a @code{.ascii} pseudo-op as found in the +Berkeley Unix assembler, do not define the macro +@code{ASM_OUTPUT_ASCII}. + +@findex ASM_OUTPUT_FDESC +@item ASM_OUTPUT_FDESC (@var{stream}, @var{decl}, @var{n}) +A C statement to output word @var{n} of a function descriptor for +@var{decl}. This must be defined if @code{TARGET_VTABLE_USES_DESCRIPTORS} +is defined, and is otherwise unused. + +@findex CONSTANT_POOL_BEFORE_FUNCTION +@item CONSTANT_POOL_BEFORE_FUNCTION +You may define this macro as a C expression. You should define the +expression to have a nonzero value if GCC should output the constant +pool for a function before the code for the function, or a zero value if +GCC should output the constant pool after the function. If you do +not define this macro, the usual case, GCC will output the constant +pool before the function. + +@findex ASM_OUTPUT_POOL_PROLOGUE +@item ASM_OUTPUT_POOL_PROLOGUE (@var{file}, @var{funname}, @var{fundecl}, @var{size}) +A C statement to output assembler commands to define the start of the +constant pool for a function. @var{funname} is a string giving +the name of the function. Should the return type of the function +be required, it can be obtained via @var{fundecl}. @var{size} +is the size, in bytes, of the constant pool that will be written +immediately after this call. + +If no constant-pool prefix is required, the usual case, this macro need +not be defined. + +@findex ASM_OUTPUT_SPECIAL_POOL_ENTRY +@item ASM_OUTPUT_SPECIAL_POOL_ENTRY (@var{file}, @var{x}, @var{mode}, @var{align}, @var{labelno}, @var{jumpto}) +A C statement (with or without semicolon) to output a constant in the +constant pool, if it needs special treatment. (This macro need not do +anything for RTL expressions that can be output normally.) + +The argument @var{file} is the standard I/O stream to output the +assembler code on. @var{x} is the RTL expression for the constant to +output, and @var{mode} is the machine mode (in case @var{x} is a +@samp{const_int}). @var{align} is the required alignment for the value +@var{x}; you should output an assembler directive to force this much +alignment. + +The argument @var{labelno} is a number to use in an internal label for +the address of this pool entry. The definition of this macro is +responsible for outputting the label definition at the proper place. +Here is how to do this: + +@example +ASM_OUTPUT_INTERNAL_LABEL (@var{file}, "LC", @var{labelno}); +@end example + +When you output a pool entry specially, you should end with a +@code{goto} to the label @var{jumpto}. This will prevent the same pool +entry from being output a second time in the usual manner. + +You need not define this macro if it would do nothing. + +@findex CONSTANT_AFTER_FUNCTION_P +@item CONSTANT_AFTER_FUNCTION_P (@var{exp}) +Define this macro as a C expression which is nonzero if the constant +@var{exp}, of type @code{tree}, should be output after the code for a +function. The compiler will normally output all constants before the +function; you need not define this macro if this is OK@. + +@findex ASM_OUTPUT_POOL_EPILOGUE +@item ASM_OUTPUT_POOL_EPILOGUE (@var{file} @var{funname} @var{fundecl} @var{size}) +A C statement to output assembler commands to at the end of the constant +pool for a function. @var{funname} is a string giving the name of the +function. Should the return type of the function be required, you can +obtain it via @var{fundecl}. @var{size} is the size, in bytes, of the +constant pool that GCC wrote immediately before this call. + +If no constant-pool epilogue is required, the usual case, you need not +define this macro. + +@findex IS_ASM_LOGICAL_LINE_SEPARATOR +@item IS_ASM_LOGICAL_LINE_SEPARATOR (@var{C}) +Define this macro as a C expression which is nonzero if @var{C} is +used as a logical line separator by the assembler. + +If you do not define this macro, the default is that only +the character @samp{;} is treated as a logical line separator. +@end table + +@deftypevr {Target Hook} {const char *} TARGET_ASM_OPEN_PAREN +@deftypevrx {Target Hook} {const char *} TARGET_ASM_CLOSE_PAREN +These target hooks are C string constants, describing the syntax in the +assembler for grouping arithmetic expressions. If not overridden, they +default to normal parentheses, which is correct for most assemblers. +@end deftypevr + + These macros are provided by @file{real.h} for writing the definitions +of @code{ASM_OUTPUT_DOUBLE} and the like: + +@table @code +@item REAL_VALUE_TO_TARGET_SINGLE (@var{x}, @var{l}) +@itemx REAL_VALUE_TO_TARGET_DOUBLE (@var{x}, @var{l}) +@itemx REAL_VALUE_TO_TARGET_LONG_DOUBLE (@var{x}, @var{l}) +@findex REAL_VALUE_TO_TARGET_SINGLE +@findex REAL_VALUE_TO_TARGET_DOUBLE +@findex REAL_VALUE_TO_TARGET_LONG_DOUBLE +These translate @var{x}, of type @code{REAL_VALUE_TYPE}, to the target's +floating point representation, and store its bit pattern in the array of +@code{long int} whose address is @var{l}. The number of elements in the +output array is determined by the size of the desired target floating +point data type: 32 bits of it go in each @code{long int} array +element. Each array element holds 32 bits of the result, even if +@code{long int} is wider than 32 bits on the host machine. + +The array element values are designed so that you can print them out +using @code{fprintf} in the order they should appear in the target +machine's memory. + +@item REAL_VALUE_TO_DECIMAL (@var{x}, @var{format}, @var{string}) +@findex REAL_VALUE_TO_DECIMAL +This macro converts @var{x}, of type @code{REAL_VALUE_TYPE}, to a +decimal number and stores it as a string into @var{string}. +You must pass, as @var{string}, the address of a long enough block +of space to hold the result. + +The argument @var{format} is a @code{printf}-specification that serves +as a suggestion for how to format the output string. +@end table + +@node Uninitialized Data +@subsection Output of Uninitialized Variables + +Each of the macros in this section is used to do the whole job of +outputting a single uninitialized variable. + +@table @code +@findex ASM_OUTPUT_COMMON +@item ASM_OUTPUT_COMMON (@var{stream}, @var{name}, @var{size}, @var{rounded}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} the assembler definition of a common-label named +@var{name} whose size is @var{size} bytes. The variable @var{rounded} +is the size rounded up to whatever alignment the caller wants. + +Use the expression @code{assemble_name (@var{stream}, @var{name})} to +output the name itself; before and after that, output the additional +assembler syntax for defining the name, and a newline. + +This macro controls how the assembler definitions of uninitialized +common global variables are output. + +@findex ASM_OUTPUT_ALIGNED_COMMON +@item ASM_OUTPUT_ALIGNED_COMMON (@var{stream}, @var{name}, @var{size}, @var{alignment}) +Like @code{ASM_OUTPUT_COMMON} except takes the required alignment as a +separate, explicit argument. If you define this macro, it is used in +place of @code{ASM_OUTPUT_COMMON}, and gives you more flexibility in +handling the required alignment of the variable. The alignment is specified +as the number of bits. + +@findex ASM_OUTPUT_ALIGNED_DECL_COMMON +@item ASM_OUTPUT_ALIGNED_DECL_COMMON (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment}) +Like @code{ASM_OUTPUT_ALIGNED_COMMON} except that @var{decl} of the +variable to be output, if there is one, or @code{NULL_TREE} if there +is no corresponding variable. If you define this macro, GCC will use it +in place of both @code{ASM_OUTPUT_COMMON} and +@code{ASM_OUTPUT_ALIGNED_COMMON}. Define this macro when you need to see +the variable's decl in order to chose what to output. + +@findex ASM_OUTPUT_SHARED_COMMON +@item ASM_OUTPUT_SHARED_COMMON (@var{stream}, @var{name}, @var{size}, @var{rounded}) +If defined, it is similar to @code{ASM_OUTPUT_COMMON}, except that it +is used when @var{name} is shared. If not defined, @code{ASM_OUTPUT_COMMON} +will be used. + +@findex ASM_OUTPUT_BSS +@item ASM_OUTPUT_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{rounded}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} the assembler definition of uninitialized global @var{decl} named +@var{name} whose size is @var{size} bytes. The variable @var{rounded} +is the size rounded up to whatever alignment the caller wants. + +Try to use function @code{asm_output_bss} defined in @file{varasm.c} when +defining this macro. If unable, use the expression +@code{assemble_name (@var{stream}, @var{name})} to output the name itself; +before and after that, output the additional assembler syntax for defining +the name, and a newline. + +This macro controls how the assembler definitions of uninitialized global +variables are output. This macro exists to properly support languages like +C++ which do not have @code{common} data. However, this macro currently +is not defined for all targets. If this macro and +@code{ASM_OUTPUT_ALIGNED_BSS} are not defined then @code{ASM_OUTPUT_COMMON} +or @code{ASM_OUTPUT_ALIGNED_COMMON} or +@code{ASM_OUTPUT_ALIGNED_DECL_COMMON} is used. + +@findex ASM_OUTPUT_ALIGNED_BSS +@item ASM_OUTPUT_ALIGNED_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment}) +Like @code{ASM_OUTPUT_BSS} except takes the required alignment as a +separate, explicit argument. If you define this macro, it is used in +place of @code{ASM_OUTPUT_BSS}, and gives you more flexibility in +handling the required alignment of the variable. The alignment is specified +as the number of bits. + +Try to use function @code{asm_output_aligned_bss} defined in file +@file{varasm.c} when defining this macro. + +@findex ASM_OUTPUT_SHARED_BSS +@item ASM_OUTPUT_SHARED_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{rounded}) +If defined, it is similar to @code{ASM_OUTPUT_BSS}, except that it +is used when @var{name} is shared. If not defined, @code{ASM_OUTPUT_BSS} +will be used. + +@findex ASM_OUTPUT_LOCAL +@item ASM_OUTPUT_LOCAL (@var{stream}, @var{name}, @var{size}, @var{rounded}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} the assembler definition of a local-common-label named +@var{name} whose size is @var{size} bytes. The variable @var{rounded} +is the size rounded up to whatever alignment the caller wants. + +Use the expression @code{assemble_name (@var{stream}, @var{name})} to +output the name itself; before and after that, output the additional +assembler syntax for defining the name, and a newline. + +This macro controls how the assembler definitions of uninitialized +static variables are output. + +@findex ASM_OUTPUT_ALIGNED_LOCAL +@item ASM_OUTPUT_ALIGNED_LOCAL (@var{stream}, @var{name}, @var{size}, @var{alignment}) +Like @code{ASM_OUTPUT_LOCAL} except takes the required alignment as a +separate, explicit argument. If you define this macro, it is used in +place of @code{ASM_OUTPUT_LOCAL}, and gives you more flexibility in +handling the required alignment of the variable. The alignment is specified +as the number of bits. + +@findex ASM_OUTPUT_ALIGNED_DECL_LOCAL +@item ASM_OUTPUT_ALIGNED_DECL_LOCAL (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment}) +Like @code{ASM_OUTPUT_ALIGNED_DECL} except that @var{decl} of the +variable to be output, if there is one, or @code{NULL_TREE} if there +is no corresponding variable. If you define this macro, GCC will use it +in place of both @code{ASM_OUTPUT_DECL} and +@code{ASM_OUTPUT_ALIGNED_DECL}. Define this macro when you need to see +the variable's decl in order to chose what to output. + +@findex ASM_OUTPUT_SHARED_LOCAL +@item ASM_OUTPUT_SHARED_LOCAL (@var{stream}, @var{name}, @var{size}, @var{rounded}) +If defined, it is similar to @code{ASM_OUTPUT_LOCAL}, except that it +is used when @var{name} is shared. If not defined, @code{ASM_OUTPUT_LOCAL} +will be used. +@end table + +@node Label Output +@subsection Output and Generation of Labels + +@c prevent bad page break with this line +This is about outputting labels. + +@table @code +@findex ASM_OUTPUT_LABEL +@findex assemble_name +@item ASM_OUTPUT_LABEL (@var{stream}, @var{name}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} the assembler definition of a label named @var{name}. +Use the expression @code{assemble_name (@var{stream}, @var{name})} to +output the name itself; before and after that, output the additional +assembler syntax for defining the name, and a newline. + +@findex ASM_DECLARE_FUNCTION_NAME +@item ASM_DECLARE_FUNCTION_NAME (@var{stream}, @var{name}, @var{decl}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} any text necessary for declaring the name @var{name} of a +function which is being defined. This macro is responsible for +outputting the label definition (perhaps using +@code{ASM_OUTPUT_LABEL}). The argument @var{decl} is the +@code{FUNCTION_DECL} tree node representing the function. + +If this macro is not defined, then the function name is defined in the +usual manner as a label (by means of @code{ASM_OUTPUT_LABEL}). + +@findex ASM_DECLARE_FUNCTION_SIZE +@item ASM_DECLARE_FUNCTION_SIZE (@var{stream}, @var{name}, @var{decl}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} any text necessary for declaring the size of a function +which is being defined. The argument @var{name} is the name of the +function. The argument @var{decl} is the @code{FUNCTION_DECL} tree node +representing the function. + +If this macro is not defined, then the function size is not defined. + +@findex ASM_DECLARE_OBJECT_NAME +@item ASM_DECLARE_OBJECT_NAME (@var{stream}, @var{name}, @var{decl}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} any text necessary for declaring the name @var{name} of an +initialized variable which is being defined. This macro must output the +label definition (perhaps using @code{ASM_OUTPUT_LABEL}). The argument +@var{decl} is the @code{VAR_DECL} tree node representing the variable. + +If this macro is not defined, then the variable name is defined in the +usual manner as a label (by means of @code{ASM_OUTPUT_LABEL}). + +@findex ASM_DECLARE_REGISTER_GLOBAL +@item ASM_DECLARE_REGISTER_GLOBAL (@var{stream}, @var{decl}, @var{regno}, @var{name}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} any text necessary for claiming a register @var{regno} +for a global variable @var{decl} with name @var{name}. + +If you don't define this macro, that is equivalent to defining it to do +nothing. + +@findex ASM_FINISH_DECLARE_OBJECT +@item ASM_FINISH_DECLARE_OBJECT (@var{stream}, @var{decl}, @var{toplevel}, @var{atend}) +A C statement (sans semicolon) to finish up declaring a variable name +once the compiler has processed its initializer fully and thus has had a +chance to determine the size of an array when controlled by an +initializer. This is used on systems where it's necessary to declare +something about the size of the object. + +If you don't define this macro, that is equivalent to defining it to do +nothing. + +@findex ASM_GLOBALIZE_LABEL +@item ASM_GLOBALIZE_LABEL (@var{stream}, @var{name}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} some commands that will make the label @var{name} global; +that is, available for reference from other files. Use the expression +@code{assemble_name (@var{stream}, @var{name})} to output the name +itself; before and after that, output the additional assembler syntax +for making that name global, and a newline. + +@findex ASM_WEAKEN_LABEL +@item ASM_WEAKEN_LABEL +A C statement (sans semicolon) to output to the stdio stream +@var{stream} some commands that will make the label @var{name} weak; +that is, available for reference from other files but only used if +no other definition is available. Use the expression +@code{assemble_name (@var{stream}, @var{name})} to output the name +itself; before and after that, output the additional assembler syntax +for making that name weak, and a newline. + +If you don't define this macro, GCC will not support weak +symbols and you should not define the @code{SUPPORTS_WEAK} macro. + +@findex SUPPORTS_WEAK +@item SUPPORTS_WEAK +A C expression which evaluates to true if the target supports weak symbols. + +If you don't define this macro, @file{defaults.h} provides a default +definition. If @code{ASM_WEAKEN_LABEL} is defined, the default +definition is @samp{1}; otherwise, it is @samp{0}. Define this macro if +you want to control weak symbol support with a compiler flag such as +@option{-melf}. + +@findex MAKE_DECL_ONE_ONLY (@var{decl}) +@item MAKE_DECL_ONE_ONLY +A C statement (sans semicolon) to mark @var{decl} to be emitted as a +public symbol such that extra copies in multiple translation units will +be discarded by the linker. Define this macro if your object file +format provides support for this concept, such as the @samp{COMDAT} +section flags in the Microsoft Windows PE/COFF format, and this support +requires changes to @var{decl}, such as putting it in a separate section. + +@findex SUPPORTS_ONE_ONLY +@item SUPPORTS_ONE_ONLY +A C expression which evaluates to true if the target supports one-only +semantics. + +If you don't define this macro, @file{varasm.c} provides a default +definition. If @code{MAKE_DECL_ONE_ONLY} is defined, the default +definition is @samp{1}; otherwise, it is @samp{0}. Define this macro if +you want to control one-only symbol support with a compiler flag, or if +setting the @code{DECL_ONE_ONLY} flag is enough to mark a declaration to +be emitted as one-only. + +@findex ASM_OUTPUT_EXTERNAL +@item ASM_OUTPUT_EXTERNAL (@var{stream}, @var{decl}, @var{name}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} any text necessary for declaring the name of an external +symbol named @var{name} which is referenced in this compilation but +not defined. The value of @var{decl} is the tree node for the +declaration. + +This macro need not be defined if it does not need to output anything. +The GNU assembler and most Unix assemblers don't require anything. + +@findex ASM_OUTPUT_EXTERNAL_LIBCALL +@item ASM_OUTPUT_EXTERNAL_LIBCALL (@var{stream}, @var{symref}) +A C statement (sans semicolon) to output on @var{stream} an assembler +pseudo-op to declare a library function name external. The name of the +library function is given by @var{symref}, which has type @code{rtx} and +is a @code{symbol_ref}. + +This macro need not be defined if it does not need to output anything. +The GNU assembler and most Unix assemblers don't require anything. + +@findex ASM_OUTPUT_LABELREF +@item ASM_OUTPUT_LABELREF (@var{stream}, @var{name}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} a reference in assembler syntax to a label named +@var{name}. This should add @samp{_} to the front of the name, if that +is customary on your operating system, as it is in most Berkeley Unix +systems. This macro is used in @code{assemble_name}. + +@findex ASM_OUTPUT_SYMBOL_REF +@item ASM_OUTPUT_SYMBOL_REF (@var{stream}, @var{sym}) +A C statement (sans semicolon) to output a reference to +@code{SYMBOL_REF} @var{sym}. If not defined, @code{assemble_name} +will be used to output the name of the symbol. This macro may be used +to modify the way a symbol is referenced depending on information +encoded by @code{ENCODE_SECTION_INFO}. + +@findex ASM_OUTPUT_LABEL_REF +@item ASM_OUTPUT_LABEL_REF (@var{stream}, @var{buf}) +A C statement (sans semicolon) to output a reference to @var{buf}, the +result of ASM_GENERATE_INTERNAL_LABEL. If not defined, +@code{assemble_name} will be used to output the name of the symbol. +This macro is not used by @code{output_asm_label}, or the @code{%l} +specifier that calls it; the intention is that this macro should be set +when it is necessary to output a label differently when its address +is being taken. + +@findex ASM_OUTPUT_INTERNAL_LABEL +@item ASM_OUTPUT_INTERNAL_LABEL (@var{stream}, @var{prefix}, @var{num}) +A C statement to output to the stdio stream @var{stream} a label whose +name is made from the string @var{prefix} and the number @var{num}. + +It is absolutely essential that these labels be distinct from the labels +used for user-level functions and variables. Otherwise, certain programs +will have name conflicts with internal labels. + +It is desirable to exclude internal labels from the symbol table of the +object file. Most assemblers have a naming convention for labels that +should be excluded; on many systems, the letter @samp{L} at the +beginning of a label has this effect. You should find out what +convention your system uses, and follow it. + +The usual definition of this macro is as follows: + +@example +fprintf (@var{stream}, "L%s%d:\n", @var{prefix}, @var{num}) +@end example + +@findex ASM_OUTPUT_DEBUG_LABEL +@item ASM_OUTPUT_DEBUG_LABEL (@var{stream}, @var{prefix}, @var{num}) +A C statement to output to the stdio stream @var{stream} a debug info +label whose name is made from the string @var{prefix} and the number +@var{num}. This is useful for VLIW targets, where debug info labels +may need to be treated differently than branch target labels. On some +systems, branch target labels must be at the beginning of instruction +bundles, but debug info labels can occur in the middle of instruction +bundles. + +If this macro is not defined, then @code{ASM_OUTPUT_INTERNAL_LABEL} will be +used. + +@findex ASM_OUTPUT_ALTERNATE_LABEL_NAME +@item ASM_OUTPUT_ALTERNATE_LABEL_NAME (@var{stream}, @var{string}) +A C statement to output to the stdio stream @var{stream} the string +@var{string}. + +The default definition of this macro is as follows: + +@example +fprintf (@var{stream}, "%s:\n", LABEL_ALTERNATE_NAME (INSN)) +@end example + +@findex ASM_GENERATE_INTERNAL_LABEL +@item ASM_GENERATE_INTERNAL_LABEL (@var{string}, @var{prefix}, @var{num}) +A C statement to store into the string @var{string} a label whose name +is made from the string @var{prefix} and the number @var{num}. + +This string, when output subsequently by @code{assemble_name}, should +produce the output that @code{ASM_OUTPUT_INTERNAL_LABEL} would produce +with the same @var{prefix} and @var{num}. + +If the string begins with @samp{*}, then @code{assemble_name} will +output the rest of the string unchanged. It is often convenient for +@code{ASM_GENERATE_INTERNAL_LABEL} to use @samp{*} in this way. If the +string doesn't start with @samp{*}, then @code{ASM_OUTPUT_LABELREF} gets +to output the string, and may change it. (Of course, +@code{ASM_OUTPUT_LABELREF} is also part of your machine description, so +you should know what it does on your machine.) + +@findex ASM_FORMAT_PRIVATE_NAME +@item ASM_FORMAT_PRIVATE_NAME (@var{outvar}, @var{name}, @var{number}) +A C expression to assign to @var{outvar} (which is a variable of type +@code{char *}) a newly allocated string made from the string +@var{name} and the number @var{number}, with some suitable punctuation +added. Use @code{alloca} to get space for the string. + +The string will be used as an argument to @code{ASM_OUTPUT_LABELREF} to +produce an assembler label for an internal static variable whose name is +@var{name}. Therefore, the string must be such as to result in valid +assembler code. The argument @var{number} is different each time this +macro is executed; it prevents conflicts between similarly-named +internal static variables in different scopes. + +Ideally this string should not be a valid C identifier, to prevent any +conflict with the user's own symbols. Most assemblers allow periods +or percent signs in assembler symbols; putting at least one of these +between the name and the number will suffice. + +@findex ASM_OUTPUT_DEF +@item ASM_OUTPUT_DEF (@var{stream}, @var{name}, @var{value}) +A C statement to output to the stdio stream @var{stream} assembler code +which defines (equates) the symbol @var{name} to have the value @var{value}. + +@findex SET_ASM_OP +If @code{SET_ASM_OP} is defined, a default definition is provided which is +correct for most systems. + +@findex ASM_OUTPUT_DEF_FROM_DECLS +@item ASM_OUTPUT_DEF_FROM_DECLS (@var{stream}, @var{decl_of_name}, @var{decl_of_value}) +A C statement to output to the stdio stream @var{stream} assembler code +which defines (equates) the symbol whose tree node is @var{decl_of_name} +to have the value of the tree node @var{decl_of_value}. This macro will +be used in preference to @samp{ASM_OUTPUT_DEF} if it is defined and if +the tree nodes are available. + +@findex ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL +@item ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL (@var{stream}, @var{symbol}, @var{high}, @var{low}) +A C statement to output to the stdio stream @var{stream} assembler code +which defines (equates) the symbol @var{symbol} to have a value equal to +the difference of the two symbols @var{high} and @var{low}, +i.e.@: @var{high} minus @var{low}. GCC guarantees that the symbols @var{high} +and @var{low} are already known by the assembler so that the difference +resolves into a constant. + +@findex SET_ASM_OP +If @code{SET_ASM_OP} is defined, a default definition is provided which is +correct for most systems. + +@findex ASM_OUTPUT_WEAK_ALIAS +@item ASM_OUTPUT_WEAK_ALIAS (@var{stream}, @var{name}, @var{value}) +A C statement to output to the stdio stream @var{stream} assembler code +which defines (equates) the weak symbol @var{name} to have the value +@var{value}. If @var{value} is @code{NULL}, it defines @var{name} as +an undefined weak symbol. + +Define this macro if the target only supports weak aliases; define +@code{ASM_OUTPUT_DEF} instead if possible. + +@findex OBJC_GEN_METHOD_LABEL +@item OBJC_GEN_METHOD_LABEL (@var{buf}, @var{is_inst}, @var{class_name}, @var{cat_name}, @var{sel_name}) +Define this macro to override the default assembler names used for +Objective-C methods. + +The default name is a unique method number followed by the name of the +class (e.g.@: @samp{_1_Foo}). For methods in categories, the name of +the category is also included in the assembler name (e.g.@: +@samp{_1_Foo_Bar}). + +These names are safe on most systems, but make debugging difficult since +the method's selector is not present in the name. Therefore, particular +systems define other ways of computing names. + +@var{buf} is an expression of type @code{char *} which gives you a +buffer in which to store the name; its length is as long as +@var{class_name}, @var{cat_name} and @var{sel_name} put together, plus +50 characters extra. + +The argument @var{is_inst} specifies whether the method is an instance +method or a class method; @var{class_name} is the name of the class; +@var{cat_name} is the name of the category (or @code{NULL} if the method is not +in a category); and @var{sel_name} is the name of the selector. + +On systems where the assembler can handle quoted names, you can use this +macro to provide more human-readable names. + +@findex ASM_DECLARE_CLASS_REFERENCE +@item ASM_DECLARE_CLASS_REFERENCE (@var{stream}, @var{name}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} commands to declare that the label @var{name} is an +Objective-C class reference. This is only needed for targets whose +linkers have special support for NeXT-style runtimes. + +@findex ASM_DECLARE_UNRESOLVED_REFERENCE +@item ASM_DECLARE_UNRESOLVED_REFERENCE (@var{stream}, @var{name}) +A C statement (sans semicolon) to output to the stdio stream +@var{stream} commands to declare that the label @var{name} is an +unresolved Objective-C class reference. This is only needed for targets +whose linkers have special support for NeXT-style runtimes. +@end table + +@node Initialization +@subsection How Initialization Functions Are Handled +@cindex initialization routines +@cindex termination routines +@cindex constructors, output of +@cindex destructors, output of + +The compiled code for certain languages includes @dfn{constructors} +(also called @dfn{initialization routines})---functions to initialize +data in the program when the program is started. These functions need +to be called before the program is ``started''---that is to say, before +@code{main} is called. + +Compiling some languages generates @dfn{destructors} (also called +@dfn{termination routines}) that should be called when the program +terminates. + +To make the initialization and termination functions work, the compiler +must output something in the assembler code to cause those functions to +be called at the appropriate time. When you port the compiler to a new +system, you need to specify how to do this. + +There are two major ways that GCC currently supports the execution of +initialization and termination functions. Each way has two variants. +Much of the structure is common to all four variations. + +@findex __CTOR_LIST__ +@findex __DTOR_LIST__ +The linker must build two lists of these functions---a list of +initialization functions, called @code{__CTOR_LIST__}, and a list of +termination functions, called @code{__DTOR_LIST__}. + +Each list always begins with an ignored function pointer (which may hold +0, @minus{}1, or a count of the function pointers after it, depending on +the environment). This is followed by a series of zero or more function +pointers to constructors (or destructors), followed by a function +pointer containing zero. + +Depending on the operating system and its executable file format, either +@file{crtstuff.c} or @file{libgcc2.c} traverses these lists at startup +time and exit time. Constructors are called in reverse order of the +list; destructors in forward order. + +The best way to handle static constructors works only for object file +formats which provide arbitrarily-named sections. A section is set +aside for a list of constructors, and another for a list of destructors. +Traditionally these are called @samp{.ctors} and @samp{.dtors}. Each +object file that defines an initialization function also puts a word in +the constructor section to point to that function. The linker +accumulates all these words into one contiguous @samp{.ctors} section. +Termination functions are handled similarly. + +This method will be chosen as the default by @file{target-def.h} if +@code{TARGET_ASM_NAMED_SECTION} is defined. A target that does not +support arbitrary sections, but does support special designated +constructor and destructor sections may define @code{CTORS_SECTION_ASM_OP} +and @code{DTORS_SECTION_ASM_OP} to achieve the same effect. + +When arbitrary sections are available, there are two variants, depending +upon how the code in @file{crtstuff.c} is called. On systems that +support a @dfn{.init} section which is executed at program startup, +parts of @file{crtstuff.c} are compiled into that section. The +program is linked by the @code{gcc} driver like this: + +@example +ld -o @var{output_file} crti.o crtbegin.o @dots{} -lgcc crtend.o crtn.o +@end example + +The prologue of a function (@code{__init}) appears in the @code{.init} +section of @file{crti.o}; the epilogue appears in @file{crtn.o}. Likewise +for the function @code{__fini} in the @dfn{.fini} section. Normally these +files are provided by the operating system or by the GNU C library, but +are provided by GCC for a few targets. + +The objects @file{crtbegin.o} and @file{crtend.o} are (for most targets) +compiled from @file{crtstuff.c}. They contain, among other things, code +fragments within the @code{.init} and @code{.fini} sections that branch +to routines in the @code{.text} section. The linker will pull all parts +of a section together, which results in a complete @code{__init} function +that invokes the routines we need at startup. + +To use this variant, you must define the @code{INIT_SECTION_ASM_OP} +macro properly. + +If no init section is available, when GCC compiles any function called +@code{main} (or more accurately, any function designated as a program +entry point by the language front end calling @code{expand_main_function}), +it inserts a procedure call to @code{__main} as the first executable code +after the function prologue. The @code{__main} function is defined +in @file{libgcc2.c} and runs the global constructors. + +In file formats that don't support arbitrary sections, there are again +two variants. In the simplest variant, the GNU linker (GNU @code{ld}) +and an `a.out' format must be used. In this case, +@code{TARGET_ASM_CONSTRUCTOR} is defined to produce a @code{.stabs} +entry of type @samp{N_SETT}, referencing the name @code{__CTOR_LIST__}, +and with the address of the void function containing the initialization +code as its value. The GNU linker recognizes this as a request to add +the value to a @dfn{set}; the values are accumulated, and are eventually +placed in the executable as a vector in the format described above, with +a leading (ignored) count and a trailing zero element. +@code{TARGET_ASM_DESTRUCTOR} is handled similarly. Since no init +section is available, the absence of @code{INIT_SECTION_ASM_OP} causes +the compilation of @code{main} to call @code{__main} as above, starting +the initialization process. + +The last variant uses neither arbitrary sections nor the GNU linker. +This is preferable when you want to do dynamic linking and when using +file formats which the GNU linker does not support, such as `ECOFF'@. In +this case, @code{TARGET_HAVE_CTORS_DTORS} is false, initialization and +termination functions are recognized simply by their names. This requires +an extra program in the linkage step, called @command{collect2}. This program +pretends to be the linker, for use with GCC; it does its job by running +the ordinary linker, but also arranges to include the vectors of +initialization and termination functions. These functions are called +via @code{__main} as described above. In order to use this method, +@code{use_collect2} must be defined in the target in @file{config.gcc}. + +@ifinfo +The following section describes the specific macros that control and +customize the handling of initialization and termination functions. +@end ifinfo + +@node Macros for Initialization +@subsection Macros Controlling Initialization Routines + +Here are the macros that control how the compiler handles initialization +and termination functions: + +@table @code +@findex INIT_SECTION_ASM_OP +@item INIT_SECTION_ASM_OP +If defined, a C string constant, including spacing, for the assembler +operation to identify the following data as initialization code. If not +defined, GCC will assume such a section does not exist. When you are +using special sections for initialization and termination functions, this +macro also controls how @file{crtstuff.c} and @file{libgcc2.c} arrange to +run the initialization functions. + +@item HAS_INIT_SECTION +@findex HAS_INIT_SECTION +If defined, @code{main} will not call @code{__main} as described above. +This macro should be defined for systems that control start-up code +on a symbol-by-symbol basis, such as OSF/1, and should not +be defined explicitly for systems that support @code{INIT_SECTION_ASM_OP}. + +@item LD_INIT_SWITCH +@findex LD_INIT_SWITCH +If defined, a C string constant for a switch that tells the linker that +the following symbol is an initialization routine. + +@item LD_FINI_SWITCH +@findex LD_FINI_SWITCH +If defined, a C string constant for a switch that tells the linker that +the following symbol is a finalization routine. + +@item COLLECT_SHARED_INIT_FUNC (@var{stream}, @var{func}) +If defined, a C statement that will write a function that can be +automatically called when a shared library is loaded. The function +should call @var{func}, which takes no arguments. If not defined, and +the object format requires an explicit initialization function, then a +function called @code{_GLOBAL__DI} will be generated. + +This function and the following one are used by collect2 when linking a +shared library that needs constructors or destructors, or has DWARF2 +exception tables embedded in the code. + +@item COLLECT_SHARED_FINI_FUNC (@var{stream}, @var{func}) +If defined, a C statement that will write a function that can be +automatically called when a shared library is unloaded. The function +should call @var{func}, which takes no arguments. If not defined, and +the object format requires an explicit finalization function, then a +function called @code{_GLOBAL__DD} will be generated. + +@item INVOKE__main +@findex INVOKE__main +If defined, @code{main} will call @code{__main} despite the presence of +@code{INIT_SECTION_ASM_OP}. This macro should be defined for systems +where the init section is not actually run automatically, but is still +useful for collecting the lists of constructors and destructors. + +@item SUPPORTS_INIT_PRIORITY +@findex SUPPORTS_INIT_PRIORITY +If nonzero, the C++ @code{init_priority} attribute is supported and the +compiler should emit instructions to control the order of initialization +of objects. If zero, the compiler will issue an error message upon +encountering an @code{init_priority} attribute. +@end table + +@deftypefn {Target Hook} bool TARGET_HAVE_CTORS_DTORS +This value is true if the target supports some ``native'' method of +collecting constructors and destructors to be run at startup and exit. +It is false if we must use @command{collect2}. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_ASM_CONSTRUCTOR (rtx @var{symbol}, int @var{priority}) +If defined, a function that outputs assembler code to arrange to call +the function referenced by @var{symbol} at initialization time. + +Assume that @var{symbol} is a @code{SYMBOL_REF} for a function taking +no arguments and with no return value. If the target supports initialization +priorities, @var{priority} is a value between 0 and @code{MAX_INIT_PRIORITY}; +otherwise it must be @code{DEFAULT_INIT_PRIORITY}. + +If this macro is not defined by the target, a suitable default will +be chosen if (1) the target supports arbitrary section names, (2) the +target defines @code{CTORS_SECTION_ASM_OP}, or (3) @code{USE_COLLECT2} +is not defined. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_ASM_DESTRUCTOR (rtx @var{symbol}, int @var{priority}) +This is like @code{TARGET_ASM_CONSTRUCTOR} but used for termination +functions rather than initialization functions. +@end deftypefn + +If @code{TARGET_HAVE_CTORS_DTORS} is true, the initialization routine +generated for the generated object file will have static linkage. + +If your system uses @command{collect2} as the means of processing +constructors, then that program normally uses @command{nm} to scan +an object file for constructor functions to be called. + +On certain kinds of systems, you can define these macros to make +@command{collect2} work faster (and, in some cases, make it work at all): + +@table @code +@findex OBJECT_FORMAT_COFF +@item OBJECT_FORMAT_COFF +Define this macro if the system uses COFF (Common Object File Format) +object files, so that @command{collect2} can assume this format and scan +object files directly for dynamic constructor/destructor functions. + +@findex OBJECT_FORMAT_ROSE +@item OBJECT_FORMAT_ROSE +Define this macro if the system uses ROSE format object files, so that +@command{collect2} can assume this format and scan object files directly +for dynamic constructor/destructor functions. + +These macros are effective only in a native compiler; @command{collect2} as +part of a cross compiler always uses @command{nm} for the target machine. + +@findex REAL_NM_FILE_NAME +@item REAL_NM_FILE_NAME +Define this macro as a C string constant containing the file name to use +to execute @command{nm}. The default is to search the path normally for +@command{nm}. + +If your system supports shared libraries and has a program to list the +dynamic dependencies of a given library or executable, you can define +these macros to enable support for running initialization and +termination functions in shared libraries: + +@findex LDD_SUFFIX +@item LDD_SUFFIX +Define this macro to a C string constant containing the name of the program +which lists dynamic dependencies, like @command{"ldd"} under SunOS 4. + +@findex PARSE_LDD_OUTPUT +@item PARSE_LDD_OUTPUT (@var{ptr}) +Define this macro to be C code that extracts filenames from the output +of the program denoted by @code{LDD_SUFFIX}. @var{ptr} is a variable +of type @code{char *} that points to the beginning of a line of output +from @code{LDD_SUFFIX}. If the line lists a dynamic dependency, the +code must advance @var{ptr} to the beginning of the filename on that +line. Otherwise, it must set @var{ptr} to @code{NULL}. +@end table + +@node Instruction Output +@subsection Output of Assembler Instructions + +@c prevent bad page break with this line +This describes assembler instruction output. + +@table @code +@findex REGISTER_NAMES +@item REGISTER_NAMES +A C initializer containing the assembler's names for the machine +registers, each one as a C string constant. This is what translates +register numbers in the compiler into assembler language. + +@findex ADDITIONAL_REGISTER_NAMES +@item ADDITIONAL_REGISTER_NAMES +If defined, a C initializer for an array of structures containing a name +and a register number. This macro defines additional names for hard +registers, thus allowing the @code{asm} option in declarations to refer +to registers using alternate names. + +@findex ASM_OUTPUT_OPCODE +@item ASM_OUTPUT_OPCODE (@var{stream}, @var{ptr}) +Define this macro if you are using an unusual assembler that +requires different names for the machine instructions. + +The definition is a C statement or statements which output an +assembler instruction opcode to the stdio stream @var{stream}. The +macro-operand @var{ptr} is a variable of type @code{char *} which +points to the opcode name in its ``internal'' form---the form that is +written in the machine description. The definition should output the +opcode name to @var{stream}, performing any translation you desire, and +increment the variable @var{ptr} to point at the end of the opcode +so that it will not be output twice. + +In fact, your macro definition may process less than the entire opcode +name, or more than the opcode name; but if you want to process text +that includes @samp{%}-sequences to substitute operands, you must take +care of the substitution yourself. Just be sure to increment +@var{ptr} over whatever text should not be output normally. + +@findex recog_data.operand +If you need to look at the operand values, they can be found as the +elements of @code{recog_data.operand}. + +If the macro definition does nothing, the instruction is output +in the usual way. + +@findex FINAL_PRESCAN_INSN +@item FINAL_PRESCAN_INSN (@var{insn}, @var{opvec}, @var{noperands}) +If defined, a C statement to be executed just prior to the output of +assembler code for @var{insn}, to modify the extracted operands so +they will be output differently. + +Here the argument @var{opvec} is the vector containing the operands +extracted from @var{insn}, and @var{noperands} is the number of +elements of the vector which contain meaningful data for this insn. +The contents of this vector are what will be used to convert the insn +template into assembler code, so you can change the assembler output +by changing the contents of the vector. + +This macro is useful when various assembler syntaxes share a single +file of instruction patterns; by defining this macro differently, you +can cause a large class of instructions to be output differently (such +as with rearranged operands). Naturally, variations in assembler +syntax affecting individual insn patterns ought to be handled by +writing conditional output routines in those patterns. + +If this macro is not defined, it is equivalent to a null statement. + +@findex FINAL_PRESCAN_LABEL +@item FINAL_PRESCAN_LABEL +If defined, @code{FINAL_PRESCAN_INSN} will be called on each +@code{CODE_LABEL}. In that case, @var{opvec} will be a null pointer and +@var{noperands} will be zero. + +@findex PRINT_OPERAND +@item PRINT_OPERAND (@var{stream}, @var{x}, @var{code}) +A C compound statement to output to stdio stream @var{stream} the +assembler syntax for an instruction operand @var{x}. @var{x} is an +RTL expression. + +@var{code} is a value that can be used to specify one of several ways +of printing the operand. It is used when identical operands must be +printed differently depending on the context. @var{code} comes from +the @samp{%} specification that was used to request printing of the +operand. If the specification was just @samp{%@var{digit}} then +@var{code} is 0; if the specification was @samp{%@var{ltr} +@var{digit}} then @var{code} is the ASCII code for @var{ltr}. + +@findex reg_names +If @var{x} is a register, this macro should print the register's name. +The names can be found in an array @code{reg_names} whose type is +@code{char *[]}. @code{reg_names} is initialized from +@code{REGISTER_NAMES}. + +When the machine description has a specification @samp{%@var{punct}} +(a @samp{%} followed by a punctuation character), this macro is called +with a null pointer for @var{x} and the punctuation character for +@var{code}. + +@findex PRINT_OPERAND_PUNCT_VALID_P +@item PRINT_OPERAND_PUNCT_VALID_P (@var{code}) +A C expression which evaluates to true if @var{code} is a valid +punctuation character for use in the @code{PRINT_OPERAND} macro. If +@code{PRINT_OPERAND_PUNCT_VALID_P} is not defined, it means that no +punctuation characters (except for the standard one, @samp{%}) are used +in this way. + +@findex PRINT_OPERAND_ADDRESS +@item PRINT_OPERAND_ADDRESS (@var{stream}, @var{x}) +A C compound statement to output to stdio stream @var{stream} the +assembler syntax for an instruction operand that is a memory reference +whose address is @var{x}. @var{x} is an RTL expression. + +@cindex @code{ENCODE_SECTION_INFO} usage +On some machines, the syntax for a symbolic address depends on the +section that the address refers to. On these machines, define the macro +@code{ENCODE_SECTION_INFO} to store the information into the +@code{symbol_ref}, and then check for it here. @xref{Assembler Format}. + +@findex DBR_OUTPUT_SEQEND +@findex dbr_sequence_length +@item DBR_OUTPUT_SEQEND(@var{file}) +A C statement, to be executed after all slot-filler instructions have +been output. If necessary, call @code{dbr_sequence_length} to +determine the number of slots filled in a sequence (zero if not +currently outputting a sequence), to decide how many no-ops to output, +or whatever. + +Don't define this macro if it has nothing to do, but it is helpful in +reading assembly output if the extent of the delay sequence is made +explicit (e.g.@: with white space). + +@findex final_sequence +Note that output routines for instructions with delay slots must be +prepared to deal with not being output as part of a sequence +(i.e.@: when the scheduling pass is not run, or when no slot fillers could be +found.) The variable @code{final_sequence} is null when not +processing a sequence, otherwise it contains the @code{sequence} rtx +being output. + +@findex REGISTER_PREFIX +@findex LOCAL_LABEL_PREFIX +@findex USER_LABEL_PREFIX +@findex IMMEDIATE_PREFIX +@findex asm_fprintf +@item REGISTER_PREFIX +@itemx LOCAL_LABEL_PREFIX +@itemx USER_LABEL_PREFIX +@itemx IMMEDIATE_PREFIX +If defined, C string expressions to be used for the @samp{%R}, @samp{%L}, +@samp{%U}, and @samp{%I} options of @code{asm_fprintf} (see +@file{final.c}). These are useful when a single @file{md} file must +support multiple assembler formats. In that case, the various @file{tm.h} +files can define these macros differently. + +@item ASM_FPRINTF_EXTENSIONS(@var{file}, @var{argptr}, @var{format}) +@findex ASM_FPRINTF_EXTENSIONS +If defined this macro should expand to a series of @code{case} +statements which will be parsed inside the @code{switch} statement of +the @code{asm_fprintf} function. This allows targets to define extra +printf formats which may useful when generating their assembler +statements. Note that upper case letters are reserved for future +generic extensions to asm_fprintf, and so are not available to target +specific code. The output file is given by the parameter @var{file}. +The varargs input pointer is @var{argptr} and the rest of the format +string, starting the character after the one that is being switched +upon, is pointed to by @var{format}. + +@findex ASSEMBLER_DIALECT +@item ASSEMBLER_DIALECT +If your target supports multiple dialects of assembler language (such as +different opcodes), define this macro as a C expression that gives the +numeric index of the assembler language dialect to use, with zero as the +first variant. + +If this macro is defined, you may use constructs of the form +@smallexample +@samp{@{option0|option1|option2@dots{}@}} +@end smallexample +@noindent +in the output templates of patterns (@pxref{Output Template}) or in the +first argument of @code{asm_fprintf}. This construct outputs +@samp{option0}, @samp{option1}, @samp{option2}, etc., if the value of +@code{ASSEMBLER_DIALECT} is zero, one, two, etc. Any special characters +within these strings retain their usual meaning. If there are fewer +alternatives within the braces than the value of +@code{ASSEMBLER_DIALECT}, the construct outputs nothing. + +If you do not define this macro, the characters @samp{@{}, @samp{|} and +@samp{@}} do not have any special meaning when used in templates or +operands to @code{asm_fprintf}. + +Define the macros @code{REGISTER_PREFIX}, @code{LOCAL_LABEL_PREFIX}, +@code{USER_LABEL_PREFIX} and @code{IMMEDIATE_PREFIX} if you can express +the variations in assembler language syntax with that mechanism. Define +@code{ASSEMBLER_DIALECT} and use the @samp{@{option0|option1@}} syntax +if the syntax variant are larger and involve such things as different +opcodes or operand order. + +@findex ASM_OUTPUT_REG_PUSH +@item ASM_OUTPUT_REG_PUSH (@var{stream}, @var{regno}) +A C expression to output to @var{stream} some assembler code +which will push hard register number @var{regno} onto the stack. +The code need not be optimal, since this macro is used only when +profiling. + +@findex ASM_OUTPUT_REG_POP +@item ASM_OUTPUT_REG_POP (@var{stream}, @var{regno}) +A C expression to output to @var{stream} some assembler code +which will pop hard register number @var{regno} off of the stack. +The code need not be optimal, since this macro is used only when +profiling. +@end table + +@node Dispatch Tables +@subsection Output of Dispatch Tables + +@c prevent bad page break with this line +This concerns dispatch tables. + +@table @code +@cindex dispatch table +@findex ASM_OUTPUT_ADDR_DIFF_ELT +@item ASM_OUTPUT_ADDR_DIFF_ELT (@var{stream}, @var{body}, @var{value}, @var{rel}) +A C statement to output to the stdio stream @var{stream} an assembler +pseudo-instruction to generate a difference between two labels. +@var{value} and @var{rel} are the numbers of two internal labels. The +definitions of these labels are output using +@code{ASM_OUTPUT_INTERNAL_LABEL}, and they must be printed in the same +way here. For example, + +@example +fprintf (@var{stream}, "\t.word L%d-L%d\n", + @var{value}, @var{rel}) +@end example + +You must provide this macro on machines where the addresses in a +dispatch table are relative to the table's own address. If defined, GCC +will also use this macro on all machines when producing PIC@. +@var{body} is the body of the @code{ADDR_DIFF_VEC}; it is provided so that the +mode and flags can be read. + +@findex ASM_OUTPUT_ADDR_VEC_ELT +@item ASM_OUTPUT_ADDR_VEC_ELT (@var{stream}, @var{value}) +This macro should be provided on machines where the addresses +in a dispatch table are absolute. + +The definition should be a C statement to output to the stdio stream +@var{stream} an assembler pseudo-instruction to generate a reference to +a label. @var{value} is the number of an internal label whose +definition is output using @code{ASM_OUTPUT_INTERNAL_LABEL}. +For example, + +@example +fprintf (@var{stream}, "\t.word L%d\n", @var{value}) +@end example + +@findex ASM_OUTPUT_CASE_LABEL +@item ASM_OUTPUT_CASE_LABEL (@var{stream}, @var{prefix}, @var{num}, @var{table}) +Define this if the label before a jump-table needs to be output +specially. The first three arguments are the same as for +@code{ASM_OUTPUT_INTERNAL_LABEL}; the fourth argument is the +jump-table which follows (a @code{jump_insn} containing an +@code{addr_vec} or @code{addr_diff_vec}). + +This feature is used on system V to output a @code{swbeg} statement +for the table. + +If this macro is not defined, these labels are output with +@code{ASM_OUTPUT_INTERNAL_LABEL}. + +@findex ASM_OUTPUT_CASE_END +@item ASM_OUTPUT_CASE_END (@var{stream}, @var{num}, @var{table}) +Define this if something special must be output at the end of a +jump-table. The definition should be a C statement to be executed +after the assembler code for the table is written. It should write +the appropriate code to stdio stream @var{stream}. The argument +@var{table} is the jump-table insn, and @var{num} is the label-number +of the preceding label. + +If this macro is not defined, nothing special is output at the end of +the jump-table. +@end table + +@node Exception Region Output +@subsection Assembler Commands for Exception Regions + +@c prevent bad page break with this line + +This describes commands marking the start and the end of an exception +region. + +@table @code +@findex EH_FRAME_SECTION_NAME +@item EH_FRAME_SECTION_NAME +If defined, a C string constant for the name of the section containing +exception handling frame unwind information. If not defined, GCC will +provide a default definition if the target supports named sections. +@file{crtstuff.c} uses this macro to switch to the appropriate section. + +You should define this symbol if your target supports DWARF 2 frame +unwind information and the default definition does not work. + +@findex EH_FRAME_IN_DATA_SECTION +@item EH_FRAME_IN_DATA_SECTION +If defined, DWARF 2 frame unwind information will be placed in the +data section even though the target supports named sections. This +might be necessary, for instance, if the system linker does garbage +collection and sections cannot be marked as not to be collected. + +Do not define this macro unless @code{TARGET_ASM_NAMED_SECTION} is +also defined. + +@findex MASK_RETURN_ADDR +@item MASK_RETURN_ADDR +An rtx used to mask the return address found via @code{RETURN_ADDR_RTX}, so +that it does not contain any extraneous set bits in it. + +@findex DWARF2_UNWIND_INFO +@item DWARF2_UNWIND_INFO +Define this macro to 0 if your target supports DWARF 2 frame unwind +information, but it does not yet work with exception handling. +Otherwise, if your target supports this information (if it defines +@samp{INCOMING_RETURN_ADDR_RTX} and either @samp{UNALIGNED_INT_ASM_OP} +or @samp{OBJECT_FORMAT_ELF}), GCC will provide a default definition of +1. + +If this macro is defined to 1, the DWARF 2 unwinder will be the default +exception handling mechanism; otherwise, @code{setjmp}/@code{longjmp} will be used by +default. + +If this macro is defined to anything, the DWARF 2 unwinder will be used +instead of inline unwinders and @code{__unwind_function} in the non-@code{setjmp} case. + +@findex DWARF_CIE_DATA_ALIGNMENT +@item DWARF_CIE_DATA_ALIGNMENT +This macro need only be defined if the target might save registers in the +function prologue at an offset to the stack pointer that is not aligned to +@code{UNITS_PER_WORD}. The definition should be the negative minimum +alignment if @code{STACK_GROWS_DOWNWARD} is defined, and the positive +minimum alignment otherwise. @xref{SDB and DWARF}. Only applicable if +the target supports DWARF 2 frame unwind information. + +@end table + +@deftypefn {Target Hook} void TARGET_ASM_EXCEPTION_SECTION () +If defined, a function that switches to the section in which the main +exception table is to be placed (@pxref{Sections}). The default is a +function that switches to a section named @code{.gcc_except_table} on +machines that support named sections via +@code{TARGET_ASM_NAMED_SECTION}, otherwise if @option{-fpic} or +@option{-fPIC} is in effect, the @code{data_section}, otherwise the +@code{readonly_data_section}. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_ASM_EH_FRAME_SECTION () +If defined, a function that switches to the section in which the DWARF 2 +frame unwind information to be placed (@pxref{Sections}). The default +is a function that outputs a standard GAS section directive, if +@code{EH_FRAME_SECTION_NAME} is defined, or else a data section +directive followed by a synthetic label. +@end deftypefn + +@node Alignment Output +@subsection Assembler Commands for Alignment + +@c prevent bad page break with this line +This describes commands for alignment. + +@table @code +@findex JUMP_ALIGN +@item JUMP_ALIGN (@var{label}) +The alignment (log base 2) to put in front of @var{label}, which is +a common destination of jumps and has no fallthru incoming edge. + +This macro need not be defined if you don't want any special alignment +to be done at such a time. Most machine descriptions do not currently +define the macro. + +Unless it's necessary to inspect the @var{label} parameter, it is better +to set the variable @var{align_jumps} in the target's +@code{OVERRIDE_OPTIONS}. Otherwise, you should try to honor the user's +selection in @var{align_jumps} in a @code{JUMP_ALIGN} implementation. + +@findex LABEL_ALIGN_AFTER_BARRIER +@item LABEL_ALIGN_AFTER_BARRIER (@var{label}) +The alignment (log base 2) to put in front of @var{label}, which follows +a @code{BARRIER}. + +This macro need not be defined if you don't want any special alignment +to be done at such a time. Most machine descriptions do not currently +define the macro. + +@findex LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP +@item LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP +The maximum number of bytes to skip when applying +@code{LABEL_ALIGN_AFTER_BARRIER}. This works only if +@code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined. + +@findex LOOP_ALIGN +@item LOOP_ALIGN (@var{label}) +The alignment (log base 2) to put in front of @var{label}, which follows +a @code{NOTE_INSN_LOOP_BEG} note. + +This macro need not be defined if you don't want any special alignment +to be done at such a time. Most machine descriptions do not currently +define the macro. + +Unless it's necessary to inspect the @var{label} parameter, it is better +to set the variable @code{align_loops} in the target's +@code{OVERRIDE_OPTIONS}. Otherwise, you should try to honor the user's +selection in @code{align_loops} in a @code{LOOP_ALIGN} implementation. + +@findex LOOP_ALIGN_MAX_SKIP +@item LOOP_ALIGN_MAX_SKIP +The maximum number of bytes to skip when applying @code{LOOP_ALIGN}. +This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined. + +@findex LABEL_ALIGN +@item LABEL_ALIGN (@var{label}) +The alignment (log base 2) to put in front of @var{label}. +If @code{LABEL_ALIGN_AFTER_BARRIER} / @code{LOOP_ALIGN} specify a different alignment, +the maximum of the specified values is used. + +Unless it's necessary to inspect the @var{label} parameter, it is better +to set the variable @code{align_labels} in the target's +@code{OVERRIDE_OPTIONS}. Otherwise, you should try to honor the user's +selection in @code{align_labels} in a @code{LABEL_ALIGN} implementation. + +@findex LABEL_ALIGN_MAX_SKIP +@item LABEL_ALIGN_MAX_SKIP +The maximum number of bytes to skip when applying @code{LABEL_ALIGN}. +This works only if @code{ASM_OUTPUT_MAX_SKIP_ALIGN} is defined. + +@findex ASM_OUTPUT_SKIP +@item ASM_OUTPUT_SKIP (@var{stream}, @var{nbytes}) +A C statement to output to the stdio stream @var{stream} an assembler +instruction to advance the location counter by @var{nbytes} bytes. +Those bytes should be zero when loaded. @var{nbytes} will be a C +expression of type @code{int}. + +@findex ASM_NO_SKIP_IN_TEXT +@item ASM_NO_SKIP_IN_TEXT +Define this macro if @code{ASM_OUTPUT_SKIP} should not be used in the +text section because it fails to put zeros in the bytes that are skipped. +This is true on many Unix systems, where the pseudo--op to skip bytes +produces no-op instructions rather than zeros when used in the text +section. + +@findex ASM_OUTPUT_ALIGN +@item ASM_OUTPUT_ALIGN (@var{stream}, @var{power}) +A C statement to output to the stdio stream @var{stream} an assembler +command to advance the location counter to a multiple of 2 to the +@var{power} bytes. @var{power} will be a C expression of type @code{int}. + +@findex ASM_OUTPUT_MAX_SKIP_ALIGN +@item ASM_OUTPUT_MAX_SKIP_ALIGN (@var{stream}, @var{power}, @var{max_skip}) +A C statement to output to the stdio stream @var{stream} an assembler +command to advance the location counter to a multiple of 2 to the +@var{power} bytes, but only if @var{max_skip} or fewer bytes are needed to +satisfy the alignment request. @var{power} and @var{max_skip} will be +a C expression of type @code{int}. +@end table + +@need 3000 +@node Debugging Info +@section Controlling Debugging Information Format + +@c prevent bad page break with this line +This describes how to specify debugging information. + +@menu +* All Debuggers:: Macros that affect all debugging formats uniformly. +* DBX Options:: Macros enabling specific options in DBX format. +* DBX Hooks:: Hook macros for varying DBX format. +* File Names and DBX:: Macros controlling output of file names in DBX format. +* SDB and DWARF:: Macros for SDB (COFF) and DWARF formats. +* VMS Debug:: Macros for VMS debug format. +@end menu + +@node All Debuggers +@subsection Macros Affecting All Debugging Formats + +@c prevent bad page break with this line +These macros affect all debugging formats. + +@table @code +@findex DBX_REGISTER_NUMBER +@item DBX_REGISTER_NUMBER (@var{regno}) +A C expression that returns the DBX register number for the compiler +register number @var{regno}. In the default macro provided, the value +of this expression will be @var{regno} itself. But sometimes there are +some registers that the compiler knows about and DBX does not, or vice +versa. In such cases, some register may need to have one number in the +compiler and another for DBX@. + +If two registers have consecutive numbers inside GCC, and they can be +used as a pair to hold a multiword value, then they @emph{must} have +consecutive numbers after renumbering with @code{DBX_REGISTER_NUMBER}. +Otherwise, debuggers will be unable to access such a pair, because they +expect register pairs to be consecutive in their own numbering scheme. + +If you find yourself defining @code{DBX_REGISTER_NUMBER} in way that +does not preserve register pairs, then what you must do instead is +redefine the actual register numbering scheme. + +@findex DEBUGGER_AUTO_OFFSET +@item DEBUGGER_AUTO_OFFSET (@var{x}) +A C expression that returns the integer offset value for an automatic +variable having address @var{x} (an RTL expression). The default +computation assumes that @var{x} is based on the frame-pointer and +gives the offset from the frame-pointer. This is required for targets +that produce debugging output for DBX or COFF-style debugging output +for SDB and allow the frame-pointer to be eliminated when the +@option{-g} options is used. + +@findex DEBUGGER_ARG_OFFSET +@item DEBUGGER_ARG_OFFSET (@var{offset}, @var{x}) +A C expression that returns the integer offset value for an argument +having address @var{x} (an RTL expression). The nominal offset is +@var{offset}. + +@findex PREFERRED_DEBUGGING_TYPE +@item PREFERRED_DEBUGGING_TYPE +A C expression that returns the type of debugging output GCC should +produce when the user specifies just @option{-g}. Define +this if you have arranged for GCC to support more than one format of +debugging output. Currently, the allowable values are @code{DBX_DEBUG}, +@code{SDB_DEBUG}, @code{DWARF_DEBUG}, @code{DWARF2_DEBUG}, +@code{XCOFF_DEBUG}, @code{VMS_DEBUG}, and @code{VMS_AND_DWARF2_DEBUG}. + +When the user specifies @option{-ggdb}, GCC normally also uses the +value of this macro to select the debugging output format, but with two +exceptions. If @code{DWARF2_DEBUGGING_INFO} is defined and +@code{LINKER_DOES_NOT_WORK_WITH_DWARF2} is not defined, GCC uses the +value @code{DWARF2_DEBUG}. Otherwise, if @code{DBX_DEBUGGING_INFO} is +defined, GCC uses @code{DBX_DEBUG}. + +The value of this macro only affects the default debugging output; the +user can always get a specific type of output by using @option{-gstabs}, +@option{-gcoff}, @option{-gdwarf-1}, @option{-gdwarf-2}, @option{-gxcoff}, +or @option{-gvms}. +@end table + +@node DBX Options +@subsection Specific Options for DBX Output + +@c prevent bad page break with this line +These are specific options for DBX output. + +@table @code +@findex DBX_DEBUGGING_INFO +@item DBX_DEBUGGING_INFO +Define this macro if GCC should produce debugging output for DBX +in response to the @option{-g} option. + +@findex XCOFF_DEBUGGING_INFO +@item XCOFF_DEBUGGING_INFO +Define this macro if GCC should produce XCOFF format debugging output +in response to the @option{-g} option. This is a variant of DBX format. + +@findex DEFAULT_GDB_EXTENSIONS +@item DEFAULT_GDB_EXTENSIONS +Define this macro to control whether GCC should by default generate +GDB's extended version of DBX debugging information (assuming DBX-format +debugging information is enabled at all). If you don't define the +macro, the default is 1: always generate the extended information +if there is any occasion to. + +@findex DEBUG_SYMS_TEXT +@item DEBUG_SYMS_TEXT +Define this macro if all @code{.stabs} commands should be output while +in the text section. + +@findex ASM_STABS_OP +@item ASM_STABS_OP +A C string constant, including spacing, naming the assembler pseudo op to +use instead of @code{"\t.stabs\t"} to define an ordinary debugging symbol. +If you don't define this macro, @code{"\t.stabs\t"} is used. This macro +applies only to DBX debugging information format. + +@findex ASM_STABD_OP +@item ASM_STABD_OP +A C string constant, including spacing, naming the assembler pseudo op to +use instead of @code{"\t.stabd\t"} to define a debugging symbol whose +value is the current location. If you don't define this macro, +@code{"\t.stabd\t"} is used. This macro applies only to DBX debugging +information format. + +@findex ASM_STABN_OP +@item ASM_STABN_OP +A C string constant, including spacing, naming the assembler pseudo op to +use instead of @code{"\t.stabn\t"} to define a debugging symbol with no +name. If you don't define this macro, @code{"\t.stabn\t"} is used. This +macro applies only to DBX debugging information format. + +@findex DBX_NO_XREFS +@item DBX_NO_XREFS +Define this macro if DBX on your system does not support the construct +@samp{xs@var{tagname}}. On some systems, this construct is used to +describe a forward reference to a structure named @var{tagname}. +On other systems, this construct is not supported at all. + +@findex DBX_CONTIN_LENGTH +@item DBX_CONTIN_LENGTH +A symbol name in DBX-format debugging information is normally +continued (split into two separate @code{.stabs} directives) when it +exceeds a certain length (by default, 80 characters). On some +operating systems, DBX requires this splitting; on others, splitting +must not be done. You can inhibit splitting by defining this macro +with the value zero. You can override the default splitting-length by +defining this macro as an expression for the length you desire. + +@findex DBX_CONTIN_CHAR +@item DBX_CONTIN_CHAR +Normally continuation is indicated by adding a @samp{\} character to +the end of a @code{.stabs} string when a continuation follows. To use +a different character instead, define this macro as a character +constant for the character you want to use. Do not define this macro +if backslash is correct for your system. + +@findex DBX_STATIC_STAB_DATA_SECTION +@item DBX_STATIC_STAB_DATA_SECTION +Define this macro if it is necessary to go to the data section before +outputting the @samp{.stabs} pseudo-op for a non-global static +variable. + +@findex DBX_TYPE_DECL_STABS_CODE +@item DBX_TYPE_DECL_STABS_CODE +The value to use in the ``code'' field of the @code{.stabs} directive +for a typedef. The default is @code{N_LSYM}. + +@findex DBX_STATIC_CONST_VAR_CODE +@item DBX_STATIC_CONST_VAR_CODE +The value to use in the ``code'' field of the @code{.stabs} directive +for a static variable located in the text section. DBX format does not +provide any ``right'' way to do this. The default is @code{N_FUN}. + +@findex DBX_REGPARM_STABS_CODE +@item DBX_REGPARM_STABS_CODE +The value to use in the ``code'' field of the @code{.stabs} directive +for a parameter passed in registers. DBX format does not provide any +``right'' way to do this. The default is @code{N_RSYM}. + +@findex DBX_REGPARM_STABS_LETTER +@item DBX_REGPARM_STABS_LETTER +The letter to use in DBX symbol data to identify a symbol as a parameter +passed in registers. DBX format does not customarily provide any way to +do this. The default is @code{'P'}. + +@findex DBX_MEMPARM_STABS_LETTER +@item DBX_MEMPARM_STABS_LETTER +The letter to use in DBX symbol data to identify a symbol as a stack +parameter. The default is @code{'p'}. + +@findex DBX_FUNCTION_FIRST +@item DBX_FUNCTION_FIRST +Define this macro if the DBX information for a function and its +arguments should precede the assembler code for the function. Normally, +in DBX format, the debugging information entirely follows the assembler +code. + +@findex DBX_LBRAC_FIRST +@item DBX_LBRAC_FIRST +Define this macro if the @code{N_LBRAC} symbol for a block should +precede the debugging information for variables and functions defined in +that block. Normally, in DBX format, the @code{N_LBRAC} symbol comes +first. + +@findex DBX_BLOCKS_FUNCTION_RELATIVE +@item DBX_BLOCKS_FUNCTION_RELATIVE +Define this macro if the value of a symbol describing the scope of a +block (@code{N_LBRAC} or @code{N_RBRAC}) should be relative to the start +of the enclosing function. Normally, GCC uses an absolute address. + +@findex DBX_USE_BINCL +@item DBX_USE_BINCL +Define this macro if GCC should generate @code{N_BINCL} and +@code{N_EINCL} stabs for included header files, as on Sun systems. This +macro also directs GCC to output a type number as a pair of a file +number and a type number within the file. Normally, GCC does not +generate @code{N_BINCL} or @code{N_EINCL} stabs, and it outputs a single +number for a type number. +@end table + +@node DBX Hooks +@subsection Open-Ended Hooks for DBX Format + +@c prevent bad page break with this line +These are hooks for DBX format. + +@table @code +@findex DBX_OUTPUT_LBRAC +@item DBX_OUTPUT_LBRAC (@var{stream}, @var{name}) +Define this macro to say how to output to @var{stream} the debugging +information for the start of a scope level for variable names. The +argument @var{name} is the name of an assembler symbol (for use with +@code{assemble_name}) whose value is the address where the scope begins. + +@findex DBX_OUTPUT_RBRAC +@item DBX_OUTPUT_RBRAC (@var{stream}, @var{name}) +Like @code{DBX_OUTPUT_LBRAC}, but for the end of a scope level. + +@findex DBX_OUTPUT_ENUM +@item DBX_OUTPUT_ENUM (@var{stream}, @var{type}) +Define this macro if the target machine requires special handling to +output an enumeration type. The definition should be a C statement +(sans semicolon) to output the appropriate information to @var{stream} +for the type @var{type}. + +@findex DBX_OUTPUT_FUNCTION_END +@item DBX_OUTPUT_FUNCTION_END (@var{stream}, @var{function}) +Define this macro if the target machine requires special output at the +end of the debugging information for a function. The definition should +be a C statement (sans semicolon) to output the appropriate information +to @var{stream}. @var{function} is the @code{FUNCTION_DECL} node for +the function. + +@findex DBX_OUTPUT_STANDARD_TYPES +@item DBX_OUTPUT_STANDARD_TYPES (@var{syms}) +Define this macro if you need to control the order of output of the +standard data types at the beginning of compilation. The argument +@var{syms} is a @code{tree} which is a chain of all the predefined +global symbols, including names of data types. + +Normally, DBX output starts with definitions of the types for integers +and characters, followed by all the other predefined types of the +particular language in no particular order. + +On some machines, it is necessary to output different particular types +first. To do this, define @code{DBX_OUTPUT_STANDARD_TYPES} to output +those symbols in the necessary order. Any predefined types that you +don't explicitly output will be output afterward in no particular order. + +Be careful not to define this macro so that it works only for C@. There +are no global variables to access most of the built-in types, because +another language may have another set of types. The way to output a +particular type is to look through @var{syms} to see if you can find it. +Here is an example: + +@smallexample +@{ + tree decl; + for (decl = syms; decl; decl = TREE_CHAIN (decl)) + if (!strcmp (IDENTIFIER_POINTER (DECL_NAME (decl)), + "long int")) + dbxout_symbol (decl); + @dots{} +@} +@end smallexample + +@noindent +This does nothing if the expected type does not exist. + +See the function @code{init_decl_processing} in @file{c-decl.c} to find +the names to use for all the built-in C types. + +Here is another way of finding a particular type: + +@c this is still overfull. --mew 10feb93 +@smallexample +@{ + tree decl; + for (decl = syms; decl; decl = TREE_CHAIN (decl)) + if (TREE_CODE (decl) == TYPE_DECL + && (TREE_CODE (TREE_TYPE (decl)) + == INTEGER_CST) + && TYPE_PRECISION (TREE_TYPE (decl)) == 16 + && TYPE_UNSIGNED (TREE_TYPE (decl))) +@group + /* @r{This must be @code{unsigned short}.} */ + dbxout_symbol (decl); + @dots{} +@} +@end group +@end smallexample + +@findex NO_DBX_FUNCTION_END +@item NO_DBX_FUNCTION_END +Some stabs encapsulation formats (in particular ECOFF), cannot handle the +@code{.stabs "",N_FUN,,0,0,Lscope-function-1} gdb dbx extension construct. +On those machines, define this macro to turn this feature off without +disturbing the rest of the gdb extensions. + +@end table + +@node File Names and DBX +@subsection File Names in DBX Format + +@c prevent bad page break with this line +This describes file names in DBX format. + +@table @code +@findex DBX_WORKING_DIRECTORY +@item DBX_WORKING_DIRECTORY +Define this if DBX wants to have the current directory recorded in each +object file. + +Note that the working directory is always recorded if GDB extensions are +enabled. + +@findex DBX_OUTPUT_MAIN_SOURCE_FILENAME +@item DBX_OUTPUT_MAIN_SOURCE_FILENAME (@var{stream}, @var{name}) +A C statement to output DBX debugging information to the stdio stream +@var{stream} which indicates that file @var{name} is the main source +file---the file specified as the input file for compilation. +This macro is called only once, at the beginning of compilation. + +This macro need not be defined if the standard form of output +for DBX debugging information is appropriate. + +@findex DBX_OUTPUT_MAIN_SOURCE_DIRECTORY +@item DBX_OUTPUT_MAIN_SOURCE_DIRECTORY (@var{stream}, @var{name}) +A C statement to output DBX debugging information to the stdio stream +@var{stream} which indicates that the current directory during +compilation is named @var{name}. + +This macro need not be defined if the standard form of output +for DBX debugging information is appropriate. + +@findex DBX_OUTPUT_MAIN_SOURCE_FILE_END +@item DBX_OUTPUT_MAIN_SOURCE_FILE_END (@var{stream}, @var{name}) +A C statement to output DBX debugging information at the end of +compilation of the main source file @var{name}. + +If you don't define this macro, nothing special is output at the end +of compilation, which is correct for most machines. + +@findex DBX_OUTPUT_SOURCE_FILENAME +@item DBX_OUTPUT_SOURCE_FILENAME (@var{stream}, @var{name}) +A C statement to output DBX debugging information to the stdio stream +@var{stream} which indicates that file @var{name} is the current source +file. This output is generated each time input shifts to a different +source file as a result of @samp{#include}, the end of an included file, +or a @samp{#line} command. + +This macro need not be defined if the standard form of output +for DBX debugging information is appropriate. +@end table + +@need 2000 +@node SDB and DWARF +@subsection Macros for SDB and DWARF Output + +@c prevent bad page break with this line +Here are macros for SDB and DWARF output. + +@table @code +@findex SDB_DEBUGGING_INFO +@item SDB_DEBUGGING_INFO +Define this macro if GCC should produce COFF-style debugging output +for SDB in response to the @option{-g} option. + +@findex DWARF_DEBUGGING_INFO +@item DWARF_DEBUGGING_INFO +Define this macro if GCC should produce dwarf format debugging output +in response to the @option{-g} option. + +@findex DWARF2_DEBUGGING_INFO +@item DWARF2_DEBUGGING_INFO +Define this macro if GCC should produce dwarf version 2 format +debugging output in response to the @option{-g} option. + +To support optional call frame debugging information, you must also +define @code{INCOMING_RETURN_ADDR_RTX} and either set +@code{RTX_FRAME_RELATED_P} on the prologue insns if you use RTL for the +prologue, or call @code{dwarf2out_def_cfa} and @code{dwarf2out_reg_save} +as appropriate from @code{TARGET_ASM_FUNCTION_PROLOGUE} if you don't. + +@findex DWARF2_FRAME_INFO +@item DWARF2_FRAME_INFO +Define this macro to a nonzero value if GCC should always output +Dwarf 2 frame information. If @code{DWARF2_UNWIND_INFO} +(@pxref{Exception Region Output} is nonzero, GCC will output this +information not matter how you define @code{DWARF2_FRAME_INFO}. + +@findex LINKER_DOES_NOT_WORK_WITH_DWARF2 +@item LINKER_DOES_NOT_WORK_WITH_DWARF2 +Define this macro if the linker does not work with Dwarf version 2. +Normally, if the user specifies only @option{-ggdb} GCC will use Dwarf +version 2 if available; this macro disables this. See the description +of the @code{PREFERRED_DEBUGGING_TYPE} macro for more details. + +@findex DWARF2_GENERATE_TEXT_SECTION_LABEL +@item DWARF2_GENERATE_TEXT_SECTION_LABEL +By default, the Dwarf 2 debugging information generator will generate a +label to mark the beginning of the text section. If it is better simply +to use the name of the text section itself, rather than an explicit label, +to indicate the beginning of the text section, define this macro to zero. + +@findex DWARF2_ASM_LINE_DEBUG_INFO +@item DWARF2_ASM_LINE_DEBUG_INFO +Define this macro to be a nonzero value if the assembler can generate Dwarf 2 +line debug info sections. This will result in much more compact line number +tables, and hence is desirable if it works. + +@findex PUT_SDB_@dots{} +@item PUT_SDB_@dots{} +Define these macros to override the assembler syntax for the special +SDB assembler directives. See @file{sdbout.c} for a list of these +macros and their arguments. If the standard syntax is used, you need +not define them yourself. + +@findex SDB_DELIM +@item SDB_DELIM +Some assemblers do not support a semicolon as a delimiter, even between +SDB assembler directives. In that case, define this macro to be the +delimiter to use (usually @samp{\n}). It is not necessary to define +a new set of @code{PUT_SDB_@var{op}} macros if this is the only change +required. + +@findex SDB_GENERATE_FAKE +@item SDB_GENERATE_FAKE +Define this macro to override the usual method of constructing a dummy +name for anonymous structure and union types. See @file{sdbout.c} for +more information. + +@findex SDB_ALLOW_UNKNOWN_REFERENCES +@item SDB_ALLOW_UNKNOWN_REFERENCES +Define this macro to allow references to unknown structure, +union, or enumeration tags to be emitted. Standard COFF does not +allow handling of unknown references, MIPS ECOFF has support for +it. + +@findex SDB_ALLOW_FORWARD_REFERENCES +@item SDB_ALLOW_FORWARD_REFERENCES +Define this macro to allow references to structure, union, or +enumeration tags that have not yet been seen to be handled. Some +assemblers choke if forward tags are used, while some require it. +@end table + +@need 2000 +@node VMS Debug +@subsection Macros for VMS Debug Format + +@c prevent bad page break with this line +Here are macros for VMS debug format. + +@table @code +@findex VMS_DEBUGGING_INFO +@item VMS_DEBUGGING_INFO +Define this macro if GCC should produce debugging output for VMS +in response to the @option{-g} option. The default behavior for VMS +is to generate minimal debug info for a traceback in the absence of +@option{-g} unless explicitly overridden with @option{-g0}. This +behavior is controlled by @code{OPTIMIZATION_OPTIONS} and +@code{OVERRIDE_OPTIONS}. +@end table + +@node Cross-compilation +@section Cross Compilation and Floating Point +@cindex cross compilation and floating point +@cindex floating point and cross compilation + +While all modern machines use 2's complement representation for integers, +there are a variety of representations for floating point numbers. This +means that in a cross-compiler the representation of floating point numbers +in the compiled program may be different from that used in the machine +doing the compilation. + +@findex atof +Because different representation systems may offer different amounts of +range and precision, the cross compiler cannot safely use the host +machine's floating point arithmetic. Therefore, floating point constants +must be represented in the target machine's format. This means that the +cross compiler cannot use @code{atof} to parse a floating point constant; +it must have its own special routine to use instead. Also, constant +folding must emulate the target machine's arithmetic (or must not be done +at all). + +The macros in the following table should be defined only if you are cross +compiling between different floating point formats. + +Otherwise, don't define them. Then default definitions will be set up which +use @code{double} as the data type, @code{==} to test for equality, etc. + +You don't need to worry about how many times you use an operand of any +of these macros. The compiler never uses operands which have side effects. + +@table @code +@findex REAL_VALUE_TYPE +@item REAL_VALUE_TYPE +A macro for the C data type to be used to hold a floating point value +in the target machine's format. Typically this would be a +@code{struct} containing an array of @code{int}. + +@findex REAL_VALUES_EQUAL +@item REAL_VALUES_EQUAL (@var{x}, @var{y}) +A macro for a C expression which compares for equality the two values, +@var{x} and @var{y}, both of type @code{REAL_VALUE_TYPE}. + +@findex REAL_VALUES_LESS +@item REAL_VALUES_LESS (@var{x}, @var{y}) +A macro for a C expression which tests whether @var{x} is less than +@var{y}, both values being of type @code{REAL_VALUE_TYPE} and +interpreted as floating point numbers in the target machine's +representation. + +@findex REAL_VALUE_LDEXP +@findex ldexp +@item REAL_VALUE_LDEXP (@var{x}, @var{scale}) +A macro for a C expression which performs the standard library +function @code{ldexp}, but using the target machine's floating point +representation. Both @var{x} and the value of the expression have +type @code{REAL_VALUE_TYPE}. The second argument, @var{scale}, is an +integer. + +@findex REAL_VALUE_FIX +@item REAL_VALUE_FIX (@var{x}) +A macro whose definition is a C expression to convert the target-machine +floating point value @var{x} to a signed integer. @var{x} has type +@code{REAL_VALUE_TYPE}. + +@findex REAL_VALUE_UNSIGNED_FIX +@item REAL_VALUE_UNSIGNED_FIX (@var{x}) +A macro whose definition is a C expression to convert the target-machine +floating point value @var{x} to an unsigned integer. @var{x} has type +@code{REAL_VALUE_TYPE}. + +@findex REAL_VALUE_RNDZINT +@item REAL_VALUE_RNDZINT (@var{x}) +A macro whose definition is a C expression to round the target-machine +floating point value @var{x} towards zero to an integer value (but still +as a floating point number). @var{x} has type @code{REAL_VALUE_TYPE}, +and so does the value. + +@findex REAL_VALUE_UNSIGNED_RNDZINT +@item REAL_VALUE_UNSIGNED_RNDZINT (@var{x}) +A macro whose definition is a C expression to round the target-machine +floating point value @var{x} towards zero to an unsigned integer value +(but still represented as a floating point number). @var{x} has type +@code{REAL_VALUE_TYPE}, and so does the value. + +@findex REAL_VALUE_ATOF +@item REAL_VALUE_ATOF (@var{string}, @var{mode}) +A macro for a C expression which converts @var{string}, an expression of +type @code{char *}, into a floating point number in the target machine's +representation for mode @var{mode}. The value has type +@code{REAL_VALUE_TYPE}. + +@findex REAL_INFINITY +@item REAL_INFINITY +Define this macro if infinity is a possible floating point value, and +therefore division by 0 is legitimate. + +@findex REAL_VALUE_ISINF +@findex isinf +@item REAL_VALUE_ISINF (@var{x}) +A macro for a C expression which determines whether @var{x}, a floating +point value, is infinity. The value has type @code{int}. +By default, this is defined to call @code{isinf}. + +@findex REAL_VALUE_ISNAN +@findex isnan +@item REAL_VALUE_ISNAN (@var{x}) +A macro for a C expression which determines whether @var{x}, a floating +point value, is a ``nan'' (not-a-number). The value has type +@code{int}. By default, this is defined to call @code{isnan}. +@end table + +@cindex constant folding and floating point +Define the following additional macros if you want to make floating +point constant folding work while cross compiling. If you don't +define them, cross compilation is still possible, but constant folding +will not happen for floating point values. + +@table @code +@findex REAL_ARITHMETIC +@item REAL_ARITHMETIC (@var{output}, @var{code}, @var{x}, @var{y}) +A macro for a C statement which calculates an arithmetic operation of +the two floating point values @var{x} and @var{y}, both of type +@code{REAL_VALUE_TYPE} in the target machine's representation, to +produce a result of the same type and representation which is stored +in @var{output} (which will be a variable). + +The operation to be performed is specified by @var{code}, a tree code +which will always be one of the following: @code{PLUS_EXPR}, +@code{MINUS_EXPR}, @code{MULT_EXPR}, @code{RDIV_EXPR}, +@code{MAX_EXPR}, @code{MIN_EXPR}. + +@cindex overflow while constant folding +The expansion of this macro is responsible for checking for overflow. +If overflow happens, the macro expansion should execute the statement +@code{return 0;}, which indicates the inability to perform the +arithmetic operation requested. + +@findex REAL_VALUE_NEGATE +@item REAL_VALUE_NEGATE (@var{x}) +A macro for a C expression which returns the negative of the floating +point value @var{x}. Both @var{x} and the value of the expression +have type @code{REAL_VALUE_TYPE} and are in the target machine's +floating point representation. + +There is no way for this macro to report overflow, since overflow +can't happen in the negation operation. + +@findex REAL_VALUE_TRUNCATE +@item REAL_VALUE_TRUNCATE (@var{mode}, @var{x}) +A macro for a C expression which converts the floating point value +@var{x} to mode @var{mode}. + +Both @var{x} and the value of the expression are in the target machine's +floating point representation and have type @code{REAL_VALUE_TYPE}. +However, the value should have an appropriate bit pattern to be output +properly as a floating constant whose precision accords with mode +@var{mode}. + +There is no way for this macro to report overflow. + +@findex REAL_VALUE_TO_INT +@item REAL_VALUE_TO_INT (@var{low}, @var{high}, @var{x}) +A macro for a C expression which converts a floating point value +@var{x} into a double-precision integer which is then stored into +@var{low} and @var{high}, two variables of type @var{int}. + +@item REAL_VALUE_FROM_INT (@var{x}, @var{low}, @var{high}, @var{mode}) +@findex REAL_VALUE_FROM_INT +A macro for a C expression which converts a double-precision integer +found in @var{low} and @var{high}, two variables of type @var{int}, +into a floating point value which is then stored into @var{x}. +The value is in the target machine's representation for mode @var{mode} +and has the type @code{REAL_VALUE_TYPE}. +@end table + +@node Mode Switching +@section Mode Switching Instructions +@cindex mode switching +The following macros control mode switching optimizations: + +@table @code +@findex OPTIMIZE_MODE_SWITCHING +@item OPTIMIZE_MODE_SWITCHING (@var{entity}) +Define this macro if the port needs extra instructions inserted for mode +switching in an optimizing compilation. + +For an example, the SH4 can perform both single and double precision +floating point operations, but to perform a single precision operation, +the FPSCR PR bit has to be cleared, while for a double precision +operation, this bit has to be set. Changing the PR bit requires a general +purpose register as a scratch register, hence these FPSCR sets have to +be inserted before reload, i.e.@: you can't put this into instruction emitting +or @code{MACHINE_DEPENDENT_REORG}. + +You can have multiple entities that are mode-switched, and select at run time +which entities actually need it. @code{OPTIMIZE_MODE_SWITCHING} should +return nonzero for any @var{entity} that needs mode-switching. +If you define this macro, you also have to define +@code{NUM_MODES_FOR_MODE_SWITCHING}, @code{MODE_NEEDED}, +@code{MODE_PRIORITY_TO_MODE} and @code{EMIT_MODE_SET}. +@code{NORMAL_MODE} is optional. + +@findex NUM_MODES_FOR_MODE_SWITCHING +@item NUM_MODES_FOR_MODE_SWITCHING +If you define @code{OPTIMIZE_MODE_SWITCHING}, you have to define this as +initializer for an array of integers. Each initializer element +N refers to an entity that needs mode switching, and specifies the number +of different modes that might need to be set for this entity. +The position of the initializer in the initializer - starting counting at +zero - determines the integer that is used to refer to the mode-switched +entity in question. +In macros that take mode arguments / yield a mode result, modes are +represented as numbers 0 @dots{} N @minus{} 1. N is used to specify that no mode +switch is needed / supplied. + +@findex MODE_NEEDED +@item MODE_NEEDED (@var{entity}, @var{insn}) +@var{entity} is an integer specifying a mode-switched entity. If +@code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to +return an integer value not larger than the corresponding element in +@code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must +be switched into prior to the execution of @var{insn}. + +@findex NORMAL_MODE +@item NORMAL_MODE (@var{entity}) +If this macro is defined, it is evaluated for every @var{entity} that needs +mode switching. It should evaluate to an integer, which is a mode that +@var{entity} is assumed to be switched to at function entry and exit. + +@findex MODE_PRIORITY_TO_MODE +@item MODE_PRIORITY_TO_MODE (@var{entity}, @var{n}) +This macro specifies the order in which modes for @var{entity} are processed. +0 is the highest priority, @code{NUM_MODES_FOR_MODE_SWITCHING[@var{entity}] - 1} the +lowest. The value of the macro should be an integer designating a mode +for @var{entity}. For any fixed @var{entity}, @code{mode_priority_to_mode} +(@var{entity}, @var{n}) shall be a bijection in 0 @dots{} +@code{num_modes_for_mode_switching[@var{entity}] - 1}. + +@findex EMIT_MODE_SET +@item EMIT_MODE_SET (@var{entity}, @var{mode}, @var{hard_regs_live}) +Generate one or more insns to set @var{entity} to @var{mode}. +@var{hard_reg_live} is the set of hard registers live at the point where +the insn(s) are to be inserted. +@end table + +@node Target Attributes +@section Defining target-specific uses of @code{__attribute__} +@cindex target attributes +@cindex machine attributes +@cindex attributes, target-specific + +Target-specific attributes may be defined for functions, data and types. +These are described using the following target hooks; they also need to +be documented in @file{extend.texi}. + +@deftypevr {Target Hook} {const struct attribute_spec *} TARGET_ATTRIBUTE_TABLE +If defined, this target hook points to an array of @samp{struct +attribute_spec} (defined in @file{tree.h}) specifying the machine +specific attributes for this target and some of the restrictions on the +entities to which these attributes are applied and the arguments they +take. +@end deftypevr + +@deftypefn {Target Hook} int TARGET_COMP_TYPE_ATTRIBUTES (tree @var{type1}, tree @var{type2}) +If defined, this target hook is a function which returns zero if the attributes on +@var{type1} and @var{type2} are incompatible, one if they are compatible, +and two if they are nearly compatible (which causes a warning to be +generated). If this is not defined, machine-specific attributes are +supposed always to be compatible. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_SET_DEFAULT_TYPE_ATTRIBUTES (tree @var{type}) +If defined, this target hook is a function which assigns default attributes to +newly defined @var{type}. +@end deftypefn + +@deftypefn {Target Hook} tree TARGET_MERGE_TYPE_ATTRIBUTES (tree @var{type1}, tree @var{type2}) +Define this target hook if the merging of type attributes needs special +handling. If defined, the result is a list of the combined +@code{TYPE_ATTRIBUTES} of @var{type1} and @var{type2}. It is assumed +that @code{comptypes} has already been called and returned 1. This +function may call @code{merge_attributes} to handle machine-independent +merging. +@end deftypefn + +@deftypefn {Target Hook} tree TARGET_MERGE_DECL_ATTRIBUTES (tree @var{olddecl}, tree @var{newdecl}) +Define this target hook if the merging of decl attributes needs special +handling. If defined, the result is a list of the combined +@code{DECL_ATTRIBUTES} of @var{olddecl} and @var{newdecl}. +@var{newdecl} is a duplicate declaration of @var{olddecl}. Examples of +when this is needed are when one attribute overrides another, or when an +attribute is nullified by a subsequent definition. This function may +call @code{merge_attributes} to handle machine-independent merging. + +@findex TARGET_DLLIMPORT_DECL_ATTRIBUTES +If the only target-specific handling you require is @samp{dllimport} for +Windows targets, you should define the macro +@code{TARGET_DLLIMPORT_DECL_ATTRIBUTES}. This links in a function +called @code{merge_dllimport_decl_attributes} which can then be defined +as the expansion of @code{TARGET_MERGE_DECL_ATTRIBUTES}. This is done +in @file{i386/cygwin.h} and @file{i386/i386.c}, for example. +@end deftypefn + +@deftypefn {Target Hook} void TARGET_INSERT_ATTRIBUTES (tree @var{node}, tree *@var{attr_ptr}) +Define this target hook if you want to be able to add attributes to a decl +when it is being created. This is normally useful for back ends which +wish to implement a pragma by using the attributes which correspond to +the pragma's effect. The @var{node} argument is the decl which is being +created. The @var{attr_ptr} argument is a pointer to the attribute list +for this decl. The list itself should not be modified, since it may be +shared with other decls, but attributes may be chained on the head of +the list and @code{*@var{attr_ptr}} modified to point to the new +attributes, or a copy of the list may be made if further changes are +needed. +@end deftypefn + +@deftypefn {Target Hook} bool TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P (tree @var{fndecl}) +@cindex inlining +This target hook returns @code{true} if it is ok to inline @var{fndecl} +into the current function, despite its having target-specific +attributes, @code{false} otherwise. By default, if a function has a +target specific attribute attached to it, it will not be inlined. +@end deftypefn + +@node Misc +@section Miscellaneous Parameters +@cindex parameters, miscellaneous + +@c prevent bad page break with this line +Here are several miscellaneous parameters. + +@table @code +@item PREDICATE_CODES +@findex PREDICATE_CODES +Define this if you have defined special-purpose predicates in the file +@file{@var{machine}.c}. This macro is called within an initializer of an +array of structures. The first field in the structure is the name of a +predicate and the second field is an array of rtl codes. For each +predicate, list all rtl codes that can be in expressions matched by the +predicate. The list should have a trailing comma. Here is an example +of two entries in the list for a typical RISC machine: + +@smallexample +#define PREDICATE_CODES \ + @{"gen_reg_rtx_operand", @{SUBREG, REG@}@}, \ + @{"reg_or_short_cint_operand", @{SUBREG, REG, CONST_INT@}@}, +@end smallexample + +Defining this macro does not affect the generated code (however, +incorrect definitions that omit an rtl code that may be matched by the +predicate can cause the compiler to malfunction). Instead, it allows +the table built by @file{genrecog} to be more compact and efficient, +thus speeding up the compiler. The most important predicates to include +in the list specified by this macro are those used in the most insn +patterns. + +For each predicate function named in @code{PREDICATE_CODES}, a +declaration will be generated in @file{insn-codes.h}. + +@item SPECIAL_MODE_PREDICATES +@findex SPECIAL_MODE_PREDICATES +Define this if you have special predicates that know special things +about modes. Genrecog will warn about certain forms of +@code{match_operand} without a mode; if the operand predicate is +listed in @code{SPECIAL_MODE_PREDICATES}, the warning will be +suppressed. + +Here is an example from the IA-32 port (@code{ext_register_operand} +specially checks for @code{HImode} or @code{SImode} in preparation +for a byte extraction from @code{%ah} etc.). + +@smallexample +#define SPECIAL_MODE_PREDICATES \ + "ext_register_operand", +@end smallexample + +@findex CASE_VECTOR_MODE +@item CASE_VECTOR_MODE +An alias for a machine mode name. This is the machine mode that +elements of a jump-table should have. + +@findex CASE_VECTOR_SHORTEN_MODE +@item CASE_VECTOR_SHORTEN_MODE (@var{min_offset}, @var{max_offset}, @var{body}) +Optional: return the preferred mode for an @code{addr_diff_vec} +when the minimum and maximum offset are known. If you define this, +it enables extra code in branch shortening to deal with @code{addr_diff_vec}. +To make this work, you also have to define INSN_ALIGN and +make the alignment for @code{addr_diff_vec} explicit. +The @var{body} argument is provided so that the offset_unsigned and scale +flags can be updated. + +@findex CASE_VECTOR_PC_RELATIVE +@item CASE_VECTOR_PC_RELATIVE +Define this macro to be a C expression to indicate when jump-tables +should contain relative addresses. If jump-tables never contain +relative addresses, then you need not define this macro. + +@findex CASE_DROPS_THROUGH +@item CASE_DROPS_THROUGH +Define this if control falls through a @code{case} insn when the index +value is out of range. This means the specified default-label is +actually ignored by the @code{case} insn proper. + +@findex CASE_VALUES_THRESHOLD +@item CASE_VALUES_THRESHOLD +Define this to be the smallest number of different values for which it +is best to use a jump-table instead of a tree of conditional branches. +The default is four for machines with a @code{casesi} instruction and +five otherwise. This is best for most machines. + +@findex WORD_REGISTER_OPERATIONS +@item WORD_REGISTER_OPERATIONS +Define this macro if operations between registers with integral mode +smaller than a word are always performed on the entire register. +Most RISC machines have this property and most CISC machines do not. + +@findex LOAD_EXTEND_OP +@item LOAD_EXTEND_OP (@var{mode}) +Define this macro to be a C expression indicating when insns that read +memory in @var{mode}, an integral mode narrower than a word, set the +bits outside of @var{mode} to be either the sign-extension or the +zero-extension of the data read. Return @code{SIGN_EXTEND} for values +of @var{mode} for which the +insn sign-extends, @code{ZERO_EXTEND} for which it zero-extends, and +@code{NIL} for other modes. + +This macro is not called with @var{mode} non-integral or with a width +greater than or equal to @code{BITS_PER_WORD}, so you may return any +value in this case. Do not define this macro if it would always return +@code{NIL}. On machines where this macro is defined, you will normally +define it as the constant @code{SIGN_EXTEND} or @code{ZERO_EXTEND}. + +@findex SHORT_IMMEDIATES_SIGN_EXTEND +@item SHORT_IMMEDIATES_SIGN_EXTEND +Define this macro if loading short immediate values into registers sign +extends. + +@findex FIXUNS_TRUNC_LIKE_FIX_TRUNC +@item FIXUNS_TRUNC_LIKE_FIX_TRUNC +Define this macro if the same instructions that convert a floating +point number to a signed fixed point number also convert validly to an +unsigned one. + +@findex MOVE_MAX +@item MOVE_MAX +The maximum number of bytes that a single instruction can move quickly +between memory and registers or between two memory locations. + +@findex MAX_MOVE_MAX +@item MAX_MOVE_MAX +The maximum number of bytes that a single instruction can move quickly +between memory and registers or between two memory locations. If this +is undefined, the default is @code{MOVE_MAX}. Otherwise, it is the +constant value that is the largest value that @code{MOVE_MAX} can have +at run-time. + +@findex SHIFT_COUNT_TRUNCATED +@item SHIFT_COUNT_TRUNCATED +A C expression that is nonzero if on this machine the number of bits +actually used for the count of a shift operation is equal to the number +of bits needed to represent the size of the object being shifted. When +this macro is nonzero, the compiler will assume that it is safe to omit +a sign-extend, zero-extend, and certain bitwise `and' instructions that +truncates the count of a shift operation. On machines that have +instructions that act on bit-fields at variable positions, which may +include `bit test' instructions, a nonzero @code{SHIFT_COUNT_TRUNCATED} +also enables deletion of truncations of the values that serve as +arguments to bit-field instructions. + +If both types of instructions truncate the count (for shifts) and +position (for bit-field operations), or if no variable-position bit-field +instructions exist, you should define this macro. + +However, on some machines, such as the 80386 and the 680x0, truncation +only applies to shift operations and not the (real or pretended) +bit-field operations. Define @code{SHIFT_COUNT_TRUNCATED} to be zero on +such machines. Instead, add patterns to the @file{md} file that include +the implied truncation of the shift instructions. + +You need not define this macro if it would always have the value of zero. + +@findex TRULY_NOOP_TRUNCATION +@item TRULY_NOOP_TRUNCATION (@var{outprec}, @var{inprec}) +A C expression which is nonzero if on this machine it is safe to +``convert'' an integer of @var{inprec} bits to one of @var{outprec} +bits (where @var{outprec} is smaller than @var{inprec}) by merely +operating on it as if it had only @var{outprec} bits. + +On many machines, this expression can be 1. + +@c rearranged this, removed the phrase "it is reported that". this was +@c to fix an overfull hbox. --mew 10feb93 +When @code{TRULY_NOOP_TRUNCATION} returns 1 for a pair of sizes for +modes for which @code{MODES_TIEABLE_P} is 0, suboptimal code can result. +If this is the case, making @code{TRULY_NOOP_TRUNCATION} return 0 in +such cases may improve things. + +@findex STORE_FLAG_VALUE +@item STORE_FLAG_VALUE +A C expression describing the value returned by a comparison operator +with an integral mode and stored by a store-flag instruction +(@samp{s@var{cond}}) when the condition is true. This description must +apply to @emph{all} the @samp{s@var{cond}} patterns and all the +comparison operators whose results have a @code{MODE_INT} mode. + +A value of 1 or @minus{}1 means that the instruction implementing the +comparison operator returns exactly 1 or @minus{}1 when the comparison is true +and 0 when the comparison is false. Otherwise, the value indicates +which bits of the result are guaranteed to be 1 when the comparison is +true. This value is interpreted in the mode of the comparison +operation, which is given by the mode of the first operand in the +@samp{s@var{cond}} pattern. Either the low bit or the sign bit of +@code{STORE_FLAG_VALUE} be on. Presently, only those bits are used by +the compiler. + +If @code{STORE_FLAG_VALUE} is neither 1 or @minus{}1, the compiler will +generate code that depends only on the specified bits. It can also +replace comparison operators with equivalent operations if they cause +the required bits to be set, even if the remaining bits are undefined. +For example, on a machine whose comparison operators return an +@code{SImode} value and where @code{STORE_FLAG_VALUE} is defined as +@samp{0x80000000}, saying that just the sign bit is relevant, the +expression + +@smallexample +(ne:SI (and:SI @var{x} (const_int @var{power-of-2})) (const_int 0)) +@end smallexample + +@noindent +can be converted to + +@smallexample +(ashift:SI @var{x} (const_int @var{n})) +@end smallexample + +@noindent +where @var{n} is the appropriate shift count to move the bit being +tested into the sign bit. + +There is no way to describe a machine that always sets the low-order bit +for a true value, but does not guarantee the value of any other bits, +but we do not know of any machine that has such an instruction. If you +are trying to port GCC to such a machine, include an instruction to +perform a logical-and of the result with 1 in the pattern for the +comparison operators and let us know at @email{gcc@@gcc.gnu.org}. + +Often, a machine will have multiple instructions that obtain a value +from a comparison (or the condition codes). Here are rules to guide the +choice of value for @code{STORE_FLAG_VALUE}, and hence the instructions +to be used: + +@itemize @bullet +@item +Use the shortest sequence that yields a valid definition for +@code{STORE_FLAG_VALUE}. It is more efficient for the compiler to +``normalize'' the value (convert it to, e.g., 1 or 0) than for the +comparison operators to do so because there may be opportunities to +combine the normalization with other operations. + +@item +For equal-length sequences, use a value of 1 or @minus{}1, with @minus{}1 being +slightly preferred on machines with expensive jumps and 1 preferred on +other machines. + +@item +As a second choice, choose a value of @samp{0x80000001} if instructions +exist that set both the sign and low-order bits but do not define the +others. + +@item +Otherwise, use a value of @samp{0x80000000}. +@end itemize + +Many machines can produce both the value chosen for +@code{STORE_FLAG_VALUE} and its negation in the same number of +instructions. On those machines, you should also define a pattern for +those cases, e.g., one matching + +@smallexample +(set @var{A} (neg:@var{m} (ne:@var{m} @var{B} @var{C}))) +@end smallexample + +Some machines can also perform @code{and} or @code{plus} operations on +condition code values with less instructions than the corresponding +@samp{s@var{cond}} insn followed by @code{and} or @code{plus}. On those +machines, define the appropriate patterns. Use the names @code{incscc} +and @code{decscc}, respectively, for the patterns which perform +@code{plus} or @code{minus} operations on condition code values. See +@file{rs6000.md} for some examples. The GNU Superoptizer can be used to +find such instruction sequences on other machines. + +You need not define @code{STORE_FLAG_VALUE} if the machine has no store-flag +instructions. + +@findex FLOAT_STORE_FLAG_VALUE +@item FLOAT_STORE_FLAG_VALUE (@var{mode}) +A C expression that gives a nonzero @code{REAL_VALUE_TYPE} value that is +returned when comparison operators with floating-point results are true. +Define this macro on machine that have comparison operations that return +floating-point values. If there are no such operations, do not define +this macro. + +@findex Pmode +@item Pmode +An alias for the machine mode for pointers. On most machines, define +this to be the integer mode corresponding to the width of a hardware +pointer; @code{SImode} on 32-bit machine or @code{DImode} on 64-bit machines. +On some machines you must define this to be one of the partial integer +modes, such as @code{PSImode}. + +The width of @code{Pmode} must be at least as large as the value of +@code{POINTER_SIZE}. If it is not equal, you must define the macro +@code{POINTERS_EXTEND_UNSIGNED} to specify how pointers are extended +to @code{Pmode}. + +@findex FUNCTION_MODE +@item FUNCTION_MODE +An alias for the machine mode used for memory references to functions +being called, in @code{call} RTL expressions. On most machines this +should be @code{QImode}. + +@findex INTEGRATE_THRESHOLD +@item INTEGRATE_THRESHOLD (@var{decl}) +A C expression for the maximum number of instructions above which the +function @var{decl} should not be inlined. @var{decl} is a +@code{FUNCTION_DECL} node. + +The default definition of this macro is 64 plus 8 times the number of +arguments that the function accepts. Some people think a larger +threshold should be used on RISC machines. + +@findex STDC_0_IN_SYSTEM_HEADERS +@item STDC_0_IN_SYSTEM_HEADERS +In normal operation, the preprocessor expands @code{__STDC__} to the +constant 1, to signify that GCC conforms to ISO Standard C@. On some +hosts, like Solaris, the system compiler uses a different convention, +where @code{__STDC__} is normally 0, but is 1 if the user specifies +strict conformance to the C Standard. + +Defining @code{STDC_0_IN_SYSTEM_HEADERS} makes GNU CPP follows the host +convention when processing system header files, but when processing user +files @code{__STDC__} will always expand to 1. + +@findex SCCS_DIRECTIVE +@item SCCS_DIRECTIVE +Define this if the preprocessor should ignore @code{#sccs} directives +and print no error message. + +@findex NO_IMPLICIT_EXTERN_C +@item NO_IMPLICIT_EXTERN_C +Define this macro if the system header files support C++ as well as C@. +This macro inhibits the usual method of using system header files in +C++, which is to pretend that the file's contents are enclosed in +@samp{extern "C" @{@dots{}@}}. + +@findex HANDLE_PRAGMA +@item HANDLE_PRAGMA (@var{getc}, @var{ungetc}, @var{name}) +This macro is no longer supported. You must use +@code{REGISTER_TARGET_PRAGMAS} instead. + +@findex REGISTER_TARGET_PRAGMAS +@findex #pragma +@findex pragma +@item REGISTER_TARGET_PRAGMAS (@var{pfile}) +Define this macro if you want to implement any target-specific pragmas. +If defined, it is a C expression which makes a series of calls to +@code{cpp_register_pragma} for each pragma, with @var{pfile} passed as +the first argument to to these functions. The macro may also do any +setup required for the pragmas. + +The primary reason to define this macro is to provide compatibility with +other compilers for the same target. In general, we discourage +definition of target-specific pragmas for GCC@. + +If the pragma can be implemented by attributes then you should consider +defining the target hook @samp{TARGET_INSERT_ATTRIBUTES} as well. + +Preprocessor macros that appear on pragma lines are not expanded. All +@samp{#pragma} directives that do not match any registered pragma are +silently ignored, unless the user specifies @option{-Wunknown-pragmas}. + +@deftypefun void cpp_register_pragma (cpp_reader *@var{pfile}, const char *@var{space}, const char *@var{name}, void (*@var{callback}) (cpp_reader *)) + +Each call to @code{cpp_register_pragma} establishes one pragma. The +@var{callback} routine will be called when the preprocessor encounters a +pragma of the form + +@smallexample +#pragma [@var{space}] @var{name} @dots{} +@end smallexample + +@var{space} is the case-sensitive namespace of the pragma, or +@code{NULL} to put the pragma in the global namespace. The callback +routine receives @var{pfile} as its first argument, which can be passed +on to cpplib's functions if necessary. You can lex tokens after the +@var{name} by calling @code{c_lex}. Tokens that are not read by the +callback will be silently ignored. The end of the line is indicated by +a token of type @code{CPP_EOF}. + +For an example use of this routine, see @file{c4x.h} and the callback +routines defined in @file{c4x-c.c}. + +Note that the use of @code{c_lex} is specific to the C and C++ +compilers. It will not work in the Java or Fortran compilers, or any +other language compilers for that matter. Thus if @code{c_lex} is going +to be called from target-specific code, it must only be done so when +building the C and C++ compilers. This can be done by defining the +variables @code{c_target_objs} and @code{cxx_target_objs} in the +target entry in the @file{config.gcc} file. These variables should name +the target-specific, language-specific object file which contains the +code that uses @code{c_lex}. Note it will also be necessary to add a +rule to the makefile fragment pointed to by @code{tmake_file} that shows +how to build this object file. +@end deftypefun + +@findex HANDLE_SYSV_PRAGMA +@findex #pragma +@findex pragma +@item HANDLE_SYSV_PRAGMA +Define this macro (to a value of 1) if you want the System V style +pragmas @samp{#pragma pack(<n>)} and @samp{#pragma weak <name> +[=<value>]} to be supported by gcc. + +The pack pragma specifies the maximum alignment (in bytes) of fields +within a structure, in much the same way as the @samp{__aligned__} and +@samp{__packed__} @code{__attribute__}s do. A pack value of zero resets +the behavior to the default. + +The weak pragma only works if @code{SUPPORTS_WEAK} and +@code{ASM_WEAKEN_LABEL} are defined. If enabled it allows the creation +of specifically named weak labels, optionally with a value. + +@findex HANDLE_PRAGMA_PACK_PUSH_POP +@findex #pragma +@findex pragma +@item HANDLE_PRAGMA_PACK_PUSH_POP +Define this macro (to a value of 1) if you want to support the Win32 +style pragmas @samp{#pragma pack(push,@var{n})} and @samp{#pragma +pack(pop)}. The @samp{pack(push,@var{n})} pragma specifies the maximum alignment +(in bytes) of fields within a structure, in much the same way as the +@samp{__aligned__} and @samp{__packed__} @code{__attribute__}s do. A +pack value of zero resets the behavior to the default. Successive +invocations of this pragma cause the previous values to be stacked, so +that invocations of @samp{#pragma pack(pop)} will return to the previous +value. + +@findex DOLLARS_IN_IDENTIFIERS +@item DOLLARS_IN_IDENTIFIERS +Define this macro to control use of the character @samp{$} in identifier +names. 0 means @samp{$} is not allowed by default; 1 means it is allowed. +1 is the default; there is no need to define this macro in that case. +This macro controls the compiler proper; it does not affect the preprocessor. + +@findex NO_DOLLAR_IN_LABEL +@item NO_DOLLAR_IN_LABEL +Define this macro if the assembler does not accept the character +@samp{$} in label names. By default constructors and destructors in +G++ have @samp{$} in the identifiers. If this macro is defined, +@samp{.} is used instead. + +@findex NO_DOT_IN_LABEL +@item NO_DOT_IN_LABEL +Define this macro if the assembler does not accept the character +@samp{.} in label names. By default constructors and destructors in G++ +have names that use @samp{.}. If this macro is defined, these names +are rewritten to avoid @samp{.}. + +@findex DEFAULT_MAIN_RETURN +@item DEFAULT_MAIN_RETURN +Define this macro if the target system expects every program's @code{main} +function to return a standard ``success'' value by default (if no other +value is explicitly returned). + +The definition should be a C statement (sans semicolon) to generate the +appropriate rtl instructions. It is used only when compiling the end of +@code{main}. + +@item NEED_ATEXIT +@findex NEED_ATEXIT +Define this if the target system lacks the function @code{atexit} +from the ISO C standard. If this macro is defined, a default definition +will be provided to support C++. If @code{ON_EXIT} is not defined, +a default @code{exit} function will also be provided. + +@item ON_EXIT +@findex ON_EXIT +Define this macro if the target has another way to implement atexit +functionality without replacing @code{exit}. For instance, SunOS 4 has +a similar @code{on_exit} library function. + +The definition should be a functional macro which can be used just like +the @code{atexit} function. + +@item EXIT_BODY +@findex EXIT_BODY +Define this if your @code{exit} function needs to do something +besides calling an external function @code{_cleanup} before +terminating with @code{_exit}. The @code{EXIT_BODY} macro is +only needed if @code{NEED_ATEXIT} is defined and @code{ON_EXIT} is not +defined. + +@findex INSN_SETS_ARE_DELAYED +@item INSN_SETS_ARE_DELAYED (@var{insn}) +Define this macro as a C expression that is nonzero if it is safe for the +delay slot scheduler to place instructions in the delay slot of @var{insn}, +even if they appear to use a resource set or clobbered in @var{insn}. +@var{insn} is always a @code{jump_insn} or an @code{insn}; GCC knows that +every @code{call_insn} has this behavior. On machines where some @code{insn} +or @code{jump_insn} is really a function call and hence has this behavior, +you should define this macro. + +You need not define this macro if it would always return zero. + +@findex INSN_REFERENCES_ARE_DELAYED +@item INSN_REFERENCES_ARE_DELAYED (@var{insn}) +Define this macro as a C expression that is nonzero if it is safe for the +delay slot scheduler to place instructions in the delay slot of @var{insn}, +even if they appear to set or clobber a resource referenced in @var{insn}. +@var{insn} is always a @code{jump_insn} or an @code{insn}. On machines where +some @code{insn} or @code{jump_insn} is really a function call and its operands +are registers whose use is actually in the subroutine it calls, you should +define this macro. Doing so allows the delay slot scheduler to move +instructions which copy arguments into the argument registers into the delay +slot of @var{insn}. + +You need not define this macro if it would always return zero. + +@findex MACHINE_DEPENDENT_REORG +@item MACHINE_DEPENDENT_REORG (@var{insn}) +In rare cases, correct code generation requires extra machine +dependent processing between the second jump optimization pass and +delayed branch scheduling. On those machines, define this macro as a C +statement to act on the code starting at @var{insn}. + +@findex MULTIPLE_SYMBOL_SPACES +@item MULTIPLE_SYMBOL_SPACES +Define this macro if in some cases global symbols from one translation +unit may not be bound to undefined symbols in another translation unit +without user intervention. For instance, under Microsoft Windows +symbols must be explicitly imported from shared libraries (DLLs). + +@findex MD_ASM_CLOBBERS +@item MD_ASM_CLOBBERS (@var{clobbers}) +A C statement that adds to @var{clobbers} @code{STRING_CST} trees for +any hard regs the port wishes to automatically clobber for all asms. + +@findex MAX_INTEGER_COMPUTATION_MODE +@item MAX_INTEGER_COMPUTATION_MODE +Define this to the largest integer machine mode which can be used for +operations other than load, store and copy operations. + +You need only define this macro if the target holds values larger than +@code{word_mode} in general purpose registers. Most targets should not define +this macro. + +@findex MATH_LIBRARY +@item MATH_LIBRARY +Define this macro as a C string constant for the linker argument to link +in the system math library, or @samp{""} if the target does not have a +separate math library. + +You need only define this macro if the default of @samp{"-lm"} is wrong. + +@findex LIBRARY_PATH_ENV +@item LIBRARY_PATH_ENV +Define this macro as a C string constant for the environment variable that +specifies where the linker should look for libraries. + +You need only define this macro if the default of @samp{"LIBRARY_PATH"} +is wrong. + +@findex TARGET_HAS_F_SETLKW +@item TARGET_HAS_F_SETLKW +Define this macro if the target supports file locking with fcntl / F_SETLKW@. +Note that this functionality is part of POSIX@. +Defining @code{TARGET_HAS_F_SETLKW} will enable the test coverage code +to use file locking when exiting a program, which avoids race conditions +if the program has forked. + +@findex MAX_CONDITIONAL_EXECUTE +@item MAX_CONDITIONAL_EXECUTE + +A C expression for the maximum number of instructions to execute via +conditional execution instructions instead of a branch. A value of +@code{BRANCH_COST}+1 is the default if the machine does not use cc0, and +1 if it does use cc0. + +@findex IFCVT_MODIFY_TESTS +@item IFCVT_MODIFY_TESTS +A C expression to modify the tests in @code{TRUE_EXPR}, and +@code{FALSE_EXPR} for use in converting insns in @code{TEST_BB}, +@code{THEN_BB}, @code{ELSE_BB}, and @code{JOIN_BB} basic blocks to +conditional execution. Set either @code{TRUE_EXPR} or @code{FALSE_EXPR} +to a null pointer if the tests cannot be converted. + +@findex IFCVT_MODIFY_INSN +@item IFCVT_MODIFY_INSN +A C expression to modify the @code{PATTERN} of an @code{INSN} that is to +be converted to conditional execution format. + +@findex IFCVT_MODIFY_FINAL +@item IFCVT_MODIFY_FINAL +A C expression to perform any final machine dependent modifications in +converting code to conditional execution in the basic blocks +@code{TEST_BB}, @code{THEN_BB}, @code{ELSE_BB}, and @code{JOIN_BB}. + +@findex IFCVT_MODIFY_CANCEL +@item IFCVT_MODIFY_CANCEL +A C expression to cancel any machine dependent modifications in +converting code to conditional execution in the basic blocks +@code{TEST_BB}, @code{THEN_BB}, @code{ELSE_BB}, and @code{JOIN_BB}. +@end table + +@deftypefn {Target Hook} void TARGET_INIT_BUILTINS () +Define this hook if you have any machine-specific built-in functions +that need to be defined. It should be a function that performs the +necessary setup. + +Machine specific built-in functions can be useful to expand special machine +instructions that would otherwise not normally be generated because +they have no equivalent in the source language (for example, SIMD vector +instructions or prefetch instructions). + +To create a built-in function, call the function @code{builtin_function} +which is defined by the language front end. You can use any type nodes set +up by @code{build_common_tree_nodes} and @code{build_common_tree_nodes_2}; +only language front ends that use those two functions will call +@samp{TARGET_INIT_BUILTINS}. +@end deftypefn + +@deftypefn {Target Hook} rtx TARGET_EXPAND_BUILTIN (tree @var{exp}, rtx @var{target}, rtx @var{subtarget}, enum machine_mode @var{mode}, int @var{ignore}) + +Expand a call to a machine specific built-in function that was set up by +@samp{TARGET_INIT_BUILTINS}. @var{exp} is the expression for the +function call; the result should go to @var{target} if that is +convenient, and have mode @var{mode} if that is convenient. +@var{subtarget} may be used as the target for computing one of +@var{exp}'s operands. @var{ignore} is nonzero if the value is to be +ignored. This function should return the result of the call to the +built-in function. +@end deftypefn + +@table @code +@findex MD_CAN_REDIRECT_BRANCH +@item MD_CAN_REDIRECT_BRANCH(@var{branch1}, @var{branch2}) + +Take a branch insn in @var{branch1} and another in @var{branch2}. +Return true if redirecting @var{branch1} to the destination of +@var{branch2} is possible. + +On some targets, branches may have a limited range. Optimizing the +filling of delay slots can result in branches being redirected, and this +may in turn cause a branch offset to overflow. + +@findex ALLOCATE_INITIAL_VALUE +@item ALLOCATE_INITIAL_VALUE(@var{hard_reg}) + +When the initial value of a hard register has been copied in a pseudo +register, it is often not necessary to actually allocate another register +to this pseudo register, because the original hard register or a stack slot +it has been saved into can be used. @code{ALLOCATE_INITIAL_VALUE}, if +defined, is called at the start of register allocation once for each +hard register that had its initial value copied by using +@code{get_func_hard_reg_initial_val} or @code{get_hard_reg_initial_val}. +Possible values are @code{NULL_RTX}, if you don't want +to do any special allocation, a @code{REG} rtx---that would typically be +the hard register itself, if it is known not to be clobbered---or a +@code{MEM}. +If you are returning a @code{MEM}, this is only a hint for the allocator; +it might decide to use another register anyways. +You may use @code{current_function_leaf_function} in the definition of the +macro, functions that use @code{REG_N_SETS}, to determine if the hard +register in question will not be clobbered. + +@findex TARGET_OBJECT_SUFFIX +@item TARGET_OBJECT_SUFFIX +Define this macro to be a C string representing the suffix for object +files on your target machine. If you do not define this macro, GCC will +use @samp{.o} as the suffix for object files. + +@findex TARGET_EXECUTABLE_SUFFIX +@item TARGET_EXECUTABLE_SUFFIX +Define this macro to be a C string representing the suffix to be +automatically added to executable files on your target machine. If you +do not define this macro, GCC will use the null string as the suffix for +executable files. + +@findex COLLECT_EXPORT_LIST +@item COLLECT_EXPORT_LIST +If defined, @code{collect2} will scan the individual object files +specified on its command line and create an export list for the linker. +Define this macro for systems like AIX, where the linker discards +object files that are not referenced from @code{main} and uses export +lists. + +@end table |