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-/* Definitions of target machine for GCC, for Sun SPARC.
- Copyright (C) 2002, 2004 Free Software Foundation, Inc.
- Contributed by Michael Tiemann (tiemann@cygnus.com).
- 64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
- at Cygnus Support.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 51 Franklin Street, Fifth Floor,
-Boston, MA 02110-1301, USA. */
-
-/* 128-bit floating point */
-FLOAT_MODE (TF, 16, ieee_quad_format);
-
-/* Add any extra modes needed to represent the condition code.
-
- On the SPARC, we have a "no-overflow" mode which is used when an add or
- subtract insn is used to set the condition code. Different branches are
- used in this case for some operations.
-
- We also have two modes to indicate that the relevant condition code is
- in the floating-point condition code register. One for comparisons which
- will generate an exception if the result is unordered (CCFPEmode) and
- one for comparisons which will never trap (CCFPmode).
-
- CCXmode and CCX_NOOVmode are only used by v9. */
-
-CC_MODE (CCX);
-CC_MODE (CC_NOOV);
-CC_MODE (CCX_NOOV);
-CC_MODE (CCFP);
-CC_MODE (CCFPE);
-
-/* Vector modes. */
-VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
-VECTOR_MODES (INT, 4); /* V4QI V2HI */