diff options
Diffstat (limited to 'Bindings/mips')
| -rw-r--r-- | Bindings/mips/brcm/soc.yaml | 24 | ||||
| -rw-r--r-- | Bindings/mips/mobileye.yaml | 5 | ||||
| -rw-r--r-- | Bindings/mips/mscc.txt | 17 | ||||
| -rw-r--r-- | Bindings/mips/realtek-rtl.yaml | 4 |
4 files changed, 33 insertions, 17 deletions
diff --git a/Bindings/mips/brcm/soc.yaml b/Bindings/mips/brcm/soc.yaml index 975945ca2888..0cc634482a6a 100644 --- a/Bindings/mips/brcm/soc.yaml +++ b/Bindings/mips/brcm/soc.yaml @@ -55,6 +55,16 @@ properties: under the "cpus" node. $ref: /schemas/types.yaml#/definitions/uint32 + brcm,bmips-cbr-reg: + description: Reference address of the CBR. + Some SoC suffer from a BUG where CBR(Core Base Register) + address might be badly or never initialized by the Bootloader + or reading it from co-processor registers, if the system boots + from secondary CPU, results in invalid address. + The CBR address is always the same on the SoC hence it + can be provided in DT to handle these broken case. + $ref: /schemas/types.yaml#/definitions/uint32 + patternProperties: "^cpu@[0-9]$": type: object @@ -64,6 +74,20 @@ properties: required: - mips-hpt-frequency +if: + properties: + compatible: + contains: + enum: + - brcm,bcm6358 + - brcm,bcm6368 + +then: + properties: + cpus: + required: + - brcm,bmips-cbr-reg + additionalProperties: true examples: diff --git a/Bindings/mips/mobileye.yaml b/Bindings/mips/mobileye.yaml index 831975f6b479..d60744550e46 100644 --- a/Bindings/mips/mobileye.yaml +++ b/Bindings/mips/mobileye.yaml @@ -26,6 +26,11 @@ properties: - enum: - mobileye,eyeq5-epm5 - const: mobileye,eyeq5 + - description: Boards with Mobileye EyeQ6H SoC + items: + - enum: + - mobileye,eyeq6h-epm6 + - const: mobileye,eyeq6h additionalProperties: true diff --git a/Bindings/mips/mscc.txt b/Bindings/mips/mscc.txt index cc916eaeed0a..e74165696b76 100644 --- a/Bindings/mips/mscc.txt +++ b/Bindings/mips/mscc.txt @@ -25,23 +25,6 @@ Example: reg = <0x71070000 0x1c>; }; - -o CPU system control: - -The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of -the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU -endianness, CPU bus control, CPU status. - -Required properties: -- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon" -- reg : Should contain registers location and length - -Example: - syscon@70000000 { - compatible = "mscc,ocelot-cpu-syscon", "syscon"; - reg = <0x70000000 0x2c>; - }; - o HSIO regs: The SoC has a few registers (HSIO) handling miscellaneous functionalities: diff --git a/Bindings/mips/realtek-rtl.yaml b/Bindings/mips/realtek-rtl.yaml index f8ac309d2994..d337655bfbf8 100644 --- a/Bindings/mips/realtek-rtl.yaml +++ b/Bindings/mips/realtek-rtl.yaml @@ -20,5 +20,9 @@ properties: - enum: - cisco,sg220-26 - const: realtek,rtl8382-soc + - items: + - enum: + - cameo,rtl9302c-2x-rtl8224-2xge + - const: realtek,rtl9302-soc additionalProperties: true |