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Diffstat (limited to 'Bindings/mips/brcm/soc.yaml')
| -rw-r--r-- | Bindings/mips/brcm/soc.yaml | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/Bindings/mips/brcm/soc.yaml b/Bindings/mips/brcm/soc.yaml index 975945ca2888..0cc634482a6a 100644 --- a/Bindings/mips/brcm/soc.yaml +++ b/Bindings/mips/brcm/soc.yaml @@ -55,6 +55,16 @@ properties: under the "cpus" node. $ref: /schemas/types.yaml#/definitions/uint32 + brcm,bmips-cbr-reg: + description: Reference address of the CBR. + Some SoC suffer from a BUG where CBR(Core Base Register) + address might be badly or never initialized by the Bootloader + or reading it from co-processor registers, if the system boots + from secondary CPU, results in invalid address. + The CBR address is always the same on the SoC hence it + can be provided in DT to handle these broken case. + $ref: /schemas/types.yaml#/definitions/uint32 + patternProperties: "^cpu@[0-9]$": type: object @@ -64,6 +74,20 @@ properties: required: - mips-hpt-frequency +if: + properties: + compatible: + contains: + enum: + - brcm,bcm6358 + - brcm,bcm6368 + +then: + properties: + cpus: + required: + - brcm,bmips-cbr-reg + additionalProperties: true examples: |