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-rw-r--r--sys/ia64/ia64/exception.S76
-rw-r--r--sys/ia64/ia64/exception.s76
-rw-r--r--sys/ia64/ia64/locore.S17
-rw-r--r--sys/ia64/ia64/locore.s17
-rw-r--r--sys/ia64/ia64/support.S29
-rw-r--r--sys/ia64/ia64/support.s29
-rw-r--r--sys/ia64/ia64/swtch.s8
7 files changed, 242 insertions, 10 deletions
diff --git a/sys/ia64/ia64/exception.S b/sys/ia64/ia64/exception.S
index c7616e77df1c..9405c4f663bf 100644
--- a/sys/ia64/ia64/exception.S
+++ b/sys/ia64/ia64/exception.S
@@ -58,6 +58,9 @@
mov out1=r14; \
mov out2=sp;; \
add sp=-16,sp;; \
+ .prologue; \
+ .save rp,r0; \
+ .body; \
br.call.sptk.few rp=trap; \
3: br.sptk.many exception_restore
@@ -74,11 +77,13 @@ ia64_vector_table:
/* 0x0000: VHPT Translation vector */
+interruption_VHPT_Translation:
TRAP(0)
.align 1024
/* 0x0400: Instruction TLB vector */
+interruption_Instruction_TLB:
mov r16=cr.ifa
mov r17=pr
;;
@@ -157,6 +162,7 @@ ia64_vector_table:
/* 0x0800: Data TLB vector */
+interruption_Data_TLB:
mov r16=cr.ifa
mov r17=pr
;;
@@ -235,6 +241,7 @@ ia64_vector_table:
/* 0x0c00: Alternate Instruction TLB vector */
+interruption_Alternate_Instruction_TLB:
mov r16=cr.ifa // where did it happen
;;
mov r18=pr // save predicates
@@ -259,6 +266,7 @@ ia64_vector_table:
/* 0x1000: Alternate Data TLB vector */
+interruption_Alternate_Data_TLB:
mov r16=cr.ifa // where did it happen
mov r18=pr // save predicates
;;
@@ -282,21 +290,25 @@ ia64_vector_table:
/* 0x1400: Data Nested TLB vector */
+interruption_Data_Nested_TLB:
TRAP(5)
.align 1024
/* 0x1800: Instruction Key Miss vector */
+interruption_Instruction_Key_Miss:
TRAP(6)
.align 1024
/* 0x1c00: Data Key Miss vector */
+interruption_Data_Key_Miss:
TRAP(7)
.align 1024
/* 0x2000: Dirty-Bit vector */
+interruption_Dirty_Bit:
mov r16=cr.ifa
mov r17=pr
mov r20=PAGE_SHIFT<<2 // XXX get page size from VHPT
@@ -367,6 +379,7 @@ ia64_vector_table:
/* 0x2400: Instruction Access-Bit vector */
+interruption_Instruction_Access_Bit:
mov r16=cr.ifa
mov r17=pr
mov r20=PAGE_SHIFT<<2 // XXX get page size from VHPT
@@ -437,6 +450,7 @@ ia64_vector_table:
/* 0x2800: Data Access-Bit vector */
+interruption_Data_Access_Bit:
mov r16=cr.ifa
mov r17=pr
mov r20=PAGE_SHIFT<<2 // XXX get page size from VHPT
@@ -507,6 +521,7 @@ ia64_vector_table:
/* 0x2c00: Break Instruction vector */
+interruption_Break:
mov r16=pr // save pr for a moment
mov r17=cr.iim;; // read break value
mov r18=0x100000;; // syscall number
@@ -529,6 +544,7 @@ ia64_vector_table:
/* 0x3000: External Interrupt vector */
+interruption_External_Interrupt:
mov r16=b0 // save user's b0
1: mov r17=ip;; // construct return address
add r17=2f-1b,r17;; // for exception_save
@@ -564,276 +580,331 @@ ia64_vector_table:
/* 0x3400: Reserved */
+interruption_3400:
TRAP(13)
.align 1024
/* 0x3800: Reserved */
+interruption_3800:
TRAP(14)
.align 1024
/* 0x3c00: Reserved */
+interruption_3c00:
TRAP(15)
.align 1024
/* 0x4000: Reserved */
+interruption_4000:
TRAP(16)
.align 1024
/* 0x4400: Reserved */
+interruption_4400:
TRAP(17)
.align 1024
/* 0x4800: Reserved */
+interruption_4800:
TRAP(18)
.align 1024
/* 0x4c00: Reserved */
+interruption_4c00:
TRAP(19)
.align 1024
/* 0x5000: Page Not Present vector */
+interruption_Page_Not_Present:
TRAP(20)
.align 256
/* 0x5100: Key Permission vector */
+interruption_Key_Permission:
TRAP(21)
.align 256
/* 0x5200: Instruction Access Rights vector */
+interruption_Instruction_Access_Rights:
TRAP(22)
.align 256
/* 0x5300: Data Access Rights vector */
+interruption_Data_Access_Rights:
TRAP(23)
.align 256
/* 0x5400: General Exception vector */
+interruption_General_Exception:
TRAP(24)
.align 256
/* 0x5500: Disabled FP-Register vector */
+interruption_Disabled_FP_Register:
TRAP(25)
.align 256
/* 0x5600: NaT Consumption vector */
+interruption_NaT_Consumption:
TRAP(26)
.align 256
/* 0x5700: Speculation vector */
+interruption_Speculation:
TRAP(27)
.align 256
/* 0x5800: Reserved */
+interruption_5800:
TRAP(28)
.align 256
/* 0x5900: Debug vector */
+interruption_Debug:
TRAP(29)
.align 256
/* 0x5a00: Unaligned Reference vector */
+interruption_Unaligned_Reference:
TRAP(30)
.align 256
/* 0x5b00: Unsupported Data Reference vector */
+interruption_Unsupported_Data_Reference:
TRAP(31)
.align 256
/* 0x5c00: Floating-point Fault vector */
+interruption_Floating_Point_Fault:
TRAP(32)
.align 256
/* 0x5d00: Floating-point Trap vector */
+interruption_Floating_Point_Trap:
TRAP(33)
.align 256
/* 0x5e00: Lower-Privilege Transfer Trap vector */
+interruption_Lower_Privilege_Transfer_Trap:
TRAP(34)
.align 256
/* 0x5f00: Taken Branch Trap vector */
+interruption_Taken_Branch_Trap:
TRAP(35)
.align 256
/* 0x6000: Single Step Trap vector */
+interruption_Single_Step_Trap:
TRAP(36)
.align 256
/* 0x6100: Reserved */
+interruption_6100:
TRAP(37)
.align 256
/* 0x6200: Reserved */
+interruption_6200:
TRAP(38)
.align 256
/* 0x6300: Reserved */
+interruption_6300:
TRAP(39)
.align 256
/* 0x6400: Reserved */
+interruption_6400:
TRAP(40)
.align 256
/* 0x6500: Reserved */
+interruption_6500:
TRAP(41)
.align 256
/* 0x6600: Reserved */
+interruption_6600:
TRAP(42)
.align 256
/* 0x6700: Reserved */
+interruption_6700:
TRAP(43)
.align 256
/* 0x6800: Reserved */
+interruption_6800:
TRAP(44)
.align 256
/* 0x6900: IA-32 Exception vector */
+interruption_IA_32_Exception:
TRAP(45)
.align 256
/* 0x6a00: IA-32 Intercept vector */
+interruption_IA_32_Intercept:
TRAP(46)
.align 256
/* 0x6b00: IA-32 Interrupt vector */
+interruption_IA_32_Interrupt:
TRAP(47)
.align 256
/* 0x6c00: Reserved */
+interruption_6c00:
TRAP(48)
.align 256
/* 0x6d00: Reserved */
+interruption_6d00:
TRAP(49)
.align 256
/* 0x6e00: Reserved */
+interruption_6e00:
TRAP(50)
.align 256
/* 0x6f00: Reserved */
+interruption_6f00:
TRAP(51)
.align 256
/* 0x7000: Reserved */
+interruption_7000:
TRAP(52)
.align 256
/* 0x7100: Reserved */
+interruption_7100:
TRAP(53)
.align 256
/* 0x7200: Reserved */
+interruption_7200:
TRAP(54)
.align 256
/* 0x7300: Reserved */
+interruption_7300:
TRAP(55)
.align 256
/* 0x7400: Reserved */
+interruption_7400:
TRAP(56)
.align 256
/* 0x7500: Reserved */
+interruption_7500:
TRAP(57)
.align 256
/* 0x7600: Reserved */
+interruption_7600:
TRAP(58)
.align 256
/* 0x7700: Reserved */
+interruption_7700:
TRAP(59)
.align 256
/* 0x7800: Reserved */
+interruption_7800:
TRAP(60)
.align 256
/* 0x7900: Reserved */
+interruption_7900:
TRAP(61)
.align 256
/* 0x7a00: Reserved */
+interruption_7a00:
TRAP(62)
.align 256
/* 0x7b00: Reserved */
+interruption_7b00:
TRAP(63)
.align 256
/* 0x7c00: Reserved */
+interruption_7c00:
TRAP(64)
.align 256
/* 0x7d00: Reserved */
+interruption_7d00:
TRAP(65)
.align 256
/* 0x7e00: Reserved */
+interruption_7e00:
TRAP(66)
.align 256
/* 0x7f00: Reserved */
+interruption_7f00:
TRAP(67)
.align 256
@@ -1253,6 +1324,9 @@ END(exception_save)
* r16 saved predicates
*/
ENTRY(do_syscall, 0)
+ .prologue
+ .save rp,r0
+ .body
rsm psr.dt // physical addressing for a moment
mov r17=sp;; // save user sp
srlz.d // serialize psr.dt
@@ -1499,5 +1573,7 @@ Lsaveargs:
;;
st8 [r31]=r39
br.ret.sptk.many b0
+ .global do_syscall_end
+do_syscall_end:
END(do_syscall)
diff --git a/sys/ia64/ia64/exception.s b/sys/ia64/ia64/exception.s
index c7616e77df1c..9405c4f663bf 100644
--- a/sys/ia64/ia64/exception.s
+++ b/sys/ia64/ia64/exception.s
@@ -58,6 +58,9 @@
mov out1=r14; \
mov out2=sp;; \
add sp=-16,sp;; \
+ .prologue; \
+ .save rp,r0; \
+ .body; \
br.call.sptk.few rp=trap; \
3: br.sptk.many exception_restore
@@ -74,11 +77,13 @@ ia64_vector_table:
/* 0x0000: VHPT Translation vector */
+interruption_VHPT_Translation:
TRAP(0)
.align 1024
/* 0x0400: Instruction TLB vector */
+interruption_Instruction_TLB:
mov r16=cr.ifa
mov r17=pr
;;
@@ -157,6 +162,7 @@ ia64_vector_table:
/* 0x0800: Data TLB vector */
+interruption_Data_TLB:
mov r16=cr.ifa
mov r17=pr
;;
@@ -235,6 +241,7 @@ ia64_vector_table:
/* 0x0c00: Alternate Instruction TLB vector */
+interruption_Alternate_Instruction_TLB:
mov r16=cr.ifa // where did it happen
;;
mov r18=pr // save predicates
@@ -259,6 +266,7 @@ ia64_vector_table:
/* 0x1000: Alternate Data TLB vector */
+interruption_Alternate_Data_TLB:
mov r16=cr.ifa // where did it happen
mov r18=pr // save predicates
;;
@@ -282,21 +290,25 @@ ia64_vector_table:
/* 0x1400: Data Nested TLB vector */
+interruption_Data_Nested_TLB:
TRAP(5)
.align 1024
/* 0x1800: Instruction Key Miss vector */
+interruption_Instruction_Key_Miss:
TRAP(6)
.align 1024
/* 0x1c00: Data Key Miss vector */
+interruption_Data_Key_Miss:
TRAP(7)
.align 1024
/* 0x2000: Dirty-Bit vector */
+interruption_Dirty_Bit:
mov r16=cr.ifa
mov r17=pr
mov r20=PAGE_SHIFT<<2 // XXX get page size from VHPT
@@ -367,6 +379,7 @@ ia64_vector_table:
/* 0x2400: Instruction Access-Bit vector */
+interruption_Instruction_Access_Bit:
mov r16=cr.ifa
mov r17=pr
mov r20=PAGE_SHIFT<<2 // XXX get page size from VHPT
@@ -437,6 +450,7 @@ ia64_vector_table:
/* 0x2800: Data Access-Bit vector */
+interruption_Data_Access_Bit:
mov r16=cr.ifa
mov r17=pr
mov r20=PAGE_SHIFT<<2 // XXX get page size from VHPT
@@ -507,6 +521,7 @@ ia64_vector_table:
/* 0x2c00: Break Instruction vector */
+interruption_Break:
mov r16=pr // save pr for a moment
mov r17=cr.iim;; // read break value
mov r18=0x100000;; // syscall number
@@ -529,6 +544,7 @@ ia64_vector_table:
/* 0x3000: External Interrupt vector */
+interruption_External_Interrupt:
mov r16=b0 // save user's b0
1: mov r17=ip;; // construct return address
add r17=2f-1b,r17;; // for exception_save
@@ -564,276 +580,331 @@ ia64_vector_table:
/* 0x3400: Reserved */
+interruption_3400:
TRAP(13)
.align 1024
/* 0x3800: Reserved */
+interruption_3800:
TRAP(14)
.align 1024
/* 0x3c00: Reserved */
+interruption_3c00:
TRAP(15)
.align 1024
/* 0x4000: Reserved */
+interruption_4000:
TRAP(16)
.align 1024
/* 0x4400: Reserved */
+interruption_4400:
TRAP(17)
.align 1024
/* 0x4800: Reserved */
+interruption_4800:
TRAP(18)
.align 1024
/* 0x4c00: Reserved */
+interruption_4c00:
TRAP(19)
.align 1024
/* 0x5000: Page Not Present vector */
+interruption_Page_Not_Present:
TRAP(20)
.align 256
/* 0x5100: Key Permission vector */
+interruption_Key_Permission:
TRAP(21)
.align 256
/* 0x5200: Instruction Access Rights vector */
+interruption_Instruction_Access_Rights:
TRAP(22)
.align 256
/* 0x5300: Data Access Rights vector */
+interruption_Data_Access_Rights:
TRAP(23)
.align 256
/* 0x5400: General Exception vector */
+interruption_General_Exception:
TRAP(24)
.align 256
/* 0x5500: Disabled FP-Register vector */
+interruption_Disabled_FP_Register:
TRAP(25)
.align 256
/* 0x5600: NaT Consumption vector */
+interruption_NaT_Consumption:
TRAP(26)
.align 256
/* 0x5700: Speculation vector */
+interruption_Speculation:
TRAP(27)
.align 256
/* 0x5800: Reserved */
+interruption_5800:
TRAP(28)
.align 256
/* 0x5900: Debug vector */
+interruption_Debug:
TRAP(29)
.align 256
/* 0x5a00: Unaligned Reference vector */
+interruption_Unaligned_Reference:
TRAP(30)
.align 256
/* 0x5b00: Unsupported Data Reference vector */
+interruption_Unsupported_Data_Reference:
TRAP(31)
.align 256
/* 0x5c00: Floating-point Fault vector */
+interruption_Floating_Point_Fault:
TRAP(32)
.align 256
/* 0x5d00: Floating-point Trap vector */
+interruption_Floating_Point_Trap:
TRAP(33)
.align 256
/* 0x5e00: Lower-Privilege Transfer Trap vector */
+interruption_Lower_Privilege_Transfer_Trap:
TRAP(34)
.align 256
/* 0x5f00: Taken Branch Trap vector */
+interruption_Taken_Branch_Trap:
TRAP(35)
.align 256
/* 0x6000: Single Step Trap vector */
+interruption_Single_Step_Trap:
TRAP(36)
.align 256
/* 0x6100: Reserved */
+interruption_6100:
TRAP(37)
.align 256
/* 0x6200: Reserved */
+interruption_6200:
TRAP(38)
.align 256
/* 0x6300: Reserved */
+interruption_6300:
TRAP(39)
.align 256
/* 0x6400: Reserved */
+interruption_6400:
TRAP(40)
.align 256
/* 0x6500: Reserved */
+interruption_6500:
TRAP(41)
.align 256
/* 0x6600: Reserved */
+interruption_6600:
TRAP(42)
.align 256
/* 0x6700: Reserved */
+interruption_6700:
TRAP(43)
.align 256
/* 0x6800: Reserved */
+interruption_6800:
TRAP(44)
.align 256
/* 0x6900: IA-32 Exception vector */
+interruption_IA_32_Exception:
TRAP(45)
.align 256
/* 0x6a00: IA-32 Intercept vector */
+interruption_IA_32_Intercept:
TRAP(46)
.align 256
/* 0x6b00: IA-32 Interrupt vector */
+interruption_IA_32_Interrupt:
TRAP(47)
.align 256
/* 0x6c00: Reserved */
+interruption_6c00:
TRAP(48)
.align 256
/* 0x6d00: Reserved */
+interruption_6d00:
TRAP(49)
.align 256
/* 0x6e00: Reserved */
+interruption_6e00:
TRAP(50)
.align 256
/* 0x6f00: Reserved */
+interruption_6f00:
TRAP(51)
.align 256
/* 0x7000: Reserved */
+interruption_7000:
TRAP(52)
.align 256
/* 0x7100: Reserved */
+interruption_7100:
TRAP(53)
.align 256
/* 0x7200: Reserved */
+interruption_7200:
TRAP(54)
.align 256
/* 0x7300: Reserved */
+interruption_7300:
TRAP(55)
.align 256
/* 0x7400: Reserved */
+interruption_7400:
TRAP(56)
.align 256
/* 0x7500: Reserved */
+interruption_7500:
TRAP(57)
.align 256
/* 0x7600: Reserved */
+interruption_7600:
TRAP(58)
.align 256
/* 0x7700: Reserved */
+interruption_7700:
TRAP(59)
.align 256
/* 0x7800: Reserved */
+interruption_7800:
TRAP(60)
.align 256
/* 0x7900: Reserved */
+interruption_7900:
TRAP(61)
.align 256
/* 0x7a00: Reserved */
+interruption_7a00:
TRAP(62)
.align 256
/* 0x7b00: Reserved */
+interruption_7b00:
TRAP(63)
.align 256
/* 0x7c00: Reserved */
+interruption_7c00:
TRAP(64)
.align 256
/* 0x7d00: Reserved */
+interruption_7d00:
TRAP(65)
.align 256
/* 0x7e00: Reserved */
+interruption_7e00:
TRAP(66)
.align 256
/* 0x7f00: Reserved */
+interruption_7f00:
TRAP(67)
.align 256
@@ -1253,6 +1324,9 @@ END(exception_save)
* r16 saved predicates
*/
ENTRY(do_syscall, 0)
+ .prologue
+ .save rp,r0
+ .body
rsm psr.dt // physical addressing for a moment
mov r17=sp;; // save user sp
srlz.d // serialize psr.dt
@@ -1499,5 +1573,7 @@ Lsaveargs:
;;
st8 [r31]=r39
br.ret.sptk.many b0
+ .global do_syscall_end
+do_syscall_end:
END(do_syscall)
diff --git a/sys/ia64/ia64/locore.S b/sys/ia64/ia64/locore.S
index 278c276a8552..5cd1724a9f3b 100644
--- a/sys/ia64/ia64/locore.S
+++ b/sys/ia64/ia64/locore.S
@@ -119,8 +119,8 @@ ENTRY(__start, 1)
;;
ld8 out0=[out0]
;;
- add r16=PCB_B0,out0 // return to mi_startup
- movl r17=mi_startup
+ add r16=PCB_B0,out0 // return to mi_startup_trampoline
+ movl r17=mi_startup_trampoline
;;
st8 [r16]=r17
;;
@@ -130,6 +130,19 @@ ENTRY(__start, 1)
END(__start)
+
+ENTRY(mi_startup_trampoline, 0)
+ .prologue
+ .save rp,r0
+ .body
+
+ br.call.sptk.many rp=mi_startup
+
+ // Should never happen
+1: br.cond.sptk.few 1b
+
+END(mi_startup_trampoline)
+
/*
* AP wake-up entry point. The handoff state is similar as for the BSP,
* as described on page 3-9 of the IPF SAL Specification. The difference
diff --git a/sys/ia64/ia64/locore.s b/sys/ia64/ia64/locore.s
index 278c276a8552..5cd1724a9f3b 100644
--- a/sys/ia64/ia64/locore.s
+++ b/sys/ia64/ia64/locore.s
@@ -119,8 +119,8 @@ ENTRY(__start, 1)
;;
ld8 out0=[out0]
;;
- add r16=PCB_B0,out0 // return to mi_startup
- movl r17=mi_startup
+ add r16=PCB_B0,out0 // return to mi_startup_trampoline
+ movl r17=mi_startup_trampoline
;;
st8 [r16]=r17
;;
@@ -130,6 +130,19 @@ ENTRY(__start, 1)
END(__start)
+
+ENTRY(mi_startup_trampoline, 0)
+ .prologue
+ .save rp,r0
+ .body
+
+ br.call.sptk.many rp=mi_startup
+
+ // Should never happen
+1: br.cond.sptk.few 1b
+
+END(mi_startup_trampoline)
+
/*
* AP wake-up entry point. The handoff state is similar as for the BSP,
* as described on page 3-9 of the IPF SAL Specification. The difference
diff --git a/sys/ia64/ia64/support.S b/sys/ia64/ia64/support.S
index 7caaba693fbe..f14cfd8ef6e4 100644
--- a/sys/ia64/ia64/support.S
+++ b/sys/ia64/ia64/support.S
@@ -149,10 +149,15 @@ END(ia64_physical_mode)
*/
ENTRY(ia64_call_efi_physical, 6)
+ .prologue
+ .regstk 6,4,5,0
+ .save ar.pfs,loc0
alloc loc0=ar.pfs,6,4,5,0
;;
+ .save rp,loc1
mov loc1=rp
;;
+ .body
br.call.sptk.many rp=ia64_physical_mode
;;
mov loc2=r8 // psr to restore mode
@@ -357,8 +362,13 @@ ENTRY(copystr, 4)
END(copystr)
ENTRY(copyinstr, 4)
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that src addr
;;
@@ -392,8 +402,13 @@ ENTRY(copyinstr, 4)
END(copyinstr)
ENTRY(copyoutstr, 4)
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that dest addr
;;
@@ -507,8 +522,13 @@ END(memcpy)
ENTRY(copyin, 3)
- alloc loc0=ar.pfs,3,3,3,0
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
+ alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that src addr
;;
@@ -542,8 +562,13 @@ END(copyin)
ENTRY(copyout, 3)
- alloc loc0=ar.pfs,3,3,3,0
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
+ alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that dest addr
;;
diff --git a/sys/ia64/ia64/support.s b/sys/ia64/ia64/support.s
index 7caaba693fbe..f14cfd8ef6e4 100644
--- a/sys/ia64/ia64/support.s
+++ b/sys/ia64/ia64/support.s
@@ -149,10 +149,15 @@ END(ia64_physical_mode)
*/
ENTRY(ia64_call_efi_physical, 6)
+ .prologue
+ .regstk 6,4,5,0
+ .save ar.pfs,loc0
alloc loc0=ar.pfs,6,4,5,0
;;
+ .save rp,loc1
mov loc1=rp
;;
+ .body
br.call.sptk.many rp=ia64_physical_mode
;;
mov loc2=r8 // psr to restore mode
@@ -357,8 +362,13 @@ ENTRY(copystr, 4)
END(copystr)
ENTRY(copyinstr, 4)
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that src addr
;;
@@ -392,8 +402,13 @@ ENTRY(copyinstr, 4)
END(copyinstr)
ENTRY(copyoutstr, 4)
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that dest addr
;;
@@ -507,8 +522,13 @@ END(memcpy)
ENTRY(copyin, 3)
- alloc loc0=ar.pfs,3,3,3,0
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
+ alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that src addr
;;
@@ -542,8 +562,13 @@ END(copyin)
ENTRY(copyout, 3)
- alloc loc0=ar.pfs,3,3,3,0
+ .prologue
+ .regstk 4, 3, 4, 0
+ .save ar.pfs,loc0
+ alloc loc0=ar.pfs,4,3,4,0
+ .save rp,loc1
mov loc1=rp
+ .body
movl loc2=VM_MAXUSER_ADDRESS // make sure that dest addr
;;
diff --git a/sys/ia64/ia64/swtch.s b/sys/ia64/ia64/swtch.s
index 2260379ee696..d00baca423c1 100644
--- a/sys/ia64/ia64/swtch.s
+++ b/sys/ia64/ia64/swtch.s
@@ -625,6 +625,9 @@ END(restorehighfp)
* fork_exit() is in r5, and the argument is in r6.
*/
ENTRY(fork_trampoline, 0)
+ .prologue
+ .save rp,r0
+ .body
alloc r14=ar.pfs,0,0,3,0
;;
mov b0=r5
@@ -632,7 +635,8 @@ ENTRY(fork_trampoline, 0)
mov out1=r6
add out2=16,sp
;;
- br.call.sptk.few b6=fork_exit
+ br.call.sptk.few rp=fork_exit
+ ;;
+ br.cond.sptk.many exception_restore
END(fork_trampoline)
-
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-01 04:27:25 +0000