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| author | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
| commit | f8af5cf600354830d4ccf59732403f0f073eccb9 (patch) | |
| tree | 2ba0398b4c42ad4f55561327538044fd2c925a8b /test/CodeGen/Thumb2/div.ll | |
| parent | 59d6cff90eecf31cb3dd860c4e786674cfdd42eb (diff) | |
| download | src-f8af5cf600354830d4ccf59732403f0f073eccb9.tar.gz src-f8af5cf600354830d4ccf59732403f0f073eccb9.zip | |
Vendor import of llvm release_34 branch r197841 (effectively, 3.4 RC3):vendor/llvm/llvm-release_34-r197841
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=259698
svn path=/vendor/llvm/llvm-release_34-r197841/; revision=259700; tag=vendor/llvm/llvm-release_34-r197841
Diffstat (limited to 'test/CodeGen/Thumb2/div.ll')
| -rw-r--r-- | test/CodeGen/Thumb2/div.ll | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/test/CodeGen/Thumb2/div.ll b/test/CodeGen/Thumb2/div.ll index f89746a30327..003d71797ab1 100644 --- a/test/CodeGen/Thumb2/div.ll +++ b/test/CodeGen/Thumb2/div.ll @@ -3,7 +3,9 @@ ; RUN: llc < %s -march=thumb -mcpu=cortex-m3 -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M ; RUN: llc < %s -march=thumb -mcpu=swift \ -; RUN: | FileCheck %s -check-prefix=CHECK-SWIFT-T2 +; RUN: | FileCheck %s -check-prefix=CHECK-HWDIV +; RUN: llc < %s -march=thumb -mcpu=cortex-r5 \ +; RUN: | FileCheck %s -check-prefix=CHECK-HWDIV define i32 @f1(i32 %a, i32 %b) { entry: @@ -11,8 +13,8 @@ entry: ; CHECK-THUMB: __divsi3 ; CHECK-THUMBV7M: f1 ; CHECK-THUMBV7M: sdiv -; CHECK-SWIFT-T2: f1 -; CHECK-SWIFT-T2: sdiv +; CHECK-HWDIV: f1 +; CHECK-HWDIV: sdiv %tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -23,8 +25,8 @@ entry: ; CHECK-THUMB: __udivsi3 ; CHECK-THUMBV7M: f2 ; CHECK-THUMBV7M: udiv -; CHECK-SWIFT-T2: f2 -; CHECK-SWIFT-T2: udiv +; CHECK-HWDIV: f2 +; CHECK-HWDIV: udiv %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -35,8 +37,8 @@ entry: ; CHECK-THUMB: __modsi3 ; CHECK-THUMBV7M: f3 ; CHECK-THUMBV7M: sdiv -; CHECK-SWIFT-T2: f3 -; CHECK-SWIFT-T2: sdiv +; CHECK-HWDIV: f3 +; CHECK-HWDIV: sdiv %tmp1 = srem i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -47,8 +49,8 @@ entry: ; CHECK-THUMB: __umodsi3 ; CHECK-THUMBV7M: f4 ; CHECK-THUMBV7M: udiv -; CHECK-SWIFT-T2: f4 -; CHECK-SWIFT-T2: udiv +; CHECK-HWDIV: f4 +; CHECK-HWDIV: udiv %tmp1 = urem i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } |