diff options
author | Warner Losh <imp@FreeBSD.org> | 2022-10-27 17:32:18 +0000 |
---|---|---|
committer | John Baldwin <jhb@FreeBSD.org> | 2023-01-26 19:43:20 +0000 |
commit | 1f1b3763610a2e9f58ab50e811f279d8db164e3d (patch) | |
tree | ff13b724faadb02a7eb3a2addc96928661f328a6 /sys/x86 | |
parent | a7fd3f511fc50bd0db32f11b53fb23ffc82cf73a (diff) |
bhyve: Implement MSR_MISC_FEATURES_ENABLES
Linux reads MISC_FEATURES_ENABLES to manage the CPUID faulting feature
(undocumented in the Intel SDM, but documented in 323850-004 (Intel
Virtualization Technology FlexMigration Application Note). Since bhyve
doesn't emulate this feature, we always return 0. Neither does bhyve
support the MONITOR/MWAIT fault bit also in this MSR (which is
documented in the sdm), so always return 0.
Sponsored by: Netflix
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D36602
(cherry picked from commit 1d21f64149224000d74e0c850686e85aefd25ef9)
Diffstat (limited to 'sys/x86')
-rw-r--r-- | sys/x86/include/specialreg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index bc3fd2e563a1..395338b4a4b4 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -564,6 +564,7 @@ #define MSR_BBL_CR_CTL3 0x11e #define MSR_IA32_TSX_CTRL 0x122 #define MSR_IA32_MCU_OPT_CTRL 0x123 +#define MSR_MISC_FEATURE_ENABLES 0x140 #define MSR_SYSENTER_CS_MSR 0x174 #define MSR_SYSENTER_ESP_MSR 0x175 #define MSR_SYSENTER_EIP_MSR 0x176 |