aboutsummaryrefslogtreecommitdiff
path: root/sys/sparc64/sbus
diff options
context:
space:
mode:
authorWarner Losh <imp@FreeBSD.org>2020-02-03 17:35:11 +0000
committerWarner Losh <imp@FreeBSD.org>2020-02-03 17:35:11 +0000
commit58aa35d42975c298ca0adba705c042596303c9f5 (patch)
tree2558d2b720cda9c2799970cabc266e2ce4e3a8d3 /sys/sparc64/sbus
parenteb24e1491f9900e922c78e53af588f22a3e9535f (diff)
Remove sparc64 kernel support
Remove all sparc64 specific files Remove all sparc64 ifdefs Removee indireeect sparc64 ifdefs
Notes
Notes: svn path=/head/; revision=357455
Diffstat (limited to 'sys/sparc64/sbus')
-rw-r--r--sys/sparc64/sbus/dma_sbus.c417
-rw-r--r--sys/sparc64/sbus/lsi64854.c764
-rw-r--r--sys/sparc64/sbus/lsi64854reg.h200
-rw-r--r--sys/sparc64/sbus/lsi64854var.h96
-rw-r--r--sys/sparc64/sbus/ofw_sbus.h55
-rw-r--r--sys/sparc64/sbus/sbus.c938
-rw-r--r--sys/sparc64/sbus/sbusreg.h145
-rw-r--r--sys/sparc64/sbus/sbusvar.h125
8 files changed, 0 insertions, 2740 deletions
diff --git a/sys/sparc64/sbus/dma_sbus.c b/sys/sparc64/sbus/dma_sbus.c
deleted file mode 100644
index 7e4887e56e24..000000000000
--- a/sys/sparc64/sbus/dma_sbus.c
+++ /dev/null
@@ -1,417 +0,0 @@
-/* $OpenBSD: dma_sbus.c,v 1.16 2008/06/26 05:42:18 ray Exp $ */
-/* $NetBSD: dma_sbus.c,v 1.32 2008/04/28 20:23:57 martin Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 1994 Peter Galbavy. All rights reserved.
- * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-#include <dev/ofw/openfirm.h>
-
-#include <machine/bus.h>
-#include <machine/bus_common.h>
-#include <machine/resource.h>
-
-#include <sparc64/sbus/lsi64854reg.h>
-#include <sparc64/sbus/lsi64854var.h>
-#include <sparc64/sbus/ofw_sbus.h>
-#include <sparc64/sbus/sbusreg.h>
-#include <sparc64/sbus/sbusvar.h>
-
-struct dma_devinfo {
- struct ofw_bus_devinfo ddi_obdinfo;
- struct resource_list ddi_rl;
-};
-
-struct dma_softc {
- struct lsi64854_softc sc_lsi64854; /* base device */
- int sc_ign;
- int sc_slot;
-};
-
-static devclass_t dma_devclass;
-
-static device_probe_t dma_probe;
-static device_attach_t dma_attach;
-static bus_print_child_t dma_print_child;
-static bus_probe_nomatch_t dma_probe_nomatch;
-static bus_get_resource_list_t dma_get_resource_list;
-static ofw_bus_get_devinfo_t dma_get_devinfo;
-
-static struct dma_devinfo *dma_setup_dinfo(device_t, struct dma_softc *,
- phandle_t);
-static void dma_destroy_dinfo(struct dma_devinfo *);
-static int dma_print_res(struct dma_devinfo *);
-
-static device_method_t dma_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, dma_probe),
- DEVMETHOD(device_attach, dma_attach),
- DEVMETHOD(device_shutdown, bus_generic_shutdown),
- DEVMETHOD(device_suspend, bus_generic_suspend),
- DEVMETHOD(device_resume, bus_generic_resume),
-
- /* Bus interface */
- DEVMETHOD(bus_print_child, dma_print_child),
- DEVMETHOD(bus_probe_nomatch, dma_probe_nomatch),
- DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
- DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
- DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
- DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
- DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
- DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
- DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
- DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
- DEVMETHOD(bus_get_resource_list, dma_get_resource_list),
- DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
-
- /* ofw_bus interface */
- DEVMETHOD(ofw_bus_get_devinfo, dma_get_devinfo),
- DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
- DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
- DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
- DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
- DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
-
- DEVMETHOD_END
-};
-
-static driver_t dma_driver = {
- "dma",
- dma_methods,
- sizeof(struct dma_softc),
-};
-
-/*
- * The probe order is handled by sbus(4) as we don't want the variants
- * with children to be attached earlier than the stand-alone controllers
- * in order to generally preserve the OFW device tree order.
- */
-EARLY_DRIVER_MODULE(dma, sbus, dma_driver, dma_devclass, 0, 0,
- BUS_PASS_DEFAULT);
-MODULE_DEPEND(dma, sbus, 1, 1, 1);
-MODULE_VERSION(dma, 1);
-
-static int
-dma_probe(device_t dev)
-{
- const char *name;
-
- name = ofw_bus_get_name(dev);
- if (strcmp(name, "espdma") == 0 || strcmp(name, "dma") == 0 ||
- strcmp(name, "ledma") == 0) {
- device_set_desc_copy(dev, name);
- return (0);
- }
- return (ENXIO);
-}
-
-static int
-dma_attach(device_t dev)
-{
- struct dma_softc *dsc;
- struct lsi64854_softc *lsc;
- struct dma_devinfo *ddi;
- device_t cdev;
- const char *name;
- char *cabletype;
- uint32_t csr;
- phandle_t child, node;
- int error, i;
-
- dsc = device_get_softc(dev);
- lsc = &dsc->sc_lsi64854;
-
- name = ofw_bus_get_name(dev);
- node = ofw_bus_get_node(dev);
- dsc->sc_ign = sbus_get_ign(dev);
- dsc->sc_slot = sbus_get_slot(dev);
-
- i = 0;
- lsc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
- RF_ACTIVE);
- if (lsc->sc_res == NULL) {
- device_printf(dev, "cannot allocate resources\n");
- return (ENXIO);
- }
-
- if (strcmp(name, "espdma") == 0 || strcmp(name, "dma") == 0)
- lsc->sc_channel = L64854_CHANNEL_SCSI;
- else if (strcmp(name, "ledma") == 0) {
- /*
- * Check to see which cable type is currently active and
- * set the appropriate bit in the ledma csr so that it
- * gets used. If we didn't netboot, the PROM won't have
- * the "cable-selection" property; default to TP and then
- * the user can change it via a "media" option to ifconfig.
- */
- csr = L64854_GCSR(lsc);
- if ((OF_getprop_alloc(node, "cable-selection",
- (void **)&cabletype)) == -1) {
- /* assume TP if nothing there */
- csr |= E_TP_AUI;
- } else {
- if (strcmp(cabletype, "aui") == 0)
- csr &= ~E_TP_AUI;
- else
- csr |= E_TP_AUI;
- OF_prop_free(cabletype);
- }
- L64854_SCSR(lsc, csr);
- DELAY(20000); /* manual says we need a 20ms delay */
- lsc->sc_channel = L64854_CHANNEL_ENET;
- } else {
- device_printf(dev, "unsupported DMA channel\n");
- error = ENXIO;
- goto fail_lres;
- }
-
- error = bus_dma_tag_create(
- bus_get_dma_tag(dev), /* parent */
- 1, 0, /* alignment, boundary */
- BUS_SPACE_MAXADDR, /* lowaddr */
- BUS_SPACE_MAXADDR, /* highaddr */
- NULL, NULL, /* filter, filterarg */
- BUS_SPACE_MAXSIZE, /* maxsize */
- BUS_SPACE_UNRESTRICTED, /* nsegments */
- BUS_SPACE_MAXSIZE, /* maxsegsize */
- 0, /* flags */
- NULL, NULL, /* no locking */
- &lsc->sc_parent_dmat);
- if (error != 0) {
- device_printf(dev, "cannot allocate parent DMA tag\n");
- goto fail_lres;
- }
-
- i = sbus_get_burstsz(dev);
- lsc->sc_burst = (i & SBUS_BURST_32) ? 32 :
- (i & SBUS_BURST_16) ? 16 : 0;
- lsc->sc_dev = dev;
-
- /* Attach children. */
- i = 0;
- for (child = OF_child(node); child != 0; child = OF_peer(child)) {
- if ((ddi = dma_setup_dinfo(dev, dsc, child)) == NULL)
- continue;
- if (i != 0) {
- device_printf(dev,
- "<%s>: only one child per DMA channel supported\n",
- ddi->ddi_obdinfo.obd_name);
- dma_destroy_dinfo(ddi);
- continue;
- }
- if ((cdev = device_add_child(dev, NULL, -1)) == NULL) {
- device_printf(dev, "<%s>: device_add_child failed\n",
- ddi->ddi_obdinfo.obd_name);
- dma_destroy_dinfo(ddi);
- continue;
- }
- device_set_ivars(cdev, ddi);
- i++;
- }
- return (bus_generic_attach(dev));
-
- fail_lres:
- bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(lsc->sc_res),
- lsc->sc_res);
- return (error);
-}
-
-static struct dma_devinfo *
-dma_setup_dinfo(device_t dev, struct dma_softc *dsc, phandle_t node)
-{
- struct dma_devinfo *ddi;
- struct sbus_regs *reg;
- uint32_t base, iv, *intr;
- int i, nreg, nintr, slot, rslot;
-
- ddi = malloc(sizeof(*ddi), M_DEVBUF, M_WAITOK | M_ZERO);
- if (ofw_bus_gen_setup_devinfo(&ddi->ddi_obdinfo, node) != 0) {
- free(ddi, M_DEVBUF);
- return (NULL);
- }
- resource_list_init(&ddi->ddi_rl);
- slot = -1;
- nreg = OF_getprop_alloc_multi(node, "reg", sizeof(*reg), (void **)&reg);
- if (nreg == -1) {
- device_printf(dev, "<%s>: incomplete\n",
- ddi->ddi_obdinfo.obd_name);
- goto fail;
- }
- for (i = 0; i < nreg; i++) {
- base = reg[i].sbr_offset;
- if (SBUS_ABS(base)) {
- rslot = SBUS_ABS_TO_SLOT(base);
- base = SBUS_ABS_TO_OFFSET(base);
- } else
- rslot = reg[i].sbr_slot;
- if (slot != -1 && slot != rslot) {
- device_printf(dev, "<%s>: multiple slots\n",
- ddi->ddi_obdinfo.obd_name);
- OF_prop_free(reg);
- goto fail;
- }
- slot = rslot;
-
- resource_list_add(&ddi->ddi_rl, SYS_RES_MEMORY, i, base,
- base + reg[i].sbr_size, reg[i].sbr_size);
- }
- OF_prop_free(reg);
- if (slot != dsc->sc_slot) {
- device_printf(dev, "<%s>: parent and child slot do not match\n",
- ddi->ddi_obdinfo.obd_name);
- goto fail;
- }
-
- /*
- * The `interrupts' property contains the SBus interrupt level.
- */
- nintr = OF_getprop_alloc_multi(node, "interrupts", sizeof(*intr),
- (void **)&intr);
- if (nintr != -1) {
- for (i = 0; i < nintr; i++) {
- iv = intr[i];
- /*
- * SBus card devices need the slot number encoded into
- * the vector as this is generally not done.
- */
- if ((iv & INTMAP_OBIO_MASK) == 0)
- iv |= slot << 3;
- /* Set the IGN as appropriate. */
- iv |= dsc->sc_ign << INTMAP_IGN_SHIFT;
- resource_list_add(&ddi->ddi_rl, SYS_RES_IRQ, i,
- iv, iv, 1);
- }
- OF_prop_free(intr);
- }
- return (ddi);
-
- fail:
- dma_destroy_dinfo(ddi);
- return (NULL);
-}
-
-static void
-dma_destroy_dinfo(struct dma_devinfo *dinfo)
-{
-
- resource_list_free(&dinfo->ddi_rl);
- ofw_bus_gen_destroy_devinfo(&dinfo->ddi_obdinfo);
- free(dinfo, M_DEVBUF);
-}
-
-static int
-dma_print_child(device_t dev, device_t child)
-{
- int rv;
-
- rv = bus_print_child_header(dev, child);
- rv += dma_print_res(device_get_ivars(child));
- rv += bus_print_child_footer(dev, child);
- return (rv);
-}
-
-static void
-dma_probe_nomatch(device_t dev, device_t child)
-{
- const char *type;
-
- device_printf(dev, "<%s>", ofw_bus_get_name(child));
- dma_print_res(device_get_ivars(child));
- type = ofw_bus_get_type(child);
- printf(" type %s (no driver attached)\n",
- type != NULL ? type : "unknown");
-}
-
-static struct resource_list *
-dma_get_resource_list(device_t dev, device_t child)
-{
- struct dma_devinfo *ddi;
-
- ddi = device_get_ivars(child);
- return (&ddi->ddi_rl);
-}
-
-static const struct ofw_bus_devinfo *
-dma_get_devinfo(device_t bus, device_t child)
-{
- struct dma_devinfo *ddi;
-
- ddi = device_get_ivars(child);
- return (&ddi->ddi_obdinfo);
-}
-
-static int
-dma_print_res(struct dma_devinfo *ddi)
-{
- int rv;
-
- rv = 0;
- rv += resource_list_print_type(&ddi->ddi_rl, "mem", SYS_RES_MEMORY,
- "%#jx");
- rv += resource_list_print_type(&ddi->ddi_rl, "irq", SYS_RES_IRQ, "%jd");
- return (rv);
-}
diff --git a/sys/sparc64/sbus/lsi64854.c b/sys/sparc64/sbus/lsi64854.c
deleted file mode 100644
index 866f6c3cac18..000000000000
--- a/sys/sparc64/sbus/lsi64854.c
+++ /dev/null
@@ -1,764 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause-NetBSD
- *
- * Copyright (c) 2004 Scott Long
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/* $NetBSD: lsi64854.c,v 1.33 2008/04/28 20:23:50 martin Exp $ */
-
-/*-
- * Copyright (c) 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-
-#include <cam/cam.h>
-#include <cam/cam_ccb.h>
-#include <cam/scsi/scsi_all.h>
-
-#include <sparc64/sbus/lsi64854reg.h>
-#include <sparc64/sbus/lsi64854var.h>
-
-#include <dev/esp/ncr53c9xreg.h>
-#include <dev/esp/ncr53c9xvar.h>
-
-#ifdef DEBUG
-#define LDB_SCSI 1
-#define LDB_ENET 2
-#define LDB_PP 4
-#define LDB_ANY 0xff
-int lsi64854debug = 0;
-#define DPRINTF(a,x) \
- do { \
- if ((lsi64854debug & (a)) != 0) \
- printf x; \
- } while (/* CONSTCOND */0)
-#else
-#define DPRINTF(a,x)
-#endif
-
-/*
- * The rules say we cannot transfer more than the limit of this DMA chip (64k
- * for old and 16Mb for new), and we cannot cross a 16Mb boundary.
- */
-#define MAX_DMA_SZ (64 * 1024)
-#define BOUNDARY (16 * 1024 * 1024)
-
-static void lsi64854_reset(struct lsi64854_softc *);
-static void lsi64854_map_scsi(void *, bus_dma_segment_t *, int, int);
-static int lsi64854_setup(struct lsi64854_softc *, void **, size_t *,
- int, size_t *);
-static int lsi64854_scsi_intr(void *);
-static int lsi64854_enet_intr(void *);
-static int lsi64854_setup_pp(struct lsi64854_softc *, void **,
- size_t *, int, size_t *);
-static int lsi64854_pp_intr(void *);
-
-/*
- * Finish attaching this DMA device.
- * Front-end must fill in these fields:
- * sc_res
- * sc_burst
- * sc_channel (one of SCSI, ENET, PP)
- * sc_client (one of SCSI, ENET, PP `soft_c' pointers)
- */
-int
-lsi64854_attach(struct lsi64854_softc *sc)
-{
- bus_dma_lock_t *lockfunc;
- struct ncr53c9x_softc *nsc;
- void *lockfuncarg;
- uint32_t csr;
- int error;
-
- lockfunc = NULL;
- lockfuncarg = NULL;
- sc->sc_maxdmasize = MAX_DMA_SZ;
-
- switch (sc->sc_channel) {
- case L64854_CHANNEL_SCSI:
- nsc = sc->sc_client;
- if (NCR_LOCK_INITIALIZED(nsc) == 0) {
- device_printf(sc->sc_dev, "mutex not initialized\n");
- return (ENXIO);
- }
- lockfunc = busdma_lock_mutex;
- lockfuncarg = &nsc->sc_lock;
- sc->sc_maxdmasize = nsc->sc_maxxfer;
- sc->intr = lsi64854_scsi_intr;
- sc->setup = lsi64854_setup;
- break;
- case L64854_CHANNEL_ENET:
- sc->intr = lsi64854_enet_intr;
- break;
- case L64854_CHANNEL_PP:
- sc->intr = lsi64854_pp_intr;
- sc->setup = lsi64854_setup_pp;
- break;
- default:
- device_printf(sc->sc_dev, "unknown channel\n");
- }
- sc->reset = lsi64854_reset;
-
- if (sc->setup != NULL) {
- error = bus_dma_tag_create(
- sc->sc_parent_dmat, /* parent */
- 1, BOUNDARY, /* alignment, boundary */
- BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
- BUS_SPACE_MAXADDR, /* highaddr */
- NULL, NULL, /* filter, filterarg */
- sc->sc_maxdmasize, /* maxsize */
- 1, /* nsegments */
- sc->sc_maxdmasize, /* maxsegsize */
- BUS_DMA_ALLOCNOW, /* flags */
- lockfunc, lockfuncarg, /* lockfunc, lockfuncarg */
- &sc->sc_buffer_dmat);
- if (error != 0) {
- device_printf(sc->sc_dev,
- "cannot allocate buffer DMA tag\n");
- return (error);
- }
-
- error = bus_dmamap_create(sc->sc_buffer_dmat, 0,
- &sc->sc_dmamap);
- if (error != 0) {
- device_printf(sc->sc_dev, "DMA map create failed\n");
- bus_dma_tag_destroy(sc->sc_buffer_dmat);
- return (error);
- }
- }
-
- csr = L64854_GCSR(sc);
- sc->sc_rev = csr & L64854_DEVID;
- if (sc->sc_rev == DMAREV_HME)
- return (0);
- device_printf(sc->sc_dev, "DMA rev. ");
- switch (sc->sc_rev) {
- case DMAREV_0:
- printf("0");
- break;
- case DMAREV_ESC:
- printf("ESC");
- break;
- case DMAREV_1:
- printf("1");
- break;
- case DMAREV_PLUS:
- printf("1+");
- break;
- case DMAREV_2:
- printf("2");
- break;
- default:
- printf("unknown (0x%x)", sc->sc_rev);
- }
-
- DPRINTF(LDB_ANY, (", burst 0x%x, csr 0x%x", sc->sc_burst, csr));
- printf("\n");
-
- return (0);
-}
-
-int
-lsi64854_detach(struct lsi64854_softc *sc)
-{
-
- if (sc->setup != NULL) {
- bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
- (L64854_GCSR(sc) & L64854_WRITE) != 0 ?
- BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
- bus_dmamap_unload(sc->sc_buffer_dmat, sc->sc_dmamap);
- bus_dmamap_destroy(sc->sc_buffer_dmat, sc->sc_dmamap);
- bus_dma_tag_destroy(sc->sc_buffer_dmat);
- }
-
- return (0);
-}
-
-/*
- * DMAWAIT waits while condition is true.
- */
-#define DMAWAIT(SC, COND, MSG, DONTPANIC) do if (COND) { \
- int count = 500000; \
- while ((COND) && --count > 0) DELAY(1); \
- if (count == 0) { \
- printf("%s: line %d: CSR = 0x%lx\n", __FILE__, __LINE__, \
- (u_long)L64854_GCSR(SC)); \
- if (DONTPANIC) \
- printf(MSG); \
- else \
- panic(MSG); \
- } \
-} while (/* CONSTCOND */0)
-
-#define DMA_DRAIN(sc, dontpanic) do { \
- uint32_t csr; \
- /* \
- * DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
- * and "drain" bits while it is still thinking about a \
- * request. \
- * other revs: D_ESC_R_PEND bit reads as 0 \
- */ \
- DMAWAIT(sc, L64854_GCSR(sc) & D_ESC_R_PEND, "R_PEND", dontpanic);\
- if (sc->sc_rev != DMAREV_HME) { \
- /* \
- * Select drain bit based on revision \
- * also clears errors and D_TC flag \
- */ \
- csr = L64854_GCSR(sc); \
- if (sc->sc_rev == DMAREV_1 || sc->sc_rev == DMAREV_0) \
- csr |= D_ESC_DRAIN; \
- else \
- csr |= L64854_INVALIDATE; \
- \
- L64854_SCSR(sc, csr); \
- } \
- /* \
- * Wait for draining to finish \
- * rev0 & rev1 call this PACKCNT \
- */ \
- DMAWAIT(sc, L64854_GCSR(sc) & L64854_DRAINING, "DRAINING", \
- dontpanic); \
-} while (/* CONSTCOND */0)
-
-#define DMA_FLUSH(sc, dontpanic) do { \
- uint32_t csr; \
- /* \
- * DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
- * and "drain" bits while it is still thinking about a \
- * request. \
- * other revs: D_ESC_R_PEND bit reads as 0 \
- */ \
- DMAWAIT(sc, L64854_GCSR(sc) & D_ESC_R_PEND, "R_PEND", dontpanic);\
- csr = L64854_GCSR(sc); \
- csr &= ~(L64854_WRITE|L64854_EN_DMA); /* no-ops on ENET */ \
- csr |= L64854_INVALIDATE; /* XXX FAS ? */ \
- L64854_SCSR(sc, csr); \
-} while (/* CONSTCOND */0)
-
-static void
-lsi64854_reset(struct lsi64854_softc *sc)
-{
- bus_dma_tag_t dmat;
- bus_dmamap_t dmam;
- uint32_t csr;
-
- DMA_FLUSH(sc, 1);
- csr = L64854_GCSR(sc);
-
- DPRINTF(LDB_ANY, ("%s: csr 0x%x\n", __func__, csr));
-
- if (sc->sc_dmasize != 0) {
- dmat = sc->sc_buffer_dmat;
- dmam = sc->sc_dmamap;
- bus_dmamap_sync(dmat, dmam, (csr & D_WRITE) != 0 ?
- BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
- bus_dmamap_unload(dmat, dmam);
- }
-
- if (sc->sc_rev == DMAREV_HME)
- L64854_SCSR(sc, csr | D_HW_RESET_FAS366);
-
- csr |= L64854_RESET; /* reset DMA */
- L64854_SCSR(sc, csr);
- DELAY(200); /* > 10 Sbus clocks(?) */
-
- /*DMAWAIT1(sc); why was this here? */
- csr = L64854_GCSR(sc);
- csr &= ~L64854_RESET; /* de-assert reset line */
- L64854_SCSR(sc, csr);
- DELAY(5); /* allow a few ticks to settle */
-
- csr = L64854_GCSR(sc);
- csr |= L64854_INT_EN; /* enable interrupts */
- if (sc->sc_rev > DMAREV_1 && sc->sc_channel == L64854_CHANNEL_SCSI) {
- if (sc->sc_rev == DMAREV_HME)
- csr |= D_TWO_CYCLE;
- else
- csr |= D_FASTER;
- }
-
- /* Set burst */
- switch (sc->sc_rev) {
- case DMAREV_HME:
- case DMAREV_2:
- csr &= ~L64854_BURST_SIZE;
- if (sc->sc_burst == 32)
- csr |= L64854_BURST_32;
- else if (sc->sc_burst == 16)
- csr |= L64854_BURST_16;
- else
- csr |= L64854_BURST_0;
- break;
- case DMAREV_ESC:
- csr |= D_ESC_AUTODRAIN; /* Auto-drain */
- if (sc->sc_burst == 32)
- csr &= ~D_ESC_BURST;
- else
- csr |= D_ESC_BURST;
- break;
- default:
- break;
- }
- L64854_SCSR(sc, csr);
-
- if (sc->sc_rev == DMAREV_HME) {
- bus_write_4(sc->sc_res, L64854_REG_ADDR, 0);
- sc->sc_dmactl = csr;
- }
- sc->sc_active = 0;
-
- DPRINTF(LDB_ANY, ("%s: done, csr 0x%x\n", __func__, csr));
-}
-
-static void
-lsi64854_map_scsi(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
- struct lsi64854_softc *sc;
-
- sc = (struct lsi64854_softc *)arg;
-
- if (error != 0)
- return;
- if (nseg != 1)
- panic("%s: cannot map %d segments\n", __func__, nseg);
-
- bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
- sc->sc_datain != 0 ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
- bus_write_4(sc->sc_res, L64854_REG_ADDR, segs[0].ds_addr);
-}
-
-/*
- * setup a DMA transfer
- */
-static int
-lsi64854_setup(struct lsi64854_softc *sc, void **addr, size_t *len,
- int datain, size_t *dmasize)
-{
- long bcnt;
- int error;
- uint32_t csr;
-
- DMA_FLUSH(sc, 0);
-
-#if 0
- DMACSR(sc) &= ~D_INT_EN;
-#endif
- sc->sc_dmaaddr = addr;
- sc->sc_dmalen = len;
- sc->sc_datain = datain;
-
- KASSERT(*dmasize <= sc->sc_maxdmasize,
- ("%s: transfer size %ld too large", __func__, (long)*dmasize));
-
- sc->sc_dmasize = *dmasize;
-
- DPRINTF(LDB_ANY, ("%s: dmasize=%ld\n", __func__, (long)*dmasize));
-
- /*
- * XXX what length?
- */
- if (sc->sc_rev == DMAREV_HME) {
- L64854_SCSR(sc, sc->sc_dmactl | L64854_RESET);
- L64854_SCSR(sc, sc->sc_dmactl);
-
- bus_write_4(sc->sc_res, L64854_REG_CNT, *dmasize);
- }
-
- /*
- * Load the transfer buffer and program the DMA address.
- * Note that the NCR53C9x core can't handle EINPROGRESS so we set
- * BUS_DMA_NOWAIT.
- */
- if (*dmasize != 0) {
- error = bus_dmamap_load(sc->sc_buffer_dmat, sc->sc_dmamap,
- *sc->sc_dmaaddr, *dmasize, lsi64854_map_scsi, sc,
- BUS_DMA_NOWAIT);
- if (error != 0)
- return (error);
- }
-
- if (sc->sc_rev == DMAREV_ESC) {
- /* DMA ESC chip bug work-around */
- bcnt = *dmasize;
- if (((bcnt + (long)*sc->sc_dmaaddr) & PAGE_MASK_8K) != 0)
- bcnt = roundup(bcnt, PAGE_SIZE_8K);
- bus_write_4(sc->sc_res, L64854_REG_CNT, bcnt);
- }
-
- /* Setup the DMA control register. */
- csr = L64854_GCSR(sc);
-
- if (datain != 0)
- csr |= L64854_WRITE;
- else
- csr &= ~L64854_WRITE;
- csr |= L64854_INT_EN;
-
- if (sc->sc_rev == DMAREV_HME)
- csr |= (D_DSBL_SCSI_DRN | D_EN_DMA);
-
- L64854_SCSR(sc, csr);
-
- return (0);
-}
-
-/*
- * Pseudo (chained) interrupt from the esp driver to kick the
- * current running DMA transfer. Called from ncr53c9x_intr()
- * for now.
- *
- * return 1 if it was a DMA continue.
- */
-static int
-lsi64854_scsi_intr(void *arg)
-{
- struct lsi64854_softc *sc = arg;
- struct ncr53c9x_softc *nsc = sc->sc_client;
- bus_dma_tag_t dmat;
- bus_dmamap_t dmam;
- size_t dmasize;
- int lxfer, resid, trans;
- uint32_t csr;
-
- csr = L64854_GCSR(sc);
-
- DPRINTF(LDB_SCSI, ("%s: addr 0x%x, csr %b\n", __func__,
- bus_read_4(sc->sc_res, L64854_REG_ADDR), csr, DDMACSR_BITS));
-
- if (csr & (D_ERR_PEND | D_SLAVE_ERR)) {
- device_printf(sc->sc_dev, "error: csr=%b\n", csr,
- DDMACSR_BITS);
- csr &= ~D_EN_DMA; /* Stop DMA. */
- /* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
- csr |= D_INVALIDATE | D_SLAVE_ERR;
- L64854_SCSR(sc, csr);
- return (-1);
- }
-
- /* This is an "assertion" :) */
- if (sc->sc_active == 0)
- panic("%s: DMA wasn't active", __func__);
-
- DMA_DRAIN(sc, 0);
-
- /* DMA has stopped */
- csr &= ~D_EN_DMA;
- L64854_SCSR(sc, csr);
- sc->sc_active = 0;
-
- dmasize = sc->sc_dmasize;
- if (dmasize == 0) {
- /* A "Transfer Pad" operation completed. */
- DPRINTF(LDB_SCSI, ("%s: discarded %d bytes (tcl=%d, "
- "tcm=%d)\n", __func__, NCR_READ_REG(nsc, NCR_TCL) |
- (NCR_READ_REG(nsc, NCR_TCM) << 8),
- NCR_READ_REG(nsc, NCR_TCL), NCR_READ_REG(nsc, NCR_TCM)));
- return (0);
- }
-
- resid = 0;
- /*
- * If a transfer onto the SCSI bus gets interrupted by the device
- * (e.g. for a SAVEPOINTER message), the data in the FIFO counts
- * as residual since the NCR53C9X counter registers get decremented
- * as bytes are clocked into the FIFO.
- */
- if ((csr & D_WRITE) == 0 &&
- (resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
- DPRINTF(LDB_SCSI, ("%s: empty esp FIFO of %d ", __func__,
- resid));
- if (nsc->sc_rev == NCR_VARIANT_FAS366 &&
- (NCR_READ_REG(nsc, NCR_CFG3) & NCRFASCFG3_EWIDE))
- resid <<= 1;
- }
-
- if ((nsc->sc_espstat & NCRSTAT_TC) == 0) {
- lxfer = nsc->sc_features & NCR_F_LARGEXFER;
- /*
- * "Terminal count" is off, so read the residue
- * out of the NCR53C9X counter registers.
- */
- resid += (NCR_READ_REG(nsc, NCR_TCL) |
- (NCR_READ_REG(nsc, NCR_TCM) << 8) |
- (lxfer != 0 ? (NCR_READ_REG(nsc, NCR_TCH) << 16) : 0));
-
- if (resid == 0 && dmasize == 65536 && lxfer == 0)
- /* A transfer of 64k is encoded as TCL=TCM=0. */
- resid = 65536;
- }
-
- trans = dmasize - resid;
- if (trans < 0) { /* transferred < 0? */
-#if 0
- /*
- * This situation can happen in perfectly normal operation
- * if the ESP is reselected while using DMA to select
- * another target. As such, don't print the warning.
- */
- device_printf(sc->sc_dev, "xfer (%d) > req (%d)\n", trans,
- dmasize);
-#endif
- trans = dmasize;
- }
-
- DPRINTF(LDB_SCSI, ("%s: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n",
- __func__, NCR_READ_REG(nsc, NCR_TCL), NCR_READ_REG(nsc, NCR_TCM),
- (nsc->sc_features & NCR_F_LARGEXFER) != 0 ?
- NCR_READ_REG(nsc, NCR_TCH) : 0, trans, resid));
-
- if (dmasize != 0) {
- dmat = sc->sc_buffer_dmat;
- dmam = sc->sc_dmamap;
- bus_dmamap_sync(dmat, dmam, (csr & D_WRITE) != 0 ?
- BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
- bus_dmamap_unload(dmat, dmam);
- }
-
- *sc->sc_dmalen -= trans;
- *sc->sc_dmaaddr = (char *)*sc->sc_dmaaddr + trans;
-
-#if 0 /* this is not normal operation just yet */
- if (*sc->sc_dmalen == 0 || nsc->sc_phase != nsc->sc_prevphase)
- return (0);
-
- /* and again */
- dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE);
- return (1);
-#endif
- return (0);
-}
-
-/*
- * Pseudo (chained) interrupt to le(4) driver to handle DMA errors
- */
-static int
-lsi64854_enet_intr(void *arg)
-{
- struct lsi64854_softc *sc = arg;
- uint32_t csr;
- int i, rv;
-
- csr = L64854_GCSR(sc);
-
- /* If the DMA logic shows an interrupt, claim it */
- rv = ((csr & E_INT_PEND) != 0) ? 1 : 0;
-
- if (csr & (E_ERR_PEND | E_SLAVE_ERR)) {
- device_printf(sc->sc_dev, "error: csr=%b\n", csr,
- EDMACSR_BITS);
- csr &= ~L64854_EN_DMA; /* Stop DMA. */
- /* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
- csr |= E_INVALIDATE | E_SLAVE_ERR;
- L64854_SCSR(sc, csr);
- /* Will be drained with the LE_C0_IDON interrupt. */
- sc->sc_dodrain = 1;
- return (-1);
- }
-
- /* XXX - is this necessary with E_DSBL_WR_INVAL on? */
- if (sc->sc_dodrain) {
- i = 10;
- csr |= E_DRAIN;
- L64854_SCSR(sc, csr);
- while (i-- > 0 && (L64854_GCSR(sc) & E_DRAINING))
- DELAY(1);
- sc->sc_dodrain = 0;
- }
-
- return (rv);
-}
-
-static void
-lsi64854_map_pp(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
-{
- struct lsi64854_softc *sc;
-
- sc = (struct lsi64854_softc *)arg;
-
- if (error != 0)
- return;
- if (nsegs != 1)
- panic("%s: cannot map %d segments\n", __func__, nsegs);
-
- bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
- sc->sc_datain != 0 ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
- bus_write_4(sc->sc_res, L64854_REG_ADDR, segs[0].ds_addr);
-
- bus_write_4(sc->sc_res, L64854_REG_CNT, sc->sc_dmasize);
-}
-
-/*
- * Setup a DMA transfer.
- */
-static int
-lsi64854_setup_pp(struct lsi64854_softc *sc, void **addr, size_t *len,
- int datain, size_t *dmasize)
-{
- int error;
- uint32_t csr;
-
- DMA_FLUSH(sc, 0);
-
- sc->sc_dmaaddr = addr;
- sc->sc_dmalen = len;
- sc->sc_datain = datain;
-
- DPRINTF(LDB_PP, ("%s: pp start %ld@%p,%d\n", __func__,
- (long)*sc->sc_dmalen, *sc->sc_dmaaddr, datain != 0 ? 1 : 0));
-
- KASSERT(*dmasize <= sc->sc_maxdmasize,
- ("%s: transfer size %ld too large", __func__, (long)*dmasize));
-
- sc->sc_dmasize = *dmasize;
-
- DPRINTF(LDB_PP, ("%s: dmasize=%ld\n", __func__, (long)*dmasize));
-
- /* Load the transfer buffer and program the DMA address. */
- if (*dmasize != 0) {
- error = bus_dmamap_load(sc->sc_buffer_dmat, sc->sc_dmamap,
- *sc->sc_dmaaddr, *dmasize, lsi64854_map_pp, sc,
- BUS_DMA_NOWAIT);
- if (error != 0)
- return (error);
- }
-
- /* Setup the DMA control register. */
- csr = L64854_GCSR(sc);
- csr &= ~L64854_BURST_SIZE;
- if (sc->sc_burst == 32)
- csr |= L64854_BURST_32;
- else if (sc->sc_burst == 16)
- csr |= L64854_BURST_16;
- else
- csr |= L64854_BURST_0;
- csr |= P_EN_DMA | P_INT_EN | P_EN_CNT;
-#if 0
- /* This bit is read-only in PP csr register. */
- if (datain != 0)
- csr |= P_WRITE;
- else
- csr &= ~P_WRITE;
-#endif
- L64854_SCSR(sc, csr);
-
- return (0);
-}
-
-/*
- * Parallel port DMA interrupt
- */
-static int
-lsi64854_pp_intr(void *arg)
-{
- struct lsi64854_softc *sc = arg;
- bus_dma_tag_t dmat;
- bus_dmamap_t dmam;
- size_t dmasize;
- int ret, trans, resid = 0;
- uint32_t csr;
-
- csr = L64854_GCSR(sc);
-
- DPRINTF(LDB_PP, ("%s: addr 0x%x, csr %b\n", __func__,
- bus_read_4(sc->sc_res, L64854_REG_ADDR), csr, PDMACSR_BITS));
-
- if ((csr & (P_ERR_PEND | P_SLAVE_ERR)) != 0) {
- resid = bus_read_4(sc->sc_res, L64854_REG_CNT);
- device_printf(sc->sc_dev, "error: resid %d csr=%b\n", resid,
- csr, PDMACSR_BITS);
- csr &= ~P_EN_DMA; /* Stop DMA. */
- /* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
- csr |= P_INVALIDATE | P_SLAVE_ERR;
- L64854_SCSR(sc, csr);
- return (-1);
- }
-
- ret = (csr & P_INT_PEND) != 0;
-
- if (sc->sc_active != 0) {
- DMA_DRAIN(sc, 0);
- resid = bus_read_4(sc->sc_res, L64854_REG_CNT);
- }
-
- /* DMA has stopped */
- csr &= ~D_EN_DMA;
- L64854_SCSR(sc, csr);
- sc->sc_active = 0;
-
- dmasize = sc->sc_dmasize;
- trans = dmasize - resid;
- if (trans < 0) /* transferred < 0? */
- trans = dmasize;
- *sc->sc_dmalen -= trans;
- *sc->sc_dmaaddr = (char *)*sc->sc_dmaaddr + trans;
-
- if (dmasize != 0) {
- dmat = sc->sc_buffer_dmat;
- dmam = sc->sc_dmamap;
- bus_dmamap_sync(dmat, dmam, (csr & D_WRITE) != 0 ?
- BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
- bus_dmamap_unload(dmat, dmam);
- }
-
- return (ret != 0);
-}
diff --git a/sys/sparc64/sbus/lsi64854reg.h b/sys/sparc64/sbus/lsi64854reg.h
deleted file mode 100644
index 9726ec07d1e4..000000000000
--- a/sys/sparc64/sbus/lsi64854reg.h
+++ /dev/null
@@ -1,200 +0,0 @@
-/* $NetBSD: lsi64854reg.h,v 1.6 2008/04/28 20:23:50 martin Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-NetBSD
- *
- * Copyright (c) 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-/*
- * LSI 64854 DMA engine. Contains three independent channels
- * designed to interface with (a) a NCR539X SCSI controller,
- * (b) a AM7990 Ethernet controller, (c) Parallel port hardware..
- */
-
-/*
- * Register offsets to bus handle.
- */
-#define L64854_REG_CSR 0 /* Control bits */
-#define L64854_REG_ADDR 4 /* DMA Address */
-#define L64854_REG_CNT 8 /* DMA count */
-#define L64854_REG_CNT_MASK 0x00ffffff /* only 24 bits */
-#define L64854_REG_ENBAR 12 /* ENET Base register */
-#define L64854_REG_TEST 12 /* SCSI Test register */
-#define L64854_REG_HCR 16 /* PP Hardware Configuration */
-#define L64854_REG_OCR 18 /* PP Operation Configuration */
-#define L64854_REG_DR 20 /* PP Data register */
-#define L64854_REG_TCR 21 /* PP Transfer Control */
-#define L64854_REG_OR 22 /* PP Output register */
-#define L64854_REG_IR 23 /* PP Input register */
-#define L64854_REG_ICR 24 /* PP Interrupt Control */
-
-
-/*
- * Control bits common to all three channels.
- */
-#define L64854_INT_PEND 0x00000001 /* Interrupt pending */
-#define L64854_ERR_PEND 0x00000002 /* Error pending */
-#define L64854_DRAINING 0x0000000c /* FIFO draining */
-#define L64854_INT_EN 0x00000010 /* Interrupt enable */
-#define L64854_INVALIDATE 0x00000020 /* Invalidate FIFO */
-#define L64854_SLAVE_ERR 0x00000040 /* Slave access size error */
-#define L64854_RESET 0x00000080 /* Reset device */
-#define L64854_WRITE 0x00000100 /* 1: xfer to memory */
-#define L64854_EN_DMA 0x00000200 /* enable DMA transfers */
-
-#define L64854_BURST_SIZE 0x000c0000 /* Read/write burst size */
-#define L64854_BURST_0 0x00080000 /* no bursts (SCSI-only) */
-#define L64854_BURST_16 0x00000000 /* 16-byte bursts */
-#define L64854_BURST_32 0x00040000 /* 32-byte bursts */
-#define L64854_BURST_64 0x000c0000 /* 64-byte bursts (fas) */
-
-#define L64854_RST_FAS366 0x08000000 /* FAS366 hardware reset */
-
-#define L64854_DEVID 0xf0000000 /* device ID bits */
-
-/*
- * SCSI DMA control bits.
- */
-#define D_INT_PEND L64854_INT_PEND /* interrupt pending */
-#define D_ERR_PEND L64854_ERR_PEND /* error pending */
-#define D_DRAINING L64854_DRAINING /* fifo draining */
-#define D_INT_EN L64854_INT_EN /* interrupt enable */
-#define D_INVALIDATE L64854_INVALIDATE/* invalidate fifo */
-#define D_SLAVE_ERR L64854_SLAVE_ERR/* slave access size error */
-#define D_RESET L64854_RESET /* reset scsi */
-#define D_WRITE L64854_WRITE /* 1 = dev -> mem */
-#define D_EN_DMA L64854_EN_DMA /* enable DMA requests */
-#define D_EN_CNT 0x00002000 /* enable byte counter */
-#define D_TC 0x00004000 /* terminal count */
-#define D_WIDE_EN 0x00008000 /* enable wide mode SBUS DMA (fas) */
-#define D_DSBL_CSR_DRN 0x00010000 /* disable fifo drain on csr */
-#define D_DSBL_SCSI_DRN 0x00020000 /* disable fifo drain on reg */
-
-#define D_DIAG 0x00100000 /* disable fifo drain on addr */
-#define D_TWO_CYCLE 0x00200000 /* 2 clocks per transfer */
-#define D_FASTER 0x00400000 /* 3 clocks per transfer */
-#define D_TCI_DIS 0x00800000 /* disable intr on D_TC */
-#define D_EN_NEXT 0x01000000 /* enable auto next address */
-#define D_DMA_ON 0x02000000 /* enable dma from scsi XXX */
-#define D_DSBL_PARITY_CHK \
- 0x02000000 /* disable checking for parity on bus (default 1:fas) */
-#define D_A_LOADED 0x04000000 /* address loaded */
-#define D_NA_LOADED 0x08000000 /* next address loaded */
-#define D_HW_RESET_FAS366 \
- 0x08000000 /* hardware reset FAS366 (fas) */
-#define D_DEV_ID L64854_DEVID /* device ID */
-#define DMAREV_0 0x00000000 /* Sunray DMA */
-#define DMAREV_ESC 0x40000000 /* DMA ESC array */
-#define DMAREV_1 0x80000000 /* 'DMA' */
-#define DMAREV_PLUS 0x90000000 /* 'DMA+' */
-#define DMAREV_2 0xa0000000 /* 'DMA2' */
-#define DMAREV_HME 0xb0000000 /* 'HME' */
-
-/*
- * revisions 0,1 and ESC have different bits.
- */
-#define D_ESC_DRAIN 0x00000040 /* rev0,1,esc: drain fifo */
-#define D_ESC_R_PEND 0x00000400 /* rev0,1: request pending */
-#define D_ESC_BURST 0x00000800 /* DMA ESC: 16 byte bursts */
-#define D_ESC_AUTODRAIN 0x00040000 /* DMA ESC: Auto-drain */
-
-#define DDMACSR_BITS "\177\020" \
- "b\00INT\0b\01ERR\0f\02\02DRAINING\0b\04IEN\0" \
- "b\06SLVERR\0b\07RST\0b\10WRITE\0b\11ENDMA\0" \
- "b\15ENCNT\0b\16TC\0\b\20DSBL_CSR_DRN\0" \
- "b\21DSBL_SCSI_DRN\0f\22\2BURST\0b\25TWOCYCLE\0" \
- "b\26FASTER\0b\27TCIDIS\0b\30ENNXT\0b\031DMAON\0" \
- "b\32ALOADED\0b\33NALOADED\0"
-
-
-/*
- * ENET DMA control bits.
- */
-#define E_INT_PEND L64854_INT_PEND /* interrupt pending */
-#define E_ERR_PEND L64854_ERR_PEND /* error pending */
-#define E_DRAINING L64854_DRAINING /* fifo draining */
-#define E_INT_EN L64854_INT_EN /* interrupt enable */
-#define E_INVALIDATE L64854_INVALIDATE/* invalidate fifo */
-#define E_SLAVE_ERR L64854_SLAVE_ERR/* slave access size error */
-#define E_RESET L64854_RESET /* reset ENET */
-#define E_reserved1 0x00000300 /* */
-#define E_DRAIN 0x00000400 /* force Ecache drain */
-#define E_DSBL_WR_DRN 0x00000800 /* disable Ecache drain on .. */
-#define E_DSBL_RD_DRN 0x00001000 /* disable Ecache drain on .. */
-#define E_reserved2 0x00006000 /* */
-#define E_ILACC 0x00008000 /* ... */
-#define E_DSBL_BUF_WR 0x00010000 /* no buffering of slave writes */
-#define E_DSBL_WR_INVAL 0x00020000 /* no Ecache invalidate on slave writes */
-
-#define E_reserved3 0x00100000 /* */
-#define E_LOOP_TEST 0x00200000 /* loopback mode */
-#define E_TP_AUI 0x00400000 /* 1 for TP, 0 for AUI */
-#define E_reserved4 0x0c800000 /* */
-#define E_DEV_ID L64854_DEVID /* ID bits */
-
-#define EDMACSR_BITS "\177\020" \
- "b\00INT\0b\01ERR\0f\02\02DRAINING\0b\04IEN\0" \
- "b\06SLVERR\0b\07RST\0b\10WRITE\0b\12DRAIN\0" \
- "b\13DSBL_WR_DRN\0b\14DSBL_RD_DRN\0b\17ILACC\0" \
- "b\20DSBL_BUF_WR\0b\21DSBL_WR_INVAL\0" \
- "b\25LOOPTEST\0b\26TP\0"
-
-/*
- * PP DMA control bits.
- */
-#define P_INT_PEND L64854_INT_PEND /* interrupt pending */
-#define P_ERR_PEND L64854_ERR_PEND /* error pending */
-#define P_DRAINING L64854_DRAINING /* fifo draining */
-#define P_INT_EN L64854_INT_EN /* interrupt enable */
-#define P_INVALIDATE L64854_INVALIDATE/* invalidate fifo */
-#define P_SLAVE_ERR L64854_SLAVE_ERR/* slave access size error */
-#define P_RESET L64854_RESET /* reset PP */
-#define P_WRITE L64854_WRITE /* 1: xfer to memory */
-#define P_EN_DMA L64854_EN_DMA /* enable DMA transfers */
-#define P_reserved1 0x00001c00 /* */
-#define P_EN_CNT 0x00002000 /* enable counter */
-#define P_TC 0x00004000 /* terminal count */
-#define P_reserved2 0x00038000 /* */
-
-#define P_DIAG 0x00100000 /* ... */
-#define P_reserved3 0x00600000 /* */
-#define P_TCI_DIS 0x00800000 /* no interrupt on terminal count */
-#define P_EN_NEXT 0x01000000 /* enable DMA chaining */
-#define P_DMA_ON 0x02000000 /* DMA xfers enabled */
-#define P_A_LOADED 0x04000000 /* addr and byte count valid */
-#define P_NA_LOADED 0x08000000 /* next addr & count valid but not used */
-#define P_DEV_ID L64854_DEVID /* ID bits */
-
-#define PDMACSR_BITS "\177\020" \
- "b\00INT\0b\01ERR\0f\02\02DRAINING\0b\04IEN\0" \
- "b\06SLVERR\0b\07RST\0b\10WRITE\0b\11ENDMA\0" \
- "b\15ENCNT\0b\16TC\0\b\24DIAG\0b\27TCIDIS\0" \
- "b\30ENNXT\0b\031DMAON\0b\32ALOADED\0b\33NALOADED\0"
diff --git a/sys/sparc64/sbus/lsi64854var.h b/sys/sparc64/sbus/lsi64854var.h
deleted file mode 100644
index b47a013957af..000000000000
--- a/sys/sparc64/sbus/lsi64854var.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/* $NetBSD: lsi64854var.h,v 1.12 2008/04/28 20:23:50 martin Exp $ */
-
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* $FreeBSD$ */
-
-struct lsi64854_softc {
- device_t sc_dev;
-
- struct resource *sc_res;
- u_int sc_rev; /* revision */
- int sc_burst; /* max suported burst size */
-
- int sc_channel;
-#define L64854_CHANNEL_SCSI 1
-#define L64854_CHANNEL_ENET 2
-#define L64854_CHANNEL_PP 3
- void *sc_client;
-
- int sc_active; /* DMA active? */
- bus_dmamap_t sc_dmamap; /* DMA map for bus_dma_* */
-
- bus_dma_tag_t sc_parent_dmat;
- bus_dma_tag_t sc_buffer_dmat;
- bus_size_t sc_maxdmasize;
- int sc_datain;
- size_t sc_dmasize;
- void **sc_dmaaddr;
- size_t *sc_dmalen;
-
- void (*reset)(struct lsi64854_softc *);/* reset routine */
- int (*setup)(struct lsi64854_softc *, void **, size_t *,
- int, size_t *); /* DMA setup */
- int (*intr)(void *); /* interrupt handler */
-
- u_int sc_dmactl;
- int sc_dodrain;
-};
-
-#define L64854_GCSR(sc) bus_read_4((sc)->sc_res, L64854_REG_CSR)
-#define L64854_SCSR(sc, csr) bus_write_4((sc)->sc_res, L64854_REG_CSR, csr)
-
-/*
- * DMA engine interface functions.
- */
-#define DMA_RESET(sc) (((sc)->reset)(sc))
-#define DMA_INTR(sc) (((sc)->intr)(sc))
-#define DMA_SETUP(sc, a, l, d, s) (((sc)->setup)(sc, a, l, d, s))
-#define DMA_ISACTIVE(sc) ((sc)->sc_active)
-
-#define DMA_ENINTR(sc) do { \
- uint32_t csr = L64854_GCSR(sc); \
- csr |= L64854_INT_EN; \
- L64854_SCSR(sc, csr); \
-} while (/* CONSTCOND */0)
-
-#define DMA_ISINTR(sc) (L64854_GCSR(sc) & (D_INT_PEND|D_ERR_PEND))
-
-#define DMA_GO(sc) do { \
- uint32_t csr = L64854_GCSR(sc); \
- csr |= D_EN_DMA; \
- L64854_SCSR(sc, csr); \
- sc->sc_active = 1; \
-} while (/* CONSTCOND */0)
-
-int lsi64854_attach(struct lsi64854_softc *);
-int lsi64854_detach(struct lsi64854_softc *);
diff --git a/sys/sparc64/sbus/ofw_sbus.h b/sys/sparc64/sbus/ofw_sbus.h
deleted file mode 100644
index 38cad40a6839..000000000000
--- a/sys/sparc64/sbus/ofw_sbus.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * from: NetBSD: sbusvar.h,v 1.15 2008/04/28 20:23:36 martin Exp
- *
- * $FreeBSD$
- */
-
-#ifndef _SPARC64_SBUS_OFW_SBUS_H_
-#define _SPARC64_SBUS_OFW_SBUS_H_
-
-/* Device register space description */
-struct sbus_regs {
- u_int32_t sbr_slot;
- u_int32_t sbr_offset;
- u_int32_t sbr_size;
-};
-
-/* Address translation across busses */
-struct sbus_ranges {
- u_int32_t cspace; /* Client space */
- u_int32_t coffset; /* Client offset */
- u_int32_t pspace; /* Parent space */
- u_int32_t poffset; /* Parent offset */
- u_int32_t size; /* Size in bytes of this range */
-};
-
-#endif /* ! _SPARC64_SBUS_OFW_SBUS_H_ */
diff --git a/sys/sparc64/sbus/sbus.c b/sys/sparc64/sbus/sbus.c
deleted file mode 100644
index 7731d97fb471..000000000000
--- a/sys/sparc64/sbus/sbus.c
+++ /dev/null
@@ -1,938 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 1999-2002 Eduardo Horvath
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: NetBSD: sbus.c,v 1.50 2002/06/20 18:26:24 eeh Exp
- */
-/*-
- * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
- * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * SBus support.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/pcpu.h>
-#include <sys/queue.h>
-#include <sys/reboot.h>
-#include <sys/rman.h>
-
-#include <dev/ofw/ofw_bus.h>
-#include <dev/ofw/ofw_bus_subr.h>
-#include <dev/ofw/openfirm.h>
-
-#include <machine/bus.h>
-#include <machine/bus_common.h>
-#include <machine/bus_private.h>
-#include <machine/iommureg.h>
-#include <machine/iommuvar.h>
-#include <machine/resource.h>
-
-#include <sparc64/sbus/ofw_sbus.h>
-#include <sparc64/sbus/sbusreg.h>
-#include <sparc64/sbus/sbusvar.h>
-
-struct sbus_devinfo {
- int sdi_burstsz;
- int sdi_clockfreq;
- int sdi_slot;
-
- struct ofw_bus_devinfo sdi_obdinfo;
- struct resource_list sdi_rl;
-};
-
-/* Range descriptor, allocated for each sc_range. */
-struct sbus_rd {
- bus_addr_t rd_poffset;
- bus_addr_t rd_pend;
- int rd_slot;
- bus_addr_t rd_coffset;
- bus_addr_t rd_cend;
- struct rman rd_rman;
- bus_space_handle_t rd_bushandle;
- struct resource *rd_res;
-};
-
-struct sbus_softc {
- device_t sc_dev;
- bus_dma_tag_t sc_cdmatag;
- int sc_clockfreq; /* clock frequency (in Hz) */
- int sc_nrange;
- struct sbus_rd *sc_rd;
- int sc_burst; /* burst transfer sizes supp. */
-
- struct resource *sc_sysio_res;
- int sc_ign; /* IGN for this sysio */
- struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */
-
- struct resource *sc_ot_ires;
- void *sc_ot_ihand;
- struct resource *sc_pf_ires;
- void *sc_pf_ihand;
-};
-
-#define SYSIO_READ8(sc, off) \
- bus_read_8((sc)->sc_sysio_res, (off))
-#define SYSIO_WRITE8(sc, off, v) \
- bus_write_8((sc)->sc_sysio_res, (off), (v))
-
-static device_probe_t sbus_probe;
-static device_attach_t sbus_attach;
-static bus_print_child_t sbus_print_child;
-static bus_probe_nomatch_t sbus_probe_nomatch;
-static bus_read_ivar_t sbus_read_ivar;
-static bus_get_resource_list_t sbus_get_resource_list;
-static bus_setup_intr_t sbus_setup_intr;
-static bus_alloc_resource_t sbus_alloc_resource;
-static bus_activate_resource_t sbus_activate_resource;
-static bus_adjust_resource_t sbus_adjust_resource;
-static bus_release_resource_t sbus_release_resource;
-static bus_get_dma_tag_t sbus_get_dma_tag;
-static ofw_bus_get_devinfo_t sbus_get_devinfo;
-
-static int sbus_inlist(const char *, const char *const *);
-static struct sbus_devinfo * sbus_setup_dinfo(device_t, struct sbus_softc *,
- phandle_t);
-static void sbus_destroy_dinfo(struct sbus_devinfo *);
-static void sbus_intr_enable(void *);
-static void sbus_intr_disable(void *);
-static void sbus_intr_assign(void *);
-static void sbus_intr_clear(void *);
-static int sbus_find_intrmap(struct sbus_softc *, u_int, bus_addr_t *,
- bus_addr_t *);
-static driver_intr_t sbus_overtemp;
-static driver_intr_t sbus_pwrfail;
-static int sbus_print_res(struct sbus_devinfo *);
-
-static device_method_t sbus_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, sbus_probe),
- DEVMETHOD(device_attach, sbus_attach),
- DEVMETHOD(device_shutdown, bus_generic_shutdown),
- DEVMETHOD(device_suspend, bus_generic_suspend),
- DEVMETHOD(device_resume, bus_generic_resume),
-
- /* Bus interface */
- DEVMETHOD(bus_print_child, sbus_print_child),
- DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch),
- DEVMETHOD(bus_read_ivar, sbus_read_ivar),
- DEVMETHOD(bus_alloc_resource, sbus_alloc_resource),
- DEVMETHOD(bus_activate_resource, sbus_activate_resource),
- DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
- DEVMETHOD(bus_adjust_resource, sbus_adjust_resource),
- DEVMETHOD(bus_release_resource, sbus_release_resource),
- DEVMETHOD(bus_setup_intr, sbus_setup_intr),
- DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
- DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
- DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
- DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
- DEVMETHOD(bus_get_dma_tag, sbus_get_dma_tag),
-
- /* ofw_bus interface */
- DEVMETHOD(ofw_bus_get_devinfo, sbus_get_devinfo),
- DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
- DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
- DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
- DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
- DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
-
- DEVMETHOD_END
-};
-
-static driver_t sbus_driver = {
- "sbus",
- sbus_methods,
- sizeof(struct sbus_softc),
-};
-
-static devclass_t sbus_devclass;
-
-EARLY_DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, NULL, NULL,
- BUS_PASS_BUS);
-MODULE_DEPEND(sbus, nexus, 1, 1, 1);
-MODULE_VERSION(sbus, 1);
-
-#define OFW_SBUS_TYPE "sbus"
-#define OFW_SBUS_NAME "sbus"
-
-static const struct intr_controller sbus_ic = {
- sbus_intr_enable,
- sbus_intr_disable,
- sbus_intr_assign,
- sbus_intr_clear
-};
-
-struct sbus_icarg {
- struct sbus_softc *sica_sc;
- bus_addr_t sica_map;
- bus_addr_t sica_clr;
-};
-
-static const char *const sbus_order_first[] = {
- "auxio",
- "dma",
- NULL
-};
-
-static int
-sbus_inlist(const char *name, const char *const *list)
-{
- int i;
-
- if (name == NULL)
- return (0);
- for (i = 0; list[i] != NULL; i++) {
- if (strcmp(name, list[i]) == 0)
- return (1);
- }
- return (0);
-}
-
-static int
-sbus_probe(device_t dev)
-{
- const char *t;
-
- t = ofw_bus_get_type(dev);
- if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
- strcmp(ofw_bus_get_name(dev), OFW_SBUS_NAME) != 0)
- return (ENXIO);
- device_set_desc(dev, "U2S UPA-SBus bridge");
- return (0);
-}
-
-static int
-sbus_attach(device_t dev)
-{
- struct sbus_softc *sc;
- struct sbus_devinfo *sdi;
- struct sbus_icarg *sica;
- struct sbus_ranges *range;
- struct resource *res;
- struct resource_list *rl;
- device_t cdev;
- bus_addr_t intrclr, intrmap, phys;
- bus_size_t size;
- u_long vec;
- phandle_t child, node;
- uint32_t prop;
- int i, j;
-
- sc = device_get_softc(dev);
- sc->sc_dev = dev;
- node = ofw_bus_get_node(dev);
-
- i = 0;
- sc->sc_sysio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
- RF_ACTIVE);
- if (sc->sc_sysio_res == NULL)
- panic("%s: cannot allocate device memory", __func__);
-
- if (OF_getprop(node, "interrupts", &prop, sizeof(prop)) == -1)
- panic("%s: cannot get IGN", __func__);
- sc->sc_ign = INTIGN(prop);
-
- /*
- * Record clock frequency for synchronous SCSI.
- * IS THIS THE CORRECT DEFAULT??
- */
- if (OF_getprop(node, "clock-frequency", &prop, sizeof(prop)) == -1)
- prop = 25000000;
- sc->sc_clockfreq = prop;
- prop /= 1000;
- device_printf(dev, "clock %d.%03d MHz\n", prop / 1000, prop % 1000);
-
- /*
- * Collect address translations from the OBP.
- */
- if ((sc->sc_nrange = OF_getprop_alloc_multi(node, "ranges",
- sizeof(*range), (void **)&range)) == -1) {
- panic("%s: error getting ranges property", __func__);
- }
- sc->sc_rd = malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, M_DEVBUF,
- M_NOWAIT | M_ZERO);
- if (sc->sc_rd == NULL)
- panic("%s: cannot allocate rmans", __func__);
- /*
- * Preallocate all space that the SBus bridge decodes, so that nothing
- * else gets in the way; set up rmans etc.
- */
- rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
- for (i = 0; i < sc->sc_nrange; i++) {
- phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
- size = range[i].size;
- sc->sc_rd[i].rd_slot = range[i].cspace;
- sc->sc_rd[i].rd_coffset = range[i].coffset;
- sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
- j = resource_list_add_next(rl, SYS_RES_MEMORY, phys,
- phys + size - 1, size);
- if ((res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &j,
- RF_ACTIVE)) == NULL)
- panic("%s: cannot allocate decoded range", __func__);
- sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
- sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
- sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
- if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
- rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
- panic("%s: failed to set up memory rman", __func__);
- sc->sc_rd[i].rd_poffset = phys;
- sc->sc_rd[i].rd_pend = phys + size;
- sc->sc_rd[i].rd_res = res;
- }
- OF_prop_free(range);
-
- /*
- * Get the SBus burst transfer size if burst transfers are supported.
- */
- if (OF_getprop(node, "up-burst-sizes", &sc->sc_burst,
- sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
- sc->sc_burst =
- (SBUS_BURST64_DEF << SBUS_BURST64_SHIFT) | SBUS_BURST_DEF;
-
- /* initialise the IOMMU */
-
- /* punch in our copies */
- sc->sc_is.is_pmaxaddr = IOMMU_MAXADDR(SBUS_IOMMU_BITS);
- sc->sc_is.is_bustag = rman_get_bustag(sc->sc_sysio_res);
- sc->sc_is.is_bushandle = rman_get_bushandle(sc->sc_sysio_res);
- sc->sc_is.is_iommu = SBR_IOMMU;
- sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
- sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
- sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
- sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
- sc->sc_is.is_dtcmp = 0;
- sc->sc_is.is_sb[0] = SBR_STRBUF;
- sc->sc_is.is_sb[1] = 0;
-
- /*
- * Note: the SBus IOMMU ignores the high bits of an address, so a NULL
- * DMA pointer will be translated by the first page of the IOTSB.
- * To detect bugs we'll allocate and ignore the first entry.
- */
- iommu_init(device_get_nameunit(dev), &sc->sc_is, 3, -1, 1);
-
- /* Create the DMA tag. */
- if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0,
- sc->sc_is.is_pmaxaddr, ~0, NULL, NULL, sc->sc_is.is_pmaxaddr,
- 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_cdmatag) != 0)
- panic("%s: bus_dma_tag_create failed", __func__);
- /* Customize the tag. */
- sc->sc_cdmatag->dt_cookie = &sc->sc_is;
- sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
-
- /*
- * Hunt through all the interrupt mapping regs and register our
- * interrupt controller for the corresponding interrupt vectors.
- * We do this early in order to be able to catch stray interrupts.
- */
- for (i = 0; i <= SBUS_MAX_INO; i++) {
- if (sbus_find_intrmap(sc, i, &intrmap, &intrclr) == 0)
- continue;
- sica = malloc(sizeof(*sica), M_DEVBUF, M_NOWAIT);
- if (sica == NULL)
- panic("%s: could not allocate interrupt controller "
- "argument", __func__);
- sica->sica_sc = sc;
- sica->sica_map = intrmap;
- sica->sica_clr = intrclr;
-#ifdef SBUS_DEBUG
- device_printf(dev,
- "intr map (INO %d, %s) %#lx: %#lx, clr: %#lx\n",
- i, (i & INTMAP_OBIO_MASK) == 0 ? "SBus slot" : "OBIO",
- (u_long)intrmap, (u_long)SYSIO_READ8(sc, intrmap),
- (u_long)intrclr);
-#endif
- j = intr_controller_register(INTMAP_VEC(sc->sc_ign, i),
- &sbus_ic, sica);
- if (j != 0)
- device_printf(dev, "could not register interrupt "
- "controller for INO %d (%d)\n", i, j);
- }
-
- /* Enable the over-temperature and power-fail interrupts. */
- i = 4;
- sc->sc_ot_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
- RF_ACTIVE);
- if (sc->sc_ot_ires == NULL ||
- INTIGN(vec = rman_get_start(sc->sc_ot_ires)) != sc->sc_ign ||
- INTVEC(SYSIO_READ8(sc, SBR_THERM_INT_MAP)) != vec ||
- intr_vectors[vec].iv_ic != &sbus_ic ||
- bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_BRIDGE | INTR_MPSAFE,
- NULL, sbus_overtemp, sc, &sc->sc_ot_ihand) != 0)
- panic("%s: failed to set up temperature interrupt", __func__);
- i = 3;
- sc->sc_pf_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
- RF_ACTIVE);
- if (sc->sc_pf_ires == NULL ||
- INTIGN(vec = rman_get_start(sc->sc_pf_ires)) != sc->sc_ign ||
- INTVEC(SYSIO_READ8(sc, SBR_POWER_INT_MAP)) != vec ||
- intr_vectors[vec].iv_ic != &sbus_ic ||
- bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_BRIDGE | INTR_MPSAFE,
- NULL, sbus_pwrfail, sc, &sc->sc_pf_ihand) != 0)
- panic("%s: failed to set up power fail interrupt", __func__);
-
- /* Initialize the counter-timer. */
- sparc64_counter_init(device_get_nameunit(dev),
- rman_get_bustag(sc->sc_sysio_res),
- rman_get_bushandle(sc->sc_sysio_res), SBR_TC0);
-
- /*
- * Loop through ROM children, fixing any relative addresses
- * and then configuring each device.
- */
- for (child = OF_child(node); child != 0; child = OF_peer(child)) {
- if ((sdi = sbus_setup_dinfo(dev, sc, child)) == NULL)
- continue;
- /*
- * For devices where there are variants that are actually
- * split into two SBus devices (as opposed to the first
- * half of the device being a SBus device and the second
- * half hanging off of the first one) like 'auxio' and
- * 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
- * which is a prerequisite to the driver attaching to the
- * second one with a lower order. Saves us from dealing
- * with different probe orders in the respective device
- * drivers which generally is more hackish.
- */
- cdev = device_add_child_ordered(dev, (OF_child(child) == 0 &&
- sbus_inlist(sdi->sdi_obdinfo.obd_name, sbus_order_first)) ?
- SBUS_ORDER_FIRST : SBUS_ORDER_NORMAL, NULL, -1);
- if (cdev == NULL) {
- device_printf(dev,
- "<%s>: device_add_child_ordered failed\n",
- sdi->sdi_obdinfo.obd_name);
- sbus_destroy_dinfo(sdi);
- continue;
- }
- device_set_ivars(cdev, sdi);
- }
- return (bus_generic_attach(dev));
-}
-
-static struct sbus_devinfo *
-sbus_setup_dinfo(device_t dev, struct sbus_softc *sc, phandle_t node)
-{
- struct sbus_devinfo *sdi;
- struct sbus_regs *reg;
- u_int32_t base, iv, *intr;
- int i, nreg, nintr, slot, rslot;
-
- sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
- if (ofw_bus_gen_setup_devinfo(&sdi->sdi_obdinfo, node) != 0) {
- free(sdi, M_DEVBUF);
- return (NULL);
- }
- resource_list_init(&sdi->sdi_rl);
- slot = -1;
- nreg = OF_getprop_alloc_multi(node, "reg", sizeof(*reg), (void **)&reg);
- if (nreg == -1) {
- if (sdi->sdi_obdinfo.obd_type == NULL ||
- strcmp(sdi->sdi_obdinfo.obd_type, "hierarchical") != 0) {
- device_printf(dev, "<%s>: incomplete\n",
- sdi->sdi_obdinfo.obd_name);
- goto fail;
- }
- } else {
- for (i = 0; i < nreg; i++) {
- base = reg[i].sbr_offset;
- if (SBUS_ABS(base)) {
- rslot = SBUS_ABS_TO_SLOT(base);
- base = SBUS_ABS_TO_OFFSET(base);
- } else
- rslot = reg[i].sbr_slot;
- if (slot != -1 && slot != rslot) {
- device_printf(dev, "<%s>: multiple slots\n",
- sdi->sdi_obdinfo.obd_name);
- OF_prop_free(reg);
- goto fail;
- }
- slot = rslot;
-
- resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
- base, base + reg[i].sbr_size, reg[i].sbr_size);
- }
- OF_prop_free(reg);
- }
- sdi->sdi_slot = slot;
-
- /*
- * The `interrupts' property contains the SBus interrupt level.
- */
- nintr = OF_getprop_alloc_multi(node, "interrupts", sizeof(*intr),
- (void **)&intr);
- if (nintr != -1) {
- for (i = 0; i < nintr; i++) {
- iv = intr[i];
- /*
- * SBus card devices need the slot number encoded into
- * the vector as this is generally not done.
- */
- if ((iv & INTMAP_OBIO_MASK) == 0)
- iv |= slot << 3;
- iv = INTMAP_VEC(sc->sc_ign, iv);
- resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
- iv, iv, 1);
- }
- OF_prop_free(intr);
- }
- if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
- sizeof(sdi->sdi_burstsz)) == -1)
- sdi->sdi_burstsz = sc->sc_burst;
- else
- sdi->sdi_burstsz &= sc->sc_burst;
- if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq,
- sizeof(sdi->sdi_clockfreq)) == -1)
- sdi->sdi_clockfreq = sc->sc_clockfreq;
-
- return (sdi);
-
-fail:
- sbus_destroy_dinfo(sdi);
- return (NULL);
-}
-
-static void
-sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
-{
-
- resource_list_free(&dinfo->sdi_rl);
- ofw_bus_gen_destroy_devinfo(&dinfo->sdi_obdinfo);
- free(dinfo, M_DEVBUF);
-}
-
-static int
-sbus_print_child(device_t dev, device_t child)
-{
- int rv;
-
- rv = bus_print_child_header(dev, child);
- rv += sbus_print_res(device_get_ivars(child));
- rv += bus_print_child_footer(dev, child);
- return (rv);
-}
-
-static void
-sbus_probe_nomatch(device_t dev, device_t child)
-{
- const char *type;
-
- device_printf(dev, "<%s>", ofw_bus_get_name(child));
- sbus_print_res(device_get_ivars(child));
- type = ofw_bus_get_type(child);
- printf(" type %s (no driver attached)\n",
- type != NULL ? type : "unknown");
-}
-
-static int
-sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
- struct sbus_softc *sc;
- struct sbus_devinfo *dinfo;
-
- sc = device_get_softc(dev);
- if ((dinfo = device_get_ivars(child)) == NULL)
- return (ENOENT);
- switch (which) {
- case SBUS_IVAR_BURSTSZ:
- *result = dinfo->sdi_burstsz;
- break;
- case SBUS_IVAR_CLOCKFREQ:
- *result = dinfo->sdi_clockfreq;
- break;
- case SBUS_IVAR_IGN:
- *result = sc->sc_ign;
- break;
- case SBUS_IVAR_SLOT:
- *result = dinfo->sdi_slot;
- break;
- default:
- return (ENOENT);
- }
- return (0);
-}
-
-static struct resource_list *
-sbus_get_resource_list(device_t dev, device_t child)
-{
- struct sbus_devinfo *sdi;
-
- sdi = device_get_ivars(child);
- return (&sdi->sdi_rl);
-}
-
-static void
-sbus_intr_enable(void *arg)
-{
- struct intr_vector *iv = arg;
- struct sbus_icarg *sica = iv->iv_icarg;
-
- SYSIO_WRITE8(sica->sica_sc, sica->sica_map,
- INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
-}
-
-static void
-sbus_intr_disable(void *arg)
-{
- struct intr_vector *iv = arg;
- struct sbus_icarg *sica = iv->iv_icarg;
-
- SYSIO_WRITE8(sica->sica_sc, sica->sica_map, iv->iv_vec);
-}
-
-static void
-sbus_intr_assign(void *arg)
-{
- struct intr_vector *iv = arg;
- struct sbus_icarg *sica = iv->iv_icarg;
-
- SYSIO_WRITE8(sica->sica_sc, sica->sica_map, INTMAP_TID(
- SYSIO_READ8(sica->sica_sc, sica->sica_map), iv->iv_mid));
-}
-
-static void
-sbus_intr_clear(void *arg)
-{
- struct intr_vector *iv = arg;
- struct sbus_icarg *sica = iv->iv_icarg;
-
- SYSIO_WRITE8(sica->sica_sc, sica->sica_clr, INTCLR_IDLE);
-}
-
-static int
-sbus_find_intrmap(struct sbus_softc *sc, u_int ino, bus_addr_t *intrmapptr,
- bus_addr_t *intrclrptr)
-{
- bus_addr_t intrclr, intrmap;
- int i;
-
- if (ino > SBUS_MAX_INO) {
- device_printf(sc->sc_dev, "out of range INO %d requested\n",
- ino);
- return (0);
- }
-
- if ((ino & INTMAP_OBIO_MASK) == 0) {
- intrmap = SBR_SLOT0_INT_MAP + INTSLOT(ino) * 8;
- intrclr = SBR_SLOT0_INT_CLR +
- (INTSLOT(ino) * 8 * 8) + (INTPRI(ino) * 8);
- } else {
- intrclr = 0;
- for (i = 0, intrmap = SBR_SCSI_INT_MAP;
- intrmap <= SBR_RESERVED_INT_MAP; intrmap += 8, i++) {
- if (INTVEC(SYSIO_READ8(sc, intrmap)) ==
- INTMAP_VEC(sc->sc_ign, ino)) {
- intrclr = SBR_SCSI_INT_CLR + i * 8;
- break;
- }
- }
- if (intrclr == 0)
- return (0);
- }
- if (intrmapptr != NULL)
- *intrmapptr = intrmap;
- if (intrclrptr != NULL)
- *intrclrptr = intrclr;
- return (1);
-}
-
-static int
-sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags,
- driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
-{
- struct sbus_softc *sc;
- u_long vec;
-
- sc = device_get_softc(dev);
- /*
- * Make sure the vector is fully specified and we registered
- * our interrupt controller for it.
- */
- vec = rman_get_start(ires);
- if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &sbus_ic) {
- device_printf(dev, "invalid interrupt vector 0x%lx\n", vec);
- return (EINVAL);
- }
- return (bus_generic_setup_intr(dev, child, ires, flags, filt, intr,
- arg, cookiep));
-}
-
-static struct resource *
-sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
- rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
-{
- struct sbus_softc *sc;
- struct rman *rm;
- struct resource *rv;
- struct resource_list *rl;
- struct resource_list_entry *rle;
- device_t schild;
- bus_addr_t toffs;
- bus_size_t tend;
- int i, slot;
- int isdefault, passthrough;
-
- isdefault = RMAN_IS_DEFAULT_RANGE(start, end);
- passthrough = (device_get_parent(child) != bus);
- rle = NULL;
- sc = device_get_softc(bus);
- rl = BUS_GET_RESOURCE_LIST(bus, child);
- switch (type) {
- case SYS_RES_IRQ:
- return (resource_list_alloc(rl, bus, child, type, rid, start,
- end, count, flags));
- case SYS_RES_MEMORY:
- if (!passthrough) {
- rle = resource_list_find(rl, type, *rid);
- if (rle == NULL)
- return (NULL);
- if (rle->res != NULL)
- panic("%s: resource entry is busy", __func__);
- if (isdefault) {
- start = rle->start;
- count = ulmax(count, rle->count);
- end = ulmax(rle->end, start + count - 1);
- }
- }
- rm = NULL;
- schild = child;
- while (device_get_parent(schild) != bus)
- schild = device_get_parent(schild);
- slot = sbus_get_slot(schild);
- for (i = 0; i < sc->sc_nrange; i++) {
- if (sc->sc_rd[i].rd_slot != slot ||
- start < sc->sc_rd[i].rd_coffset ||
- start > sc->sc_rd[i].rd_cend)
- continue;
- /* Disallow cross-range allocations. */
- if (end > sc->sc_rd[i].rd_cend)
- return (NULL);
- /* We've found the connection to the parent bus */
- toffs = start - sc->sc_rd[i].rd_coffset;
- tend = end - sc->sc_rd[i].rd_coffset;
- rm = &sc->sc_rd[i].rd_rman;
- break;
- }
- if (rm == NULL)
- return (NULL);
-
- rv = rman_reserve_resource(rm, toffs, tend, count, flags &
- ~RF_ACTIVE, child);
- if (rv == NULL)
- return (NULL);
- rman_set_rid(rv, *rid);
-
- if ((flags & RF_ACTIVE) != 0 && bus_activate_resource(child,
- type, *rid, rv)) {
- rman_release_resource(rv);
- return (NULL);
- }
- if (!passthrough)
- rle->res = rv;
- return (rv);
- default:
- return (NULL);
- }
-}
-
-static int
-sbus_activate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- struct sbus_softc *sc;
- struct bus_space_tag *tag;
- int i;
-
- switch (type) {
- case SYS_RES_IRQ:
- return (bus_generic_activate_resource(bus, child, type, rid,
- r));
- case SYS_RES_MEMORY:
- sc = device_get_softc(bus);
- for (i = 0; i < sc->sc_nrange; i++) {
- if (rman_is_region_manager(r,
- &sc->sc_rd[i].rd_rman) != 0) {
- tag = sparc64_alloc_bus_tag(r, SBUS_BUS_SPACE);
- if (tag == NULL)
- return (ENOMEM);
- rman_set_bustag(r, tag);
- rman_set_bushandle(r,
- sc->sc_rd[i].rd_bushandle +
- rman_get_start(r));
- return (rman_activate_resource(r));
- }
- }
- /* FALLTHROUGH */
- default:
- return (EINVAL);
- }
-}
-
-static int
-sbus_adjust_resource(device_t bus, device_t child, int type,
- struct resource *r, rman_res_t start, rman_res_t end)
-{
- struct sbus_softc *sc;
- int i;
-
- if (type == SYS_RES_MEMORY) {
- sc = device_get_softc(bus);
- for (i = 0; i < sc->sc_nrange; i++)
- if (rman_is_region_manager(r,
- &sc->sc_rd[i].rd_rman) != 0)
- return (rman_adjust_resource(r, start, end));
- return (EINVAL);
- }
- return (bus_generic_adjust_resource(bus, child, type, r, start, end));
-}
-
-static int
-sbus_release_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- struct resource_list *rl;
- struct resource_list_entry *rle;
- int error, passthrough;
-
- passthrough = (device_get_parent(child) != bus);
- rl = BUS_GET_RESOURCE_LIST(bus, child);
- if (type == SYS_RES_MEMORY) {
- if ((rman_get_flags(r) & RF_ACTIVE) != 0) {
- error = bus_deactivate_resource(child, type, rid, r);
- if (error)
- return (error);
- }
- error = rman_release_resource(r);
- if (error != 0)
- return (error);
- if (!passthrough) {
- rle = resource_list_find(rl, type, rid);
- KASSERT(rle != NULL,
- ("%s: resource entry not found!", __func__));
- KASSERT(rle->res != NULL,
- ("%s: resource entry is not busy", __func__));
- rle->res = NULL;
- }
- return (0);
- }
- return (resource_list_release(rl, bus, child, type, rid, r));
-}
-
-static bus_dma_tag_t
-sbus_get_dma_tag(device_t bus, device_t child)
-{
- struct sbus_softc *sc;
-
- sc = device_get_softc(bus);
- return (sc->sc_cdmatag);
-}
-
-static const struct ofw_bus_devinfo *
-sbus_get_devinfo(device_t bus, device_t child)
-{
- struct sbus_devinfo *sdi;
-
- sdi = device_get_ivars(child);
- return (&sdi->sdi_obdinfo);
-}
-
-/*
- * Handle an overtemp situation.
- *
- * SPARCs have temperature sensors which generate interrupts
- * if the machine's temperature exceeds a certain threshold.
- * This handles the interrupt and powers off the machine.
- * The same needs to be done to PCI controller drivers.
- */
-static void
-sbus_overtemp(void *arg __unused)
-{
- static int shutdown;
-
- /* As the interrupt is cleared we may be called multiple times. */
- if (shutdown != 0)
- return;
- shutdown++;
- printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
- shutdown_nice(RB_POWEROFF);
-}
-
-/* Try to shut down in time in case of power failure. */
-static void
-sbus_pwrfail(void *arg __unused)
-{
- static int shutdown;
-
- /* As the interrupt is cleared we may be called multiple times. */
- if (shutdown != 0)
- return;
- shutdown++;
- printf("Power failure detected\nShutting down NOW.\n");
- shutdown_nice(RB_POWEROFF);
-}
-
-static int
-sbus_print_res(struct sbus_devinfo *sdi)
-{
- int rv;
-
- rv = 0;
- rv += resource_list_print_type(&sdi->sdi_rl, "mem", SYS_RES_MEMORY,
- "%#jx");
- rv += resource_list_print_type(&sdi->sdi_rl, "irq", SYS_RES_IRQ,
- "%jd");
- return (rv);
-}
diff --git a/sys/sparc64/sbus/sbusreg.h b/sys/sparc64/sbus/sbusreg.h
deleted file mode 100644
index 7271d697f913..000000000000
--- a/sys/sparc64/sbus/sbusreg.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/*-
- * Copyright (c) 1996-1999 Eduardo Horvath
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: NetBSD: sbusreg.h,v 1.7 1999/06/07 05:28:03 eeh Exp
- *
- * $FreeBSD$
- */
-
-#ifndef _SPARC64_SBUS_SBUSREG_H_
-#define _SPARC64_SBUS_SBUSREG_H_
-
-/*
- * Sbus device addresses are obtained from the FORTH PROMs. They come
- * in `absolute' and `relative' address flavors, so we have to handle both.
- * Relative addresses do *not* include the slot number.
- */
-#define SBUS_BASE 0xf8000000
-#define SBUS_ADDR(slot, off) (SBUS_BASE + ((slot) << 25) + (off))
-#define SBUS_ABS(a) ((unsigned)(a) >= SBUS_BASE)
-#define SBUS_ABS_TO_SLOT(a) (((a) - SBUS_BASE) >> 25)
-#define SBUS_ABS_TO_OFFSET(a) (((a) - SBUS_BASE) & 0x1ffffff)
-
-/*
- * Sun4u S-bus definitions. Here's where we deal w/the machine
- * dependencies of sysio.
- *
- * SYSIO implements or is the interface to several things:
- *
- * o The SBUS interface itself
- * o The IOMMU
- * o The DVMA units
- * o The interrupt controller
- * o The counter/timers
- *
- * Since it has registers to control lots of different things
- * as well as several on-board SBUS devices and external SBUS
- * slots scattered throughout its address space, it's a pain.
- *
- * One good point, however, is that all registers are 64-bit.
- */
-#define SBR_UPA_PORTID 0x0000 /* UPA port ID register */
-#define SBR_UPA_CONFIG 0x0008 /* UPA config register */
-#define SBR_CS 0x0010 /* SYSIO control/status register */
-#define SBR_ECCC 0x0020 /* ECC control register */
-#define SBR_UE_AFS 0x0030 /* Uncorrectable Error AFSR */
-#define SBR_UE_AFA 0x0038 /* Uncorrectable Error AFAR */
-#define SBR_CE_AFS 0x0040 /* Correctable Error AFSR */
-#define SBR_CE_AFA 0x0048 /* Correctable Error AFAR */
-#define SBR_PM_CTL 0x0100 /* Performance monitor control reg */
-#define SBR_PM_COUNT 0x0108 /* Performance monitor counter reg */
-#define SBR_CTL 0x2000 /* SBUS Control Register */
-#define SBR_AFS 0x2010 /* SBUS AFSR */
-#define SBR_AFA 0x2018 /* SBUS AFAR */
-#define SBR_CONFIG0 0x2020 /* SBUS Slot 0 config register */
-#define SBR_CONFIG1 0x2028 /* SBUS Slot 1 config register */
-#define SBR_CONFIG2 0x2030 /* SBUS Slot 2 config register */
-#define SBR_CONFIG3 0x2038 /* SBUS Slot 3 config register */
-#define SBR_CONFIG13 0x2040 /* Slot 13 config register <audio> */
-#define SBR_CONFIG14 0x2048 /* Slot 14 config register <macio> */
-#define SBR_CONFIG15 0x2050 /* Slot 15 config register <slavio> */
-#define SBR_IOMMU 0x2400 /* IOMMU register block */
-#define SBR_STRBUF 0x2800 /* stream buffer register block */
-#define SBR_SLOT0_INT_MAP 0x2c00 /* SBUS slot 0 interrupt map reg */
-#define SBR_SLOT1_INT_MAP 0x2c08 /* SBUS slot 1 interrupt map reg */
-#define SBR_SLOT2_INT_MAP 0x2c10 /* SBUS slot 2 interrupt map reg */
-#define SBR_SLOT3_INT_MAP 0x2c18 /* SBUS slot 3 interrupt map reg */
-#define SBR_INTR_RETRY_TIM 0x2c20 /* interrupt retry timer reg */
-#define SBR_SCSI_INT_MAP 0x3000 /* SCSI interrupt map reg */
-#define SBR_ETHER_INT_MAP 0x3008 /* ethernet interrupt map reg */
-#define SBR_BPP_INT_MAP 0x3010 /* parallel interrupt map reg */
-#define SBR_AUDIO_INT_MAP 0x3018 /* audio interrupt map reg */
-#define SBR_POWER_INT_MAP 0x3020 /* power fail interrupt map reg */
-#define SBR_SKBDMS_INT_MAP 0x3028 /* serial/kbd/mouse interrupt map reg */
-#define SBR_FD_INT_MAP 0x3030 /* floppy interrupt map reg */
-#define SBR_THERM_INT_MAP 0x3038 /* thermal warn interrupt map reg */
-#define SBR_KBD_INT_MAP 0x3040 /* kbd [unused] interrupt map reg */
-#define SBR_MOUSE_INT_MAP 0x3048 /* mouse [unused] interrupt map reg */
-#define SBR_SERIAL_INT_MAP 0x3050 /* second serial interrupt map reg */
-#define SBR_TIMER0_INT_MAP 0x3060 /* timer 0 interrupt map reg */
-#define SBR_TIMER1_INT_MAP 0x3068 /* timer 1 interrupt map reg */
-#define SBR_UE_INT_MAP 0x3070 /* UE interrupt map reg */
-#define SBR_CE_INT_MAP 0x3078 /* CE interrupt map reg */
-#define SBR_ASYNC_INT_MAP 0x3080 /* SBUS error interrupt map reg */
-#define SBR_PWRMGT_INT_MAP 0x3088 /* power mgmt wake interrupt map reg */
-#define SBR_UPAGR_INT_MAP 0x3090 /* UPA graphics interrupt map reg */
-#define SBR_RESERVED_INT_MAP 0x3098 /* reserved interrupt map reg */
-/*
- * Note: clear interrupt 0 registers are not really used
- */
-#define SBR_SLOT0_INT_CLR 0x3400 /* SBUS slot 0 clear int regs 0..7 */
-#define SBR_SLOT1_INT_CLR 0x3440 /* SBUS slot 1 clear int regs 0..7 */
-#define SBR_SLOT2_INT_CLR 0x3480 /* SBUS slot 2 clear int regs 0..7 */
-#define SBR_SLOT3_INT_CLR 0x34c0 /* SBUS slot 3 clear int regs 0..7 */
-#define SBR_SCSI_INT_CLR 0x3800 /* SCSI clear int reg */
-#define SBR_ETHER_INT_CLR 0x3808 /* ethernet clear int reg */
-#define SBR_BPP_INT_CLR 0x3810 /* parallel clear int reg */
-#define SBR_AUDIO_INT_CLR 0x3818 /* audio clear int reg */
-#define SBR_POWER_INT_CLR 0x3820 /* power fail clear int reg */
-#define SBR_SKBDMS_INT_CLR 0x3828 /* serial/kbd/mouse clear int reg */
-#define SBR_FD_INT_CLR 0x3830 /* floppy clear int reg */
-#define SBR_THERM_INT_CLR 0x3838 /* thermal warn clear int reg */
-#define SBR_KBD_INT_CLR 0x3840 /* kbd [unused] clear int reg */
-#define SBR_MOUSE_INT_CLR 0x3848 /* mouse [unused] clear int reg */
-#define SBR_SERIAL_INT_CLR 0x3850 /* second serial clear int reg */
-#define SBR_TIMER0_INT_CLR 0x3860 /* timer 0 clear int reg */
-#define SBR_TIMER1_INT_CLR 0x3868 /* timer 1 clear int reg */
-#define SBR_UE_INT_CLR 0x3870 /* UE clear int reg */
-#define SBR_CE_INT_CLR 0x3878 /* CE clear int reg */
-#define SBR_ASYNC_INT_CLR 0x3880 /* SBUS error clr interrupt reg */
-#define SBR_PWRMGT_INT_CLR 0x3888 /* power mgmt wake clr interrupt reg */
-#define SBR_TC0 0x3c00 /* timer/counter 0 */
-#define SBR_TC1 0x3c10 /* timer/counter 1 */
-#define SBR_IOMMU_SVADIAG 0x4400 /* SBUS virtual addr diag reg */
-#define SBR_IOMMU_QUEUE_DIAG 0x4500 /* IOMMU LRU queue diag 0..15 */
-#define SBR_IOMMU_TLB_TAG_DIAG 0x4580 /* TLB tag diag 0..15 */
-#define SBR_IOMMU_TLB_DATA_DIAG 0x4600 /* TLB data RAM diag 0..31 */
-#define SBR_INT_DIAG 0x4800 /* SBUS int state diag reg */
-#define SBR_OBIO_DIAG 0x4808 /* OBIO and misc int state diag reg */
-#define SBR_STRBUF_DIAG 0x5000 /* Streaming buffer diag regs */
-
-/* INO defines */
-#define SBUS_MAX_INO 0x3f
-
-/* Width of the physical addresses the IOMMU translates to */
-#define SBUS_IOMMU_BITS 41
-
-#endif /* _SPARC64_SBUS_SBUSREG_H_ */
diff --git a/sys/sparc64/sbus/sbusvar.h b/sys/sparc64/sbus/sbusvar.h
deleted file mode 100644
index 941d997084fd..000000000000
--- a/sys/sparc64/sbus/sbusvar.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
- *
- * All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratory.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)sbusvar.h 8.1 (Berkeley) 6/11/93
- * from: NetBSD: sbusvar.h,v 1.15 2008/04/28 20:23:36 martin Exp
- *
- * $FreeBSD$
- */
-
-#ifndef _SPARC64_SBUS_SBUSVAR_H_
-#define _SPARC64_SBUS_SBUSVAR_H_
-
-/*
- * Macros for probe order
- */
-#define SBUS_ORDER_FIRST 10
-#define SBUS_ORDER_NORMAL 20
-
-/*
- * PROM-reported DMA burst sizes for the SBus
- */
-#define SBUS_BURST_1 (1 << 0)
-#define SBUS_BURST_2 (1 << 1)
-#define SBUS_BURST_4 (1 << 2)
-#define SBUS_BURST_8 (1 << 3)
-#define SBUS_BURST_16 (1 << 4)
-#define SBUS_BURST_32 (1 << 5)
-#define SBUS_BURST_64 (1 << 6)
-#define SBUS_BURST_MASK ((1 << SBUS_BURST_SIZE) - 1)
-#define SBUS_BURST_SIZE 16
-#define SBUS_BURST64_MASK (SBUS_BURST_MASK << SBUS_BURST64_SHIFT)
-#define SBUS_BURST64_SHIFT 16
-
-/* Used if no burst sizes are specified for the bus. */
-#define SBUS_BURST_DEF \
- (SBUS_BURST_1 | SBUS_BURST_2 | SBUS_BURST_4 | SBUS_BURST_8 | \
- SBUS_BURST_16 | SBUS_BURST_32 | SBUS_BURST_64)
-#define SBUS_BURST64_DEF \
- (SBUS_BURST_8 | SBUS_BURST_16 | SBUS_BURST_32 | SBUS_BURST_64)
-
-enum sbus_device_ivars {
- SBUS_IVAR_BURSTSZ,
- SBUS_IVAR_CLOCKFREQ,
- SBUS_IVAR_IGN,
- SBUS_IVAR_SLOT,
-};
-
-/*
- * Simplified accessors for sbus devices
- */
-#define SBUS_ACCESSOR(var, ivar, type) \
- __BUS_ACCESSOR(sbus, var, SBUS, ivar, type)
-
-SBUS_ACCESSOR(burstsz, BURSTSZ, int)
-SBUS_ACCESSOR(clockfreq, CLOCKFREQ, int)
-SBUS_ACCESSOR(ign, IGN, int)
-SBUS_ACCESSOR(slot, SLOT, int)
-
-#undef SBUS_ACCESSOR
-
-#endif /* _SPARC64_SBUS_SBUSVAR_H_ */