- Change fast interrupts on x86 to push a full interrupt frame and to

  return through doreti to handle ast's.  This is necessary for the
  clock interrupts to work properly.
- Change the clock interrupts on the x86 to be fast instead of threaded.
  This is needed because both hardclock() and statclock() need to run in
  the context of the current process, not in a separate thread context.
- Kill the prevproc hack as it is no longer needed.
- We really need Giant when we call psignal(), but we don't want to block
  during the clock interrupt.  Instead, use two p_flag's in the proc struct
  to mark the current process as having a pending SIGVTALRM or a SIGPROF
  and let them be delivered during ast() when hardclock() has finished
  running.
- Remove CLKF_BASEPRI, which was #ifdef'd out on the x86 anyways.  It was
  broken on the x86 if it was turned on since cpl is gone.  It's only use
  was to bogusly run softclock() directly during hardclock() rather than
  scheduling an SWI.
- Remove the COM_LOCK simplelock and replace it with a clock_lock spin
  mutex.  Since the spin mutex already handles disabling/restoring
  interrupts appropriately, this also lets us axe all the *_intr() fu.
- Back out the hacks in the APIC_IO x86 cpu_initclocks() code to use
  temporary fast interrupts for the APIC trial.
- Add two new process flags P_ALRMPEND and P_PROFPEND to mark the pending
  signals in hardclock() that are to be delivered in ast().

Submitted by:	jakeb (making statclock safe in a fast interrupt)
Submitted by:	cp (concept of delaying signals until ast())

1 files changed, 9 insertions, 39 deletions

diff --git a/sys/i386/isa/atpic_vector.s b/sys/i386/isa/atpic_vector.s
index 0a89492d8ba0..7644c03aeb3a 100644
--- a/sys/i386/isa/atpic_vector.s
+++ b/sys/i386/isa/atpic_vector.s
@@ -49,17 +49,18 @@
 	.text ; \
 	SUPERALIGN_TEXT ; \
 IDTVEC(vec_name) ; \
-	pushl	%eax ;		/* save only call-used registers */ \
-	pushl	%ecx ; \
-	pushl	%edx ; \
+	pushl	$0 ;		/* dummy error code */ \
+	pushl	$0 ;		/* dummy trap type */ \
+	pushal ; \
 	pushl	%ds ; \
+	pushl	%es ; \
 	pushl	%fs ; \
-	MAYBE_PUSHL_ES ; \
 	mov	$KDSEL,%ax ; \
 	mov	%ax,%ds ; \
+	mov	%ax,%es ; \
 	mov	%ax,%fs ; \
-	MAYBE_MOVW_AX_ES ; \
-	FAKE_MCOUNT((4+ACTUALLY_PUSHED)*4(%esp)) ; \
+	FAKE_MCOUNT((12+ACTUALLY_PUSHED)*4(%esp)) ; \
+	incb	_intr_nesting_level ; \
 	pushl	_intr_unit + (irq_num) * 4 ; \
 	call	*_intr_handler + (irq_num) * 4 ; /* do the work ASAP */ \
 	enable_icus ;		/* (re)enable ASAP (helps edge trigger?) */ \
@@ -67,19 +68,8 @@ IDTVEC(vec_name) ; \
 	incl	_cnt+V_INTR ;	/* book-keeping can wait */ \
 	movl	_intr_countp + (irq_num) * 4,%eax ; \
 	incl	(%eax) ; \
-/*	movl	_cpl,%eax ;	// are we unmasking pending SWIs? / \
-	notl	%eax ; \
-	andl	_spending,$SWI_MASK ; \
-	jne	2f ; 		// yes, maybe handle them */ \
-1: ; \
 	MEXITCOUNT ; \
-	MAYBE_POPL_ES ; \
-	popl	%fs ; \
-	popl	%ds ; \
-	popl	%edx ; \
-	popl	%ecx ; \
-	popl	%eax ; \
-	iret ; \
+	jmp	doreti_next
 
 #if 0
 ; \
@@ -141,7 +131,7 @@ IDTVEC(vec_name) ; \
 	movb	%al,_imen + IRQ_BYTE(irq_num) ; \
 	outb	%al,$icu+ICU_IMR_OFFSET ; \
 	enable_icus ; \
-	incb	_intr_nesting_level ; /* XXX do we need this? */ \
+	incb	_intr_nesting_level ; \
 __CONCAT(Xresume,irq_num): ; \
 	FAKE_MCOUNT(13*4(%esp)) ;	/* XXX late to avoid double count */ \
 	pushl	$irq_num; 	/* pass the IRQ */ \
@@ -153,26 +143,6 @@ __CONCAT(Xresume,irq_num): ; \
 	/* _doreti, but it's probably better to use less cache. */ \
 	jmp	doreti_next	/* and catch up inside doreti */
 
-/*
- * Reenable the interrupt mask after completing an interrupt.  Called
- * from ithd_loop.  There are two separate functions, one for each
- * ICU.
- */
-       .globl   setimask0, setimask1
-setimask0:
-	cli
-	movb	_imen,%al
-	outb	%al,$IO_ICU1 + ICU_IMR_OFFSET
-	sti
-	ret
-
-setimask1:
-	cli
-	movb	_imen + 1,%al
-	outb	%al,$IO_ICU2 + ICU_IMR_OFFSET
-	sti
-	ret
-
 MCOUNT_LABEL(bintr)
 	FAST_INTR(0,fastintr0, ENABLE_ICU1)
 	FAST_INTR(1,fastintr1, ENABLE_ICU1)