re-synchronize TSC-s on SMP systems after resume, if necessary

The TSC-s are checked and synchronized only if they were good
originally.  That is, invariant, synchronized, etc.

This is necessary on an AMD-based system where after a wakeup from STR I
see that BSP clock differs from AP clocks by a count that roughly
corresponds to one second.  The APs are in sync with each other.  Not
sure if this is a hardware quirk or a firmware bug.

This is what I see after a resume with this change:
    SMP: passed TSC synchronization test after adjustment
    acpi_timer0: restoring timecounter, ACPI-fast -> TSC-low

Reviewed by:	kib
MFC after:	3 weeks
Differential Revision: https://reviews.freebsd.org/D15551

1 files changed, 1 insertions, 0 deletions

diff --git a/sys/i386/include/clock.h b/sys/i386/include/clock.h
index 564d231dde0c..91cdfe50f525 100644
--- a/sys/i386/include/clock.h
+++ b/sys/i386/include/clock.h
@@ -32,6 +32,7 @@ void	clock_init(void);
 void	startrtclock(void);
 void	timer_restore(void);
 void	init_TSC(void);
+void	resume_TSC(void);
 
 #define	HAS_TIMER_SPKR 1
 int	timer_spkr_acquire(void);