diff options
author | Navdeep Parhar <np@FreeBSD.org> | 2016-07-05 01:29:24 +0000 |
---|---|---|
committer | Navdeep Parhar <np@FreeBSD.org> | 2016-07-05 01:29:24 +0000 |
commit | 671bf2b8b22f6c737fb6927b1cb7308ba50900ad (patch) | |
tree | c218d7b6cc9f5dbf8049aa629b9ede0048a0f6b5 /sys/dev/cxgbe/t4_l2t.c | |
parent | 12be18c7d5949abfebc7e304db03c7eae7cbca37 (diff) |
cxgbe(4): Changes to the CPL-handler registration mechanism and code
related to "shared" CPLs.
a) Combine t4_set_tcb_field and t4_set_tcb_field_rpl into a single
function. Allow callers to direct the response to any iq. Tidy up
set_ulp_mode_iscsi while there to use names from t4_tcb.h instead of
magic constants.
b) Remove all CPL handler tables from struct adapter. This reduces its
size by around 2KB. All handlers are now registered at MOD_LOAD instead
of attach or some kind of initialization/activation. The registration
functions do not need an adapter parameter any more.
c) Add per-iq handlers to deal with CPLs whose destination cannot be
determined solely from the opcode. There are 2 such CPLs in use right
now: SET_TCB_RPL and L2T_WRITE_RPL. The base driver continues to send
filter and L2T_WRITEs over the mgmtq and solicits the reply on fwq.
t4_tom (including the DDP code) now uses the port's ctrlq to send
L2T_WRITEs and SET_TCB_FIELDs and solicits the reply on an ofld_rxq.
fwq and ofld_rxq have different handlers that know what kind of tid to
expect in the reply. Update t4_write_l2e and callers to to support any
wrq/iq combination.
Approved by: re@ (kib@)
Sponsored by: Chelsio Communications
Notes
Notes:
svn path=/head/; revision=302339
Diffstat (limited to 'sys/dev/cxgbe/t4_l2t.c')
-rw-r--r-- | sys/dev/cxgbe/t4_l2t.c | 22 |
1 files changed, 15 insertions, 7 deletions
diff --git a/sys/dev/cxgbe/t4_l2t.c b/sys/dev/cxgbe/t4_l2t.c index 7c4cedefb280..b4b1ee4d312d 100644 --- a/sys/dev/cxgbe/t4_l2t.c +++ b/sys/dev/cxgbe/t4_l2t.c @@ -111,27 +111,34 @@ found: * The write may be synchronous or asynchronous. */ int -t4_write_l2e(struct adapter *sc, struct l2t_entry *e, int sync) +t4_write_l2e(struct l2t_entry *e, int sync) { + struct sge_wrq *wrq; + struct adapter *sc; struct wrq_cookie cookie; struct cpl_l2t_write_req *req; - int idx = e->idx + sc->vres.l2t.start; + int idx; mtx_assert(&e->lock, MA_OWNED); + MPASS(e->wrq != NULL); - req = start_wrq_wr(&sc->sge.mgmtq, howmany(sizeof(*req), 16), &cookie); + wrq = e->wrq; + sc = wrq->adapter; + + req = start_wrq_wr(wrq, howmany(sizeof(*req), 16), &cookie); if (req == NULL) return (ENOMEM); + idx = e->idx + sc->vres.l2t.start; INIT_TP_WR(req, 0); OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, idx | - V_SYNC_WR(sync) | V_TID_QID(sc->sge.fwq.abs_id))); + V_SYNC_WR(sync) | V_TID_QID(e->iqid))); req->params = htons(V_L2T_W_PORT(e->lport) | V_L2T_W_NOREPLY(!sync)); req->l2t_idx = htons(idx); req->vlan = htons(e->vlan); memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac)); - commit_wrq_wr(&sc->sge.mgmtq, req, &cookie); + commit_wrq_wr(wrq, req, &cookie); if (sync && e->state != L2T_STATE_SWITCHING) e->state = L2T_STATE_SYNC_WRITE; @@ -173,9 +180,11 @@ t4_l2t_set_switching(struct adapter *sc, struct l2t_entry *e, uint16_t vlan, e->vlan = vlan; e->lport = port; + e->wrq = &sc->sge.mgmtq; + e->iqid = sc->sge.fwq.abs_id; memcpy(e->dmac, eth_addr, ETHER_ADDR_LEN); mtx_lock(&e->lock); - rc = t4_write_l2e(sc, e, 0); + rc = t4_write_l2e(e, 0); mtx_unlock(&e->lock); return (rc); } @@ -211,7 +220,6 @@ t4_init_l2t(struct adapter *sc, int flags) } sc->l2t = d; - t4_register_cpl_handler(sc, CPL_L2T_WRITE_RPL, do_l2t_write_rpl); return (0); } |