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author | Dimitry Andric <dim@FreeBSD.org> | 2010-09-17 15:48:55 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2010-09-17 15:48:55 +0000 |
commit | d39c594d39df7f283c2fb8a704a3f31c501180d9 (patch) | |
tree | 36453626c792cccd91f783a38a169d610a6b9db9 /lib/Target/CellSPU/SPUCallingConv.td | |
parent | 6144c1de6a7674dad94290650e4e14f24d42e421 (diff) | |
download | src-d39c594d39df7f283c2fb8a704a3f31c501180d9.tar.gz src-d39c594d39df7f283c2fb8a704a3f31c501180d9.zip |
Vendor import of llvm r114020 (from the release_28 branch):vendor/llvm/llvm-r114020
http://llvm.org/svn/llvm-project/llvm/branches/release_28@114020
Approved by: rpaulo (mentor)
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=212793
svn path=/vendor/llvm/llvm-r114020/; revision=212794; tag=vendor/llvm/llvm-r114020
Diffstat (limited to 'lib/Target/CellSPU/SPUCallingConv.td')
-rw-r--r-- | lib/Target/CellSPU/SPUCallingConv.td | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/lib/Target/CellSPU/SPUCallingConv.td b/lib/Target/CellSPU/SPUCallingConv.td index ec2f663908f6..04fa2ae866d6 100644 --- a/lib/Target/CellSPU/SPUCallingConv.td +++ b/lib/Target/CellSPU/SPUCallingConv.td @@ -1,4 +1,4 @@ -//===- SPUCallingConv.td - Calling Conventions for CellSPU ------*- C++ -*-===// +//===- SPUCallingConv.td - Calling Conventions for CellSPU -*- tablegen -*-===// // // The LLVM Compiler Infrastructure // @@ -19,16 +19,17 @@ class CCIfSubtarget<string F, CCAction A> // Return Value Calling Convention //===----------------------------------------------------------------------===// -// Return-value convention for Cell SPU: Everything can be passed back via $3: +// Return-value convention for Cell SPU: return value to be passed in reg 3-74 def RetCC_SPU : CallingConv<[ - CCIfType<[i8], CCAssignToReg<[R3]>>, - CCIfType<[i16], CCAssignToReg<[R3]>>, - CCIfType<[i32], CCAssignToReg<[R3]>>, - CCIfType<[i64], CCAssignToReg<[R3]>>, - CCIfType<[i128], CCAssignToReg<[R3]>>, - CCIfType<[f32, f64], CCAssignToReg<[R3]>>, - CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>, - CCIfType<[v2i32], CCAssignToReg<[R3]>> + CCIfType<[i8,i16,i32,i64,i128,f32,f64,v16i8,v8i16,v4i32,v2i64,v4f32,v2f64], + CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11, + R12, R13, R14, R15, R16, R17, R18, R19, R20, + R21, R22, R23, R24, R25, R26, R27, R28, R29, + R30, R31, R32, R33, R34, R35, R36, R37, R38, + R39, R40, R41, R42, R43, R44, R45, R46, R47, + R48, R49, R50, R51, R52, R53, R54, R55, R56, + R57, R58, R59, R60, R61, R62, R63, R64, R65, + R66, R67, R68, R69, R70, R71, R72, R73, R74]>> ]>; @@ -45,8 +46,7 @@ def CCC_SPU : CallingConv<[ R39, R40, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, R58, R59, R60, R61, R62, R63, R64, R65, - R66, R67, R68, R69, R70, R71, R72, R73, R74, - R75, R76, R77, R78, R79]>>, + R66, R67, R68, R69, R70, R71, R72, R73, R74]>>, // Integer/FP values get stored in stack slots that are 8 bytes in size and // 8-byte aligned if there are no more registers to hold them. CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>, |